Re: [casper] ROACH 1 DRAM

2014-02-26 Thread Marc Welz
On Tue, Feb 25, 2014 at 7:43 AM, G Jones wrote: > Hi Marc, > Thanks for the reply. I would have expected that selecting the 64 MB chunk > with the dram_controller register as described in the DRAM block > documentation on the wiki would get around any such PPC address space > limitation. Is that n

Re: [casper] ROACH 1 DRAM

2014-02-26 Thread G Jones
I'm not 100% sure, as I don't write from the fabric: I load using the PPC interface and then playback from the fabric. I may have found an addressing problem in my design; I'm rebuilding now to check it and will report back. On Wed, Feb 26, 2014 at 10:17 AM, Jason Manley wrote: > Corr does this

Re: [casper] ROACH 1 DRAM

2014-02-26 Thread Jason Manley
Corr does this in 1MB chunks for this reason. I suspect a problem in the controller. Glenn, can you access over 256MB from the fabric? Jason On 26 Feb 2014, at 17:13, Marc Welz wrote: > On Tue, Feb 25, 2014 at 7:43 AM, G Jones wrote: >> Hi Marc, >> Thanks for the reply. I would have expec

Re: [casper] ROACH 1 DRAM

2014-02-26 Thread G Jones
Hi Marc, Can you expand on this a bit. Are you saying that I should set the top bits of the DRAM address in the FPGA fabric and that will then affect the 256 MB portion of the DRAM that is accessed by the PPC, which is then broken up into the 64 MB chunks described in the block documentation and ac

Re: [casper] ROACH 1 DRAM

2014-02-25 Thread Jason Manley
I haven't used ROACH DRAM in a long while, but I do recall testing it beyond 256MB (not very thoroughly though; wrote a counter from fabric and read back 1024MB... took many minutes) when I implemented the read_dram function in corr: def read_dram(self, size, offset=0,verbose=False):

Re: [casper] ROACH 1 DRAM

2014-02-24 Thread G Jones
Hi Marc, Thanks for the reply. I would have expected that selecting the 64 MB chunk with the dram_controller register as described in the DRAM block documentation on the wiki would get around any such PPC address space limitation. Is that not the case? Glenn On Feb 25, 2014 2:30 AM, "Marc Welz" w

Re: [casper] ROACH 1 DRAM

2014-02-24 Thread Marc Welz
On Mon, Feb 24, 2014 at 7:57 PM, G Jones wrote: > Hi, > Sorry to repost this. Just curious if anyone has experience using more than > 256 MB of FPGA DRAM on the ROACH, in particular through the PPC interface. The PowerPC's virtual memory subsystem maps things in 256Mb regions/segments, and only o

Re: [casper] ROACH 1 DRAM

2014-02-24 Thread G Jones
Hi, Sorry to repost this. Just curious if anyone has experience using more than 256 MB of FPGA DRAM on the ROACH, in particular through the PPC interface. Thanks, Glenn On Wed, Feb 12, 2014 at 12:44 PM, G Jones wrote: > Hi, > I'm using the ROACH 1 DRAM for a lookup table for waveform generatio

[casper] ROACH 1 DRAM

2014-02-12 Thread G Jones
Hi, I'm using the ROACH 1 DRAM for a lookup table for waveform generation with the DAC. Everything has been working well and as I expected, until I tried to use more than 256 MB. It looks like the ROACH has a single sided 1 GB DRAM module in the FPGA DRAM slot, but I don't have the exact part numbe

[casper] roach 1 dram reference design

2013-02-12 Thread Mike Movius
Hi, I am a recent roach user and want to use the dram in my design. I have read the wiki but find the library block description a bit cryptic. I want to write to the dram from the firmware and read from the cpu. Does anyone know where I could find a reference design to use as a point of departur