Hi Danny
Commit d81d752 may solve this problem. I have been having similar problems
and this change has so far worked for me.
My experience was corrupt data on iADCs in slot 1 on the ROACH with
symptoms similar to yours, random large spikes in time domain data.
Shifting the sampling clock relativ
Hi Danny
It looks like you may have run into a similar problem that we (and GMRT)
experienced a while ago. Basically, the clock and data coming from the iADC
were misaligned (off by 90 degrees if I recall correctly) and weird data
like this occurred at certain frequencies (and not at others). Dave
Try this one
import numpy as np
data = np.fromstring(fpga.read(snap_id+'_bram', 4*2048), dtype='int8')
This will give you a vector of 8192 8-bit signed adc samples, which is
what you want.
If you want to read a 32 bit bram as a 32 bit number you can do
data32 = np.fromstring(fpga.read('_bram',
Hey Glenn, Dave,
I'm reading the bram with this python code:
snap_data = fpga.read(snap_id+'_bram', 4*2048)
list_len = len(snap_data)/4
unpack_fmt = '>'+'l'*list_len
data = struct.unpack(unpack_fmt, snap_data)
And yes, I'm concatenating them together. I'm guessing there's a bet
Hi, Danny,
On Sep 23, 2010, at 9:05 , Danny Price wrote:
* adc_10_1.png is a snap block grab of the ADC output, on a compile
at 250MHz using 10.1 (git repo a few weeks old)
* adc_11_4.png: same thing, but with random spikey things, compiled
on our 11.4 Centos machine (latest git repo)
The
Hi Danny,
What exactly are you plotting there? It looks like you have 4
simultaneous ADC samples concatenated into a 32 bit word going into
your snap block. Your plot scales are 1e8, so it seems like you may be
trying to plot the raw 32 bit number, rather than properly
re-interleaving your ADC samp
6 matches
Mail list logo