. For
example has someone programed a Simulink block that has the option to
synchronize both ADC in ROACH2, like the ADC083000 block for ROACH1.
Any information is welcome!
Regards,
Franco Curotto
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Estudiante de Ingeniería Civil Eléctrica
Facultad de Ciencias Físicas y Matemáticas
of using them in interleave mode in the block
parameters, contrary to ROACH1 ADC blocks (adc_083000x2).
I've also noticed that the ADC boards have a SYNC input, but I don't know
how to use it.
Thanks,
Franco
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Facultad de Ciencias Físicas y
Thank you Jason,
Do you know if the "read_dram()" function would work as well, or should
I stick to read()?
Franco
On 02/08/16 05:46, Jason Manley wrote:
Hi Franco
You've uncovered a weirdness with the tools: unlike most other blocks, for QDR
and DRAM the memory names
could understand the division by two as a way to avoid overflow, but
not the rest of the changes.
Franco
could understand the division by two as a way to avoid overflow, but
not the rest of the changes.
Franco
\_from\_cntr_dram2_2016_Dec_13_1558.bof
!progdev fail
Anyone has any idea what's the problem? I can program other models fine,
but this is the first model I compiled using the SKA fork library.
Thanks,
Franco
Doing some more testing, I realize the progdev works when I remove the
DRAM block from the model. What could this mean??
Franco
On 14/12/16 10:13, Franco wrote:
Dear Casperites,
I'm trying to progdev a model to ROACH2 and I get the following error:
?progdev cntr_dram2_2016_Dec_13_1558.bof
with the
katcp_wrapper script?
thanks,
Franco
On 02/12/16 12:42, Franco wrote:
No, I'm using the tutorial version. That might be the problem. However
I'm reluctant to update since this might cause incompatibilities with
my previous models. I suppose that if I what to use the DRAM I don't
have other choice
Thanks Jack, I'll check into the project but it seems to have what I've
been looking for.
Franco
On 15/12/16 07:28, Jack Hickish wrote:
More broadly speaking, has anyone ever used the DDR powerPC interface
on ROACH2? Is it actually know to work with code as-provided in the
mlib_devel
',
'sync_gen_sync_period_sel',
'sync_gen_sync_period_var',
'sys_board_id',
'sys_clkcounter',
'sys_rev',
'sys_rev_rcs',
'sys_scratchpad',
'write_done']
thanks,
Franco
On 02/12/16 10:02, Marc Welz wrote:
Then there is no bitstream programmed or the particular bitstream
doesn't contain
?
thanks,
Franco Curotto
No, I'm using the tutorial version. That might be the problem. However I'm
reluctant to update since this might cause incompatibilities with my previous
models. I suppose that if I what to use the DRAM I don't have other choice. Do
you have any suggestions?
Many thanks,
Franco
Jason
). It is
possible to run the ADC at such low frequency? What is the minimum
acceptable frequency? I tried to find this information in the ADC
datasheet, but I haven't been successful. Also tried compiling simple
models at low frequencies, but everything below 600MHz failed.
Thanks,
Franco
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You
:177
Backtrace 2: gen_xps_files:229
Backtrace 3: run_Callback:155
Backtrace 4: casper_xps:86
Backtrace 5:
@(hObject,eventdata)casper_xps('run_Callback',hObject,eventdata,guidata(hObject)):0
Error using gen_xps_files (line 242)
Error found during Object creation.
Thanks,
Franco
On 03/04/17 23:39
Oh, that may be exactly what I need, I'll try it out.
Thanks!
Franco
On 04/04/17 03:14, Andrew Martens wrote:
Hey Franco
Many of the CASPER blocks were updated a while ago so that you can use
them asynchronously i.e data does not need to be fed to the blocks on
every clock cycle. You can
Ok, thanks for the suggestion, I'll try it out.
Franco
On 04/04/17 09:50, James Smith wrote:
Hello Franco,
If you're only using 1 sample at a time, you needn't use a CASPER FFT,
the Xilinx ones do the trick nicely. You can use an asynchronous
1-input PFB if you want to as well.
You would
Hi all,
Is there an easy way to check if the ADC5G in ROACH2 is out of range? I
noticed there is and out-of-range output in the EV8AQ160 QUAD ADC chip
(according to the datasheet), but is not implemented in the asiaa_adc5g
yellow block.
Thanks,
Franco
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wasn't
able to find them.
Thanks,
Franco
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Ah, interesting, didn't thought of that. I'll try to figure it out a bit more,
and if I get nowhere I'll use your approach.
Thanks!
Franco
Jack Hickish wrote
>Hi Franco,
>
>
>I've had this error before. To be honest, since ISE compiled my design fine
>and I coul
sense because I could successfully compiled with
casper_xps. Googling the problem I only found this link:
https://forums.xilinx.com/t5/Synthesis/Planahead-Cannot-place-carry-chain-instance/td-p/742833
which didn't helped me too much.
Has anyone encountered this same problem?
Franco
--
Y
the lonely counter? Something else?
As always, many thanks,
Franco Curotto
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I actually didn't know that tool existed! I am trying to meet timing
constraints, and I'm actually very close to do so, so I'm definitely
gonna try smartxplorer. Thanks for the advise!
Franco
On 25/05/17 15:24, Michael D'Cruze wrote:
Hi Franco,
Just curious, but have you considered using
Thanks for the feedback Jack!
On 25/05/17 13:46, Jack Hickish wrote:
Hi Franco,
1) Yes, this is an optimization the tools have performed. If you dig
into the Xilinx manuals you can probably find some options / UCF
entries to turn off this type of optimization, or at least make it
less
Dear all,
Had anyone deal with this problem in SmartXplorer? I think is because of
I'm using a newer version of linux (Debian Stretch):
WARNING: Unsupported platform on remote host franco-machine.
SmartXplorer is supported only on 32-bit or 64-bit Linux platforms.
Removing host from
Dear all,
I tried to load MATLAB today as I do everyday when I suddenly got this
error:
Reading local definitions from './startsg.local'
Using MATLAB_PATH=/home/franco/Software/STEM/MATLAB-R2013a
Using XILINX_PATH=/home/franco/Software/STEM/Xilinx-ISE/14.7/ISE_DS
Using XILINX_PLATFORM=lin64
d I wonder
if it is possible.
Many Thanks,
Franco Curotto
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T
Interesting, thanks for the info. Do you know if it is safe to operate
the ADC outside does assigned constraints, assuming the model meets
timing closure?
Franco
On 12/09/17 17:34, David MacMahon wrote:
Hi, Franco,
I'm not extensively familiar with the inner workings of the AGC5G yellow
Ok, thanks for the advice.
Franco
On 12/09/17 18:28, John Ford wrote:
Hi Franco.
No, it does not work if you ignore these warnings. It sort of works.
Which is worse, IMO...
You should dither your sampling rate until you find something thta
works and design the system to work
expect to have results soon.
Thanks,
Franco
On Tue, Dec 12, 2017 at 9:55 PM, Dan Werthimer <d...@ssl.berkeley.edu>
wrote:
>
> hi xavier,
>
> it sounds like you are switching between two signal sources,
> one is a reference load with a very small signal level,
> and the other
arxiv, but I hope they are useful.
Franco Curotto
On Tue, Oct 23, 2018 at 12:43 AM Danny Price wrote:
> Hi all,
>
> As I mentioned at the CASPER workshop, I’ve put together an ADS public
> library papers that details CASPER instruments:
>
> https://ui.adsabs.harvard.edu/
,
Franco Curotto
Electrical Engineer
Millimeter-Wave Laboratory
University of Chile
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/cabletestmemo.pdf
Were the memos migrated to other location/URL?
Thanks,
Franco Curotto
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Nice, all memos seems to work now.
Thanks!
Franco
On Mon, Jan 7, 2019 at 4:42 PM Jack Hickish wrote:
> Hi Franco,
>
> Good catch, thanks -- try now.
>
> Cheers
>
> Jack
>
> On Mon, 7 Jan 2019 at 10:02 Franco wrote:
>
>> Hi all,
>>
>> I
Macmahon initalization code)
- User IP Clock Rate: 140 MHz
- Actual clock frequency used in the adc board: 140MHz
Thanks,
Franco Curotto
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frequency.
Thanks for the suggestions,
Franco
On Wed, Apr 3, 2019 at 9:07 AM Jack Hickish wrote:
> Hi Franco,
>
> In addition to Dave's advice-- how are you configuring your board? After
> programming the FPGA, you'll need to appropriately configure the ADC to
> operate in
), and using the initialization code from here:
http://w.astro.berkeley.edu/~davidm/gems/ and I had the same result. It
seems the I stumbled into some mysterious behavior of the ADC board. Has
anybody else experienced this behavior?
Thanks,
Franco
On Wed, Apr 3, 2019 at 2:02 PM Jack Hickish wrote
-8_coax_rev_2 , maybe I could
try testing that model to see if it is a problem with my compilation tools,
but I haven't found the script that performs the data acquisition to the
pc. Does such script exists?
Thanks,
Franco
On Wed, Apr 3, 2019 at 4:52 PM David MacMahon wrote:
> Does this symptom app
.
For now I think I can leave with the penalty of the error (in the end it
just halves the usable bandwidth), but I'm very interested if someone comes
with a theory or a possible test to debug the phenomenon.
Franco
On Wed, Apr 3, 2019 at 7:09 PM David MacMahon wrote:
> The adc16 scripts that
factor is due to
> how the Hittite ADC chip supplies the data to the FPGA as a function
> of the number of analog inputs to sample.
I don't have that option in my XSG block (and I find it weird that that
option would be in that block). Was that parameter developed in a different
branch of the
Hi Jack,
Thank you for the help. I tried the code, but I've got the same result,
both for my model and the one from the CASPER page :(.
Franco
On Sun, Apr 7, 2019 at 6:58 AM Jack Hickish wrote:
> Hi Franco,
>
> Can you try this software with the model you compiled?
> https://git
similar in the past?
Thanks,
Franco
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I'm not sure but did you make the modifications required post-installation:
https://github.com/casper-astro/tutorials_devel/wiki#modifications-to-be-run-after-installs
?
I remember having a similar error for not having the make -> gmake link.
Franco
On Tue, Mar 5, 2019 at 10:24 AM Heys
and
that record the start time? Sorry if it is basic question.
Thanks,
Franco
On Thu, Mar 7, 2019 at 3:52 AM James Smith wrote:
> Hello Franco,
>
> As I understand it, PTP wasn't terribly useful in our application (though
> I wasn't involved with this directly). You can probably syn
Hi John,
Thank you for the answer. I see, so reading the network packages directly
from FPGA using the GBE core, would be the way to go if using PTP or NTP.
Thanks,
Franco
On Thu, Mar 7, 2019 at 10:11 AM John Ford wrote:
> Hi Franco.
>
> We have normally time-stamped the d
Hi,
Yes! Very clear. Thank you very much James, Jack and Dan. Just the last
little question, why you call "ARM" the signal/register that resets the
time-tracking counter?
Thanks,
Franco
On Mon, Mar 11, 2019 at 4:27 AM James Smith wrote:
> Hello Franco,
>
> Jack's e
Hi David, Dan,
Thanks for the explanation, my English failed me this time around (problems
of a non-native speaker ¯\_(ツ)_/¯ )
Regards,
Franco
On Mon, Mar 11, 2019 at 1:19 PM Dan Werthimer wrote:
>
> hi franco,
>
>
> i think we picked the word "arm" because it'
I didn't know about that publication! I recently finished my master thesis
in an RFI mitigation technique, and I would have submitted something.
Very cool regardless.
Franco
On Mon, Jun 10, 2019 at 5:34 PM 'Jarnot, Robert F (386A)' via
casper@lists.berkeley.edu wrote:
> Jonat
.
Thanks for the info!
Franco
On Fri, Aug 30, 2019 at 4:39 PM Jack Hickish wrote:
> Hi Franco,
>
> I don't think there's any reason not to use xblocks. Someone can
> correct me if I'm wrong.
>
> Several years ago there was a quest to move the whole casper library
> to xblocks
avoid using xBlock? The
only inconvenient I have had with it for now is that you have to install
some additional libraries in Linux to make it work, which I didn't find it
documented anywhere.
Thanks,
Franco Curotto
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black boxes from existing blocks.
Thanks,
Franco
On Sat, Aug 31, 2019 at 2:25 AM Andrew Martens wrote:
> To add to what Dave has said. I found that having no control over the
> relative size and placement of the blocks when using xBlocks made it hard
> to see what was happenin
Thanks Jack! I'll check the tutorial.
Franco
On Mon, Sep 2, 2019 at 12:23 PM Jack Hickish wrote:
> Hi Franco,
>
> Here's an ancient tutorial -
> https://casper.ssl.berkeley.edu/wiki/Tutorial_HDL_Black_Box
>
> The files referenced should be at
> https://github.com/casper-
,
Franco
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Just to report: x2go works very well! is almost as native display. thanks
for the suggestion!
Franco
On Wed, Aug 7, 2019 at 2:13 PM Franco wrote:
> Thanks Arash! X2go looks very good, I'll give it a try.
>
> Franco
>
> PD: Forgot to mention, to the whole community, looking for
Thanks Arash! X2go looks very good, I'll give it a try.
Franco
PD: Forgot to mention, to the whole community, looking forward to meeting
you next week!
On Wed, Aug 7, 2019 at 1:11 PM Arash Roshanineshat <
aroshanines...@email.arizona.edu> wrote:
> Hi Franco,
>
> We do have such
of the CASPER
website (https://casper.ssl.berkeley.edu/wiki/Papers), but I'm not sure if
it is still active, and open to the whole community.
Regards,
Franco Curotto
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Thanks for the info Jack!
I'll do just that.
Franco
On Fri, Jul 19, 2019 at 4:19 AM Jack Hickish wrote:
> Hi Franco,
>
> That wiki page is pretty deprecated, I've redirected it to the
> publications repository on github where we've been keeping
> papers/memos -- https://gi
lso tried the Xilinx FFT block, but it has a strange
problem where the noise floor increase considerably when injecting a tone
at the middle point between two FFT bins.
Thanks,
Franco Curotto
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remember something
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Thanks,
Franco
On Mon, Dec 30, 2019 at 3:10 PM Dan Werthimer wrote:
>
> hi franco,
>
> are you looking for an FFT with a real input and complex output?
>
> you mentioned you are connected
Thanks, It worked!
Franco
On Mon, Jan 6, 2020 at 4:47 AM Adam Isaacson wrote:
> Hi Franco,
>
> I sent you an invite to join slack casper-astro.slack.com. I hope it
> works. Let me know.
>
> Kind regards,
>
> Adam Isaacson
> South African Radio Astronomy Observatory
apshot tries to read the memory
as: "?read snapshot_bram
0 8192".
So apparently with that function I can only read the bram version of the
snapshot: then what is the correct way to read the data from DRAM-snapshot?
Sorry if this question is too basic.
Thanks,
Franco.
Thanks! That's a relief, for a moment there I doubted my high school
math knowledge. Just out of curiosity, how do you check if a block is
used by another block in the library?
Franco
On 10/03/2016 06:14 PM, David MacMahon wrote:
Hi, Franco,
I can understand your confusion! This block
lines, instead I get three
different lines
My only guess is that the snapshot_get function is actually triggering
the snapshot block, so is getting new data. Anyone have some idea of
what is going on?
Franco Curotto
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someone knows what's going on? I'm not using SmartXplorer correctly?
Thanks,
Franco Curotto
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