via the link at the casper site, I get to a Berkeley Calnet login.
Thanks in advance,
--Tony Goodson
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Thanks Alec,
That worked! I'm used to always having a minicom terminal up at start.
When I didn't, it successfully reloaded u-boot. We're up and running now.
Really appreciate the help!
--Tony Goodson
R
On Tue, Jun 13, 2017 at 12:47 AM, Alec Rust <a...@ska.ac.za> wrote:
>
Hi,
We don't work with the KatADC board, but your remaining problem looks a lot
like what we see when "phase" calibration is not quite right on the 5GSPS
ADC boards. In the 5GSPS case, the phase parameter controls the delay for
sweeping the samples into FPGA. If the data is brought in too early
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