On 01/01/17 21:54, Paul Koning wrote:
I'll have to see if I can reverse engineer this from the RSTS PRO
display code. The reason is that this was written based on the
standard (DEC Std 070). If you can find that document, that would be
great, because it is the authority on how things are
I'll put my copy on line. It's 70mb, the mirrors should have it sometime
tomorrow.
On 1/1/17 2:26 PM, Antonio Carlini wrote:
> I did see a bunch of DEC STDs sitting on bitsavers but 070 doesn't seem to be
> one of them.
>
> On Jan 1, 2017, at 2:39 PM, Mattias EngdegÄrd wrote:
>
> Would someone with a real DEC VT terminal be so kind and help settle, once
> and for all, the question about how they behave with respect to
> line-wrapping, exactly? It is something that isn't covered by any
> On Jan 1, 2017, at 11:26 AM, Pete Lancashire wrote:
>
> To convert from Muncell to RGB
>
> http://www.andrewwerth.com/color/
>
> http://www.munsellcolourscienceforpainters.com/ConversionsBetweenMunsellAndsRGBsystems.pdf
What would also be interesting is a mapping
Yes, happy New Year's everyone.
2017 is the year where I'll give my 60+ computers a health check. For most
the last time this happened was 2015. Not a comprehensive test, but a
switch on, check the video looks ok and is stable, PEEK/POKE the RAM, make
sure all the keys work and storage media is
On 31/12/2016 07:56, Pontus Pihlgren wrote:
On Fri, Dec 30, 2016 at 11:04:26AM +0100, Pontus Pihlgren wrote:
I'll provide examples of some of these. Others can be found online.
Here are three panels I could easily get to:
http://www.update.uu.se/~pontus/slask/front_paneler/headers/
/P
On 31/12/2016 03:49, Charles Dickman wrote:
Rod,
On Thu, Dec 29, 2016 at 8:04 PM, Rod Smallwood
wrote:
Hi Guys
I have had a quick word with the girls down at the silk screen
shop.
A couple of years ago I tried to translate the DEC color
Would someone with a real DEC VT terminal be so kind and help settle, once and
for all, the question about how they behave with respect to line-wrapping,
exactly? It is something that isn't covered by any standard, nor by any of
DEC's manuals, and there is a scarcity of information online that
I've updated my VHDL 1802 core and COSMAC ELF for a newer FPGA, the Xilinx
Artix 7. As usual, the source code in in the github repository:
https://github.com/brouhaha/cosmac/
On the XC7A100T-1FGG484, which is the slowest speed grade, it meets timing
at 62.5 MHz. Since my 1802 core only