> From: Allison
>> "The console emulator Octal Debugging Technique (ODT)is a portion of
>> the processor microcode ... The console ODT implemented on the
LSI-11/23,
>> PDP-11/23 and PDP-11/23-PLUS is identical."
> However LSI-11/23 whatever that is, typo?
No, that's
I have been working on it for the past week, and I would say the I have my
system 95% functional as of now.
On Sun, Jun 9, 2019 at 9:05 AM Noel Chiappa wrote:
> > unlike my M8017, it will actually respond to my inputs on my
> > terminal. I'm pretty sure I may just have the card
On 06/08/2019 10:37 PM, Noel Chiappa via cctech wrote:
> > From: Allison
>
> > ODT for the two systems are very different. .. KDF-11 the ODT is part
> > of the higher level code. The larger cards (11/23 and 23+) boot to
> > resident (ep)rom.
>
> Ah, no. (Well, the KDF11 CPU's can
> From: Allison
> ODT for the two systems are very different. .. KDF-11 the ODT is part
> of the higher level code. The larger cards (11/23 and 23+) boot to
> resident (ep)rom.
Ah, no. (Well, the KDF11 CPU's can boot to EPROM, which in the -11/23+ can be
on the CPU card; the
On 06/08/2019 07:08 PM, Noel Chiappa via cctalk wrote:
> A follow-up to close out something:
>
> > OK, now a picture of the bus with no console card:
>
> > http://ana-3.lcs.mit.edu/~jnc/tech/pdp11/jpg/BSYN-BDAL_NoMem.jpg
> [Note: image re-named, to correctly say what it's showing]
>
A follow-up to close out something:
> OK, now a picture of the bus with no console card:
> http://ana-3.lcs.mit.edu/~jnc/tech/pdp11/jpg/BSYN-BDAL_NoMem.jpg
[Note: image re-named, to correctly say what it's showing]
> It's a bit hard to interpret what's going on here .. The long
On 06/08/2019 12:07 PM, Mister PDP via cctalk wrote:
> On Fri, Jun 7, 2019 at 7:35 PM Noel Chiappa wrote:
>
>> PS: Might be useful to check that the DLV11-J works; having a stock of
>> known-good
>> boards you can swap in is such a tool for QBUS debugging.
>
>
> Tried that one out too, and it
On Fri, Jun 7, 2019 at 7:35 PM Noel Chiappa wrote:
> PS: Might be useful to check that the DLV11-J works; having a stock of
> known-good
> boards you can swap in is such a tool for QBUS debugging.
Tried that one out too, and it works. In fact, unlike my M8017, it will
actually respond to my
I missed the part of the thread about the memory being disabled. I think
the 11/05/10 is the only PDP-11 with a few registers on the CPU that you
can run short routines. I also like the built is console SLU.
Paul
On Fri, Jun 7, 2019 at 9:18 PM Jon Elson via cctalk
wrote:
> On 06/07/2019 06:19
On 06/07/2019 06:19 PM, Mister PDP via cctalk wrote:
Wow, I wasn't aware that the ODT console needed memory to run. Checking on
my board, it looks like the 4kw was disabled. I plugged in my 32kw module
with my M8017-AA, and it fired right up to ODT without a hassle. Seems that
was the issue all
> From: Mister PDP
> Wow, I wasn't aware that the ODT console needed memory to run.
It was news to me too! (And apparently to most others here too?)
I was going to look at those confusing bus cycles, using an only slightly
mis-addressed console, and wanted to first check that that
Wow, I wasn't aware that the ODT console needed memory to run. Checking on
my board, it looks like the 4kw was disabled. I plugged in my 32kw module
with my M8017-AA, and it fired right up to ODT without a hassle. Seems that
was the issue all along.
On Fri, Jun 7, 2019, 3:08 PM Noel Chiappa
Sorry for the break, finals at school have been a little crazy. For
simplicity of testing I have switched back to the M8017-AA instead of the
M8043. The both are behaving in the exact same manner, so I am not ruling
out the idea that the CPU is at fault just yet.
On Wed, May 29, 2019 at 6:17 AM
On 05/29/2019 07:17 AM, Noel Chiappa via cctech wrote:
> > From: Josh Dersch
>
> > how is the backplane in the H11 currently configured? (i.e. what boards
> > are in what slots?) Could the issue here be something as simple as a
> > break in the qbus due to a misplaced board?
>
>
> From: Josh Dersch
> how is the backplane in the H11 currently configured? (i.e. what boards
> are in what slots?) Could the issue here be something as simple as a
> break in the qbus due to a misplaced board?
He did mention that he had the console card in the slot next to the
On Tue, May 28, 2019 at 6:23 PM Noel Chiappa via cctalk <
cctalk@classiccmp.org> wrote:
> Hi, sorry about the delayed reply; been dealing with this:
>
> http://ana-3.lcs.mit.edu/~jnc/jpg/backoak/WholeTreeS.jpg
>
> The cranes arrive tomorrow...
>
>
> > I took a look at all the lines you
Hi, sorry about the delayed reply; been dealing with this:
http://ana-3.lcs.mit.edu/~jnc/jpg/backoak/WholeTreeS.jpg
The cranes arrive tomorrow...
> I took a look at all the lines you mentioned. BDAL3-13, BDIN, BSYNC, and
> BBS7 are all active and jump around in some manner.
Hmm.
mån 2019-05-27 klockan 12:47 -0500 skrev Mister PDP via cctalk:
> I took a look at all the lines you mentioned. BDAL3-13, BDIN, BSYNC,
> and
> BBS7 are all active and jump around in some manner. BRPLY is still
> the only
> line that does not have any activity on it. None of the BDAL lines
> seem
>
I took a look at all the lines you mentioned. BDAL3-13, BDIN, BSYNC, and
BBS7 are all active and jump around in some manner. BRPLY is still the only
line that does not have any activity on it. None of the BDAL lines seem
shorted to ground or to each other. My DLV11-J is configured to essentially
On Sun, May 26, 2019 at 1:03 PM Brent Hilpert via cctalk <
cctalk@classiccmp.org> wrote:
> Didn't this start out with the RUN LED not lighting up?
> I don't recall it being mentioned that that was repaired.
>
I spent a good amount of time with the RUN LED issue, but eventually hit a
brick wall.
Didn't this start out with the RUN LED not lighting up?
I don't recall it being mentioned that that was repaired.
Perhaps pursue fixing that - while it may be a secondary problem that
doesn't resolve a 'bigger' problem, it could be that it uncovers a common
problem.
On 05/26/2019 10:44 AM, Jon Elson via cctalk wrote:
On 05/26/2019 12:13 AM, Mister PDP via cctalk wrote:
Ok, small update. My M8043 (DLV11-J) just arrived today.
It seemed in good
condition so I confirmed it was set up correctly (9.6k
baud and console on
J3), built a serial cable from the
On 05/26/2019 12:13 AM, Mister PDP via cctalk wrote:
Ok, small update. My M8043 (DLV11-J) just arrived today. It seemed in good
condition so I confirmed it was set up correctly (9.6k baud and console on
J3), built a serial cable from the information provided on gunkies, and put
it into my
Ok, small update. My M8043 (DLV11-J) just arrived today. It seemed in good
condition so I confirmed it was set up correctly (9.6k baud and console on
J3), built a serial cable from the information provided on gunkies, and put
it into my system. Sadly, it behaves exactly how it did with the M8017.
Den tors 23 maj 2019 kl 14:14 skrev Noel Chiappa via cctalk <
cctalk@classiccmp.org>:
> > From: Jon Elson
>
> > Yes, this is most likely a bus timeout
>
> The good news is that it looks like his CPU is 'mostly' working; and if
> the NXM is due to a fault on the CPU (e.g. bad bus
> From: Jon Elson
> Yes, this is most likely a bus timeout
The good news is that it looks like his CPU is 'mostly' working; and if
the NXM is due to a fault on the CPU (e.g. bad bus transceiver sending
the wrong address), that would be fixable (it uses 8641's).
If the fault is in the
On 05/22/2019 05:04 PM, Noel Chiappa via cctalk wrote:
> On the LSI-11/2, with the machine stopped, 'run' was off, and the
> output on AF1/AH1 was always high (i.e. not asserted).
> I don't have any guesses as to what the behaviour of yours is about.
Hah! Eureka! I had a
> On the LSI-11/2, with the machine stopped, 'run' was off, and the
> output on AF1/AH1 was always high (i.e. not asserted).
> I don't have any guesses as to what the behaviour of yours is about.
Hah! Eureka! I had a brainwave, and decided to look at my machine with
the serial console
> From: Glen Slick
> According to the M7270 LSI-11/2 Microcomputer Module User's Guid[e],
> it uses BC1, BD1, BE1, BF1 for SCLK3 H, SWMIB18 H, SWMIB19 H, SWMIB20 H.
Oh, thanks! I wonder how I missed that, looking at the prints? (The
drawings have these nice dark arrowheads to
On Tue, May 21, 2019 at 5:34 PM Glen Slick wrote:
>
> On Tue, May 21, 2019 at 4:56 PM Noel Chiappa via cctalk
> wrote:
> >
> > Well, I verified that the LSI-11/2 should work in a Q22 backplane -
> > in the sense that the only pins it tries to talk to are standard
> > QBUS pins, and AF1/AH1 for
On Tue, May 21, 2019 at 4:56 PM Noel Chiappa via cctalk
wrote:
>
> Well, I verified that the LSI-11/2 should work in a Q22 backplane -
> in the sense that the only pins it tries to talk to are standard
> QBUS pins, and AF1/AH1 for SRUN. It doesn't drive BREF, which might
> cause issues in later
> From: Mister PDP
Well, I verified that the LSI-11/2 should work in a Q22 backplane -
in the sense that the only pins it tries to talk to are standard
QBUS pins, and AF1/AH1 for SRUN. It doesn't drive BREF, which might
cause issues in later QBUS systems.
Although it's a different board from
> Can you check that BHALT on the QBUS is actually asserted (i.e. 0V)
when the switch is in HALT?
I checked the BHALT signal going into the backplane, and it seems to be in
good working order. I took a picture of the readouts for SRUN, which you
can see here:
> From: Mister PDP
> After a day of confusing and mixed up signals (I don't really use
> this type of equipment very often) .. I switched over to the
> oscilloscope
Don't feel bad, I too prefer to rely on an oscilloscope by default; not
only does it let you see what's really
Alright, I hooked the oscilloscope up to SRUN off of E68, and found that it
oscillates low at 58.68KHz. This oscillation is very short lived, with it
bouncing back up to high nearly instantly. Hitting the Run/Halt switch does
not have any effect on the period or amplitude of the oscillation.
On
On 2019-May-20, at 12:11 AM, Glen Slick via cctalk wrote:
> On Sun, May 19, 2019 at 11:48 PM Brent Hilpert via cctalk
> wrote:
>>
>> Except the SRUN (K8 SRUN L) action is not latched, so it probably appears as
>> an
>> active-low heartbeat pulse with some periodicity when the processor is in
On Sun, May 19, 2019 at 11:48 PM Brent Hilpert via cctalk
wrote:
>
> Except the SRUN (K8 SRUN L) action is not latched, so it probably appears as
> an
> active-low heartbeat pulse with some periodicity when the processor is in run
> mode.
> A low-going pulse during PH 3 every instruction cycle
On 2019-May-19, at 9:09 PM, Glen Slick via cctalk wrote:
> On Sun, May 19, 2019 at 8:05 PM Mister PDP via cctalk
> wrote:
>>
>> After that, I decided to try and find out why the
>> Run/Halt light was not coming on when I hit the switch. Looking at the H11
>> schematics, the light relies on the
On Sun, May 19, 2019 at 8:05 PM Mister PDP via cctalk
wrote:
>
> After that, I decided to try and find out why the
> Run/Halt light was not coming on when I hit the switch. Looking at the H11
> schematics, the light relies on the SRUN signal coming off of the
> backplane. The problem I am
This is a continuation of my post from about a week and a half ago. The
weekend I had some free time, so I returned, armed with a oscilloscope and
logic analyzer, to try and figure out what is wrong with my H11A. At first,
I tried to use the logic analyzer to confirm that the four clock signals on
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