Re: PDP-8 diagnostic tests

2016-08-24 Thread Toby Thain

On 2016-08-24 3:24 PM, Don North wrote:

On 8/24/2016 2:21 AM, Pontus Pihlgren wrote:

On Tue, Aug 23, 2016 at 12:31:42PM -0700, Scott Baker wrote:

Hi,
  1) DEC documentation which more fully describes all the instruction
set (in
more detail  than the PDP-8 handbook)

Not DEC documentation but a good resource:
http://homepage.cs.uiowa.edu/~jones/pdp8/man/

I've written an emulator purely from these pages and it passes the
MAINDEC-8E-D0AB-PB instruction tests.

Here is IAC described:
http://homepage.cs.uiowa.edu/~jones/pdp8/man/micro.html#iac


2) Some more instruction tests in assembler source code format. I have
found lots of binary files but I would prefer assembler source code
format.
I am using a pal compatible cross assembler.

I don't have any of those. But I've used Krten's d8tape to dissasemble
BIN files with good result:

http://dustyoldcomputers.com/pdp-common/reference/host/index.html

That and the source code listings on bitsavers.

/P


Also I did not mention earlier my PDP-8 diagnostic page:
http://www.ak6dn.com/PDP-8/MAINDEC/
has more or less what you asked for. It has all the base PDP-8e series
CPU core diagnostics as listings
in PDF, binary tape images in BIN and RIM, and disassembled sources in
PAL and assembled LST.

BTW my PDP-8 implementation in Verilog (not VHDL) passes all these
diagnostics, as well as running
chess, focal, and other such images.


Hi Don

Is it published anywhere?

--Toby



Don









Re: PDP-8 diagnostic tests

2016-08-24 Thread Don North

On 8/24/2016 2:21 AM, Pontus Pihlgren wrote:

On Tue, Aug 23, 2016 at 12:31:42PM -0700, Scott Baker wrote:

Hi,
  
1) DEC documentation which more fully describes all the instruction set (in

more detail  than the PDP-8 handbook)

Not DEC documentation but a good resource:
http://homepage.cs.uiowa.edu/~jones/pdp8/man/

I've written an emulator purely from these pages and it passes the
MAINDEC-8E-D0AB-PB instruction tests.

Here is IAC described:
http://homepage.cs.uiowa.edu/~jones/pdp8/man/micro.html#iac


2) Some more instruction tests in assembler source code format. I have
found lots of binary files but I would prefer assembler source code format.
I am using a pal compatible cross assembler.

I don't have any of those. But I've used Krten's d8tape to dissasemble
BIN files with good result:

http://dustyoldcomputers.com/pdp-common/reference/host/index.html

That and the source code listings on bitsavers.

/P

Also I did not mention earlier my PDP-8 diagnostic page: 
http://www.ak6dn.com/PDP-8/MAINDEC/
has more or less what you asked for. It has all the base PDP-8e series CPU core 
diagnostics as listings
in PDF, binary tape images in BIN and RIM, and disassembled sources in PAL and 
assembled LST.


BTW my PDP-8 implementation in Verilog (not VHDL) passes all these diagnostics, 
as well as running

chess, focal, and other such images.

Don






Re: PDP-8 diagnostic tests

2016-08-24 Thread Doug Ingraham
Kudos for working on a VHDL model.  Which 8 variant are you trying to model?

As others have stated, the IAC does affect the link.  Of the other
instructions that one might think could change the Link, the ISZ
instruction does not affect the link and indirection that uses the
autoincrement memory locations 0010 through 0017 do not affect the Link.
This is because in those cases the increment is done in the MB register and
not the Link, AC.  Some of the EAE instructions also change the Link.  I
have paper listings of many of the diagnostics and one of my projects is to
get these re-keyed if I can't find a copy and scanned as PDF's so they can
be uploaded to bitsavers and on my own website when I get around to
bringing it up.  I have done Maindec-801-1 and both of the EAE Maindec.
 (801-3a and 801-3b I think they are called.)

The PDP-8 is an extremely simple machine.  If you are confused by some
aspect of implementation you are probably not doing it "the 8 way" because
they way they did it was almost always the simplest way.

Best wishes on your project!







On Tue, Aug 23, 2016 at 1:31 PM, Scott Baker 
wrote:

> Hi,
>
> I have written a PDP-8 VHDL model and I have it running in an FPGA
> https://github.com/scottlbaker/PDP8-SOC
>
> At this time it has passed a basic DEC diagnostic instruction test but
> I found some interesting things when getting that instruction test to pass.
> For example:
>
> The following segment of code implies that IAC instruction affects the Link
> bit
>
>  1797 /GROUP 1 OPERATE TEST 33
>  1798 02626 7300  CLA CLL /AC= LINK=0
>  1799 02627 1053  TAD K2525   /AC=2525
>  1800 02630 7261  CLA CMA CML IAC /TEST COMBINATION
>  1801 02631 7420  SNL
>  1802 02632 7430  SZL
>  1803 02633 7402  HLT /CLA CMA CML IAC FAILED, AC
> SHOULD
>  1804 /BE , LINK SHOULD BE ZERO
>
> but the PDP-8 Handbook  ; DEC copyright 1966; page 14
> says nothing about the Link bit being affected by the IAC instruction.
>
> The simh PDP-8 simulator also shows that L is affected by IAC.
>
> If I change this test line from
>
>  1800 02630 7261  CLA CMA CML IAC /TEST COMBINATION  << link=0
>
> to:
>
>  1800 02630 7261  CLA CMA CML  /TEST COMBINATION  << link=1
>
> Can anyone point me to:
>
> 1) DEC documentation which more fully describes all the instruction set (in
> more detail  than the PDP-8 handbook)
>
> 2) Some more instruction tests in assembler source code format. I have
> found lots of binary files but I would prefer assembler source code format.
> I am using a pal compatible cross assembler.
>
> Thanks and Regards,
> Scott
>



-- 
Doug Ingraham
PDP-8 SN 1175


Re: PDP-8 diagnostic tests

2016-08-24 Thread Al Kossow
WHICH PDP-8?
Every implementation was slightly different.
Dig up the stuff written by Charles Lasner for the gory details.


On 8/23/16 12:31 PM, Scott Baker wrote:
> Hi,
> 
> I have written a PDP-8 VHDL model and I have it running in an FPGA
> https://github.com/scottlbaker/PDP8-SOC
> 
> 



Re: PDP-8 diagnostic tests

2016-08-24 Thread Don North

On 8/23/2016 12:31 PM, Scott Baker wrote:

Hi,

I have written a PDP-8 VHDL model and I have it running in an FPGA
https://github.com/scottlbaker/PDP8-SOC

At this time it has passed a basic DEC diagnostic instruction test but
I found some interesting things when getting that instruction test to pass.
For example:

The following segment of code implies that IAC instruction affects the Link
bit

  1797 /GROUP 1 OPERATE TEST 33
  1798 02626 7300  CLA CLL /AC= LINK=0
  1799 02627 1053  TAD K2525   /AC=2525
  1800 02630 7261  CLA CMA CML IAC /TEST COMBINATION
  1801 02631 7420  SNL
  1802 02632 7430  SZL
  1803 02633 7402  HLT /CLA CMA CML IAC FAILED, AC SHOULD
  1804 /BE , LINK SHOULD BE ZERO

but the PDP-8 Handbook  ; DEC copyright 1966; page 14
says nothing about the Link bit being affected by the IAC instruction.

The simh PDP-8 simulator also shows that L is affected by IAC.

If I change this test line from

  1800 02630 7261  CLA CMA CML IAC /TEST COMBINATION  << link=0

to:

  1800 02630 7261  CLA CMA CML  /TEST COMBINATION  << link=1

Can anyone point me to:

1) DEC documentation which more fully describes all the instruction set (in
more detail  than the PDP-8 handbook)

2) Some more instruction tests in assembler source code format. I have
found lots of binary files but I would prefer assembler source code format.
I am using a pal compatible cross assembler.

Thanks and Regards,
Scott


Both TAD and IAC effectively perform 13 bit additions on {L,AC}.

The PDP-8a Handbook 
http://bitsavers.trailing-edge.com/pdf/dec/pdp8/handbooks/MinicomputerHandbook_1976.pdf

describes TAD operation on p5-3, and IAC operation on p5-6.

The PDP-8 handbooks are probably the best / only definitive architectural 
specification.


The PDP-8e processor maintenance manual:

http://bitsavers.trailing-edge.com/pdf/dec/pdp8/pdp8e/DEC-8E-HMM1A-D-D_PDP-8e_Maintenance_Manual_Volume_1_Processor_Sep73.pdf

is a pretty detailed implementation reference. Chapter 3 section 2 is a very 
detailed reference on the instruction fetch/decode/execute flow.


Don






PDP-8 diagnostic tests

2016-08-23 Thread Scott Baker
Hi,

I have written a PDP-8 VHDL model and I have it running in an FPGA
https://github.com/scottlbaker/PDP8-SOC

At this time it has passed a basic DEC diagnostic instruction test but
I found some interesting things when getting that instruction test to pass.
For example:

The following segment of code implies that IAC instruction affects the Link
bit

 1797 /GROUP 1 OPERATE TEST 33
 1798 02626 7300  CLA CLL /AC= LINK=0
 1799 02627 1053  TAD K2525   /AC=2525
 1800 02630 7261  CLA CMA CML IAC /TEST COMBINATION
 1801 02631 7420  SNL
 1802 02632 7430  SZL
 1803 02633 7402  HLT /CLA CMA CML IAC FAILED, AC SHOULD
 1804 /BE , LINK SHOULD BE ZERO

but the PDP-8 Handbook  ; DEC copyright 1966; page 14
says nothing about the Link bit being affected by the IAC instruction.

The simh PDP-8 simulator also shows that L is affected by IAC.

If I change this test line from

 1800 02630 7261  CLA CMA CML IAC /TEST COMBINATION  << link=0

to:

 1800 02630 7261  CLA CMA CML  /TEST COMBINATION  << link=1

Can anyone point me to:

1) DEC documentation which more fully describes all the instruction set (in
more detail  than the PDP-8 handbook)

2) Some more instruction tests in assembler source code format. I have
found lots of binary files but I would prefer assembler source code format.
I am using a pal compatible cross assembler.

Thanks and Regards,
Scott