Re: Core memory emulator using non volatile ram.
> On Dec 16, 2018, at 10:49 PM, Rod G8DGR via cctech > wrote: > > > I’m trying to make a look and feel reproduction PDP-8/e. > So the memory characteristics need to be as close as possible. > > An original ( and I do have one) and the copy when placed side by side > should run in sync. > When executing he same code – What code I couldn’t care. > > Rod All you need for that to be true is to use the same bus timing as the original. What happens behind the scenes is unimportant. At LCM while restoring their CDC 6500 they built replacement memory modules, which actually mimic not just core memory cycle timing but also core memory waveforms -- which took some fiddling with pulse transformers. But behind the interface logic there's simple modern memory, probably SRAM, I forgot. paul
RE: Core memory emulator using non volatile ram.
Sent from Mail for Windows 10 From: ben via cctech Sent: 17 December 2018 03:08 To: cctech@classiccmp.org Subject: Re: Core memory emulator using non volatile ram. On 12/16/2018 8:00 PM, allison via cctech wrote: > In the end, current generation CMOS ram is the easy out, battery is > small, cost is small, and > produces much less of the heat that is killer to systems. The only > reason to do that is core > cost big if you can find it for your machine. I can cost more if you > want to run an OS that > needs a fair amount of it. AC as well as it can help heat the room and > also power as in > makes the meter spin. > > So much lathering and speculation about what and how. When the point is > totally missed. > > Allison > What programs or operating sytems require non volatile core? Did DEC have any BOOTSTRAP programs in prom for the 8? A small prom and regular slow mos memory may be the solution. Ben. I’m trying to make a look and feel reproduction PDP-8/e. So the memory characteristics need to be as close as possible. An original ( and I do have one) and the copy when placed side by side should run in sync. When executing he same code – What code I couldn’t care. Rod
Re: Core memory emulator using non volatile ram.
> On Dec 16, 2018, at 8:21 PM, allison via cctech wrote: > > On 12/15/2018 03:51 PM, Jon Elson via cctech wrote: >> On 12/15/2018 02:45 PM, Anders Nelson via cctalk wrote: >>> Serial flash has an endurance between 10K-100K writes per cell so I >>> think >>> that would break down quickly. Wear-leveling on a serial device would be >>> very slow... >>> >>> >> If you intend to use it as main core memory on an old CPU, it will >> perform VERY poorly, as these memories need to erase a page at a time, >> and the erase takes milliseconds. So, writing ONE SINGLE word at a >> time would invoke an erase cycle each time, slowing it to 1/1000 or >> worse the speed of the original core memory. Also, most old CPUs have >> the memory timing built into the CPU, and can't handle a memory that >> says "wait". >> >> Jon > The only place where Flash or similar tech fits is applied to the mass > storage problem such as replicating > a RF/DF32 multihead disk. > > The cycle life is a limiting factor for things like swapping drums/disks > but for something that's > read mostly its ok. Frankly even in those applications (RF11/DF32) I’d use MRAM (available in 2Mx8) rather than FLASH because (a) it’s byte addressable (b) it has unlimited write endurance (c) it looks like SRAM so there’s no erase cycle (or blocks) to deal with so it makes the hardware easier (e.g. it should be possible to implement one of those controllers just with logic and not require a microprocessor). BTW, that’s what I use for the emulators that I’m working on (when I have time…in short supply at the moment). I also use them even when I do use FLASH as I can use it as a buffer/cache to help absorb some of the write/overwrite cycles and to be able to handle (non-volatile) full FLASH block operations and for wear leveling (tracking and block remapping). That way I don’t have to deal with a PMIC and battery. MRAMs also have a >20 year data retention as well (something you don’t have with a battery…if the battery dies, you loose everything). TTFN - Guy
Re: Core memory emulator using non volatile ram.
I put focal in it...I leave focal in it... then I turn on the power it talks focal to a tty! ( for grains want copy of focal 11 for the 11/20 too...) But definitely want to see focal on a little omnibus 8! Just like that famous night in 1979.. Life is good Ed# In a message dated 12/16/2018 8:08:01 PM US Mountain Standard Time, cctech@classiccmp.org writes: What programs or operating sytems require non volatile core? Did DEC have any BOOTSTRAP programs in prom for the 8? A small prom and regular slow mos memory may be the solution. Ben.
Re: Core memory emulator using non volatile ram.
On 12/15/2018 03:51 PM, Jon Elson via cctech wrote: > On 12/15/2018 02:45 PM, Anders Nelson via cctalk wrote: >> Serial flash has an endurance between 10K-100K writes per cell so I >> think >> that would break down quickly. Wear-leveling on a serial device would be >> very slow... >> >> > If you intend to use it as main core memory on an old CPU, it will > perform VERY poorly, as these memories need to erase a page at a time, > and the erase takes milliseconds. So, writing ONE SINGLE word at a > time would invoke an erase cycle each time, slowing it to 1/1000 or > worse the speed of the original core memory. Also, most old CPUs have > the memory timing built into the CPU, and can't handle a memory that > says "wait". > > Jon The only place where Flash or similar tech fits is applied to the mass storage problem such as replicating a RF/DF32 multihead disk. The cycle life is a limiting factor for things like swapping drums/disks but for something that's read mostly its ok. Core is RAM, and not serial anyway. Allison
Re: Core memory emulator using non volatile ram.
On 12/16/2018 10:07 PM, ben via cctech wrote: > On 12/16/2018 8:00 PM, allison via cctech wrote: > >> In the end, current generation CMOS ram is the easy out, battery is >> small, cost is small, and >> produces much less of the heat that is killer to systems. The only >> reason to do that is core >> cost big if you can find it for your machine. I can cost more if you >> want to run an OS that >> needs a fair amount of it. AC as well as it can help heat the room and >> also power as in >> makes the meter spin. >> >> So much lathering and speculation about what and how. When the point is >> totally missed. >> >> Allison >> > > What programs or operating sytems require non volatile core? > Did DEC have any BOOTSTRAP programs in prom for the 8? > A small prom and regular slow mos memory may be the solution. > Ben. > None. Non volitility was handy if you wanted to power down go home and restart where you were the next day but at the OS level that was never a consideration. CMOS is MOS! Current generation parts are cheap and easy to use. Its not a speed issue as core was so slow, PDP-8 the fastest core was 1.5uS and even current cmos (5101) was under 1uS. No advanatage for slow memory as everything from 1978 on was likely much faster than an 8e needed anyway. The easy way if obvious use cmos as its cheap and common as house flies. Leave out the small lithium cell. The problem is PROM cards for PDP-8 omnibus was not common at at then then time cheap and used parts likely to be unobtainium now. The machines that had it used an abbreviated front panel maybe 12 sense switches for the OSR instruction and a boot/start switch. Not many made and FS contract required the full panel to do checkout and fix. So cost wise the boot card was not common. Call it an artifact of systems then. The loader for most stuff was small anyway, toggle it in, usually rim or bin loaders. Run the reader and that loaded whatever. Typical small non disk systems were CPU, TTY and maybe a high speed reader. Next level added TU56 or maybe RX01 floppy, from there a DF32 disk and maybe a RK05 or two. The user interacted with them the box ala the CPU was a small part of that interaction/experience. Allison
Re: Core memory emulator using non volatile ram.
On 12/16/2018 8:00 PM, allison via cctech wrote: In the end, current generation CMOS ram is the easy out, battery is small, cost is small, and produces much less of the heat that is killer to systems. The only reason to do that is core cost big if you can find it for your machine. I can cost more if you want to run an OS that needs a fair amount of it. AC as well as it can help heat the room and also power as in makes the meter spin. So much lathering and speculation about what and how. When the point is totally missed. Allison What programs or operating sytems require non volatile core? Did DEC have any BOOTSTRAP programs in prom for the 8? A small prom and regular slow mos memory may be the solution. Ben.
Re: Core memory emulator using non volatile ram.
On 12/15/2018 09:32 PM, Charles Anthony via cctech wrote: > On Sat, Dec 15, 2018 at 6:15 PM Rod G8DGR via cctalk > wrote: > >> All very interesting.. 1201 alarm while I deal will all of the information >> Rod >> >> > 1202 coming up... > > I don't know specifically about the various memory types being bandied > about, but I do know that the destructive read behavior of core memory my > be required for some architectures; "load and clear" type instructions rely > on the suppressing the write-after-read cycle to make the instruction > atomic, allowing the implementation of data locking instructions. For some > architectures, it may be that any replacement memory would have to support > the suppression signal to work correctly. > > -- Charles That's all fairy land speculation and guessing. The person that started this is working with a PDP-8E so the above does not apply. the 8E and later had both DEC made ram and third parties did when 2102 were cheap enough about 78ish. Later it was battery backed up cmos. For system with disk a rom based booter was enough as who cares if the ram held valid stuff. As to realism, the cost of a core was high enough then if it broke or worse now if it breaks its out of sight. Breakage back then was costly, not its possibly unobtainium. The for the most part with the covers on the only thing noted was binary blisters from the switches and the incessant loud fans. In the mean time the user was interacting with a TTY with its notable noises and if needing service a sometimes bad attitude. The fact that CORE does a R-Rewrite or RMW cycle is both unseen without a scope and had no impact while running a file though PAL-III in all caps. In the end, current generation CMOS ram is the easy out, battery is small, cost is small, and produces much less of the heat that is killer to systems. The only reason to do that is core cost big if you can find it for your machine. I can cost more if you want to run an OS that needs a fair amount of it. AC as well as it can help heat the room and also power as in makes the meter spin. So much lathering and speculation about what and how. When the point is totally missed. Allison
RE: Core memory emulator using non volatile ram.
Sent from Mail for Windows 10 From: Jon Elson via cctech Sent: 16 December 2018 16:43 To: Rod G8DGR; gene...@ezwind.net; discuss...@ezwind.net:On-Topic Posts Subject: Re: Core memory emulator using non volatile ram. On 12/15/2018 11:19 PM, Rod G8DGR via cctech wrote: > > > However I began to think would it be possible to create a close copy of an > 8/e out of modern parts. > > > Finally the big one – Omnibus and the connectors its made from. A 3D printing > candidate? > I’m going to autopsy a busted connector and see how they are constructed > inside. Yup, this will be a problem. A couple decades ago, there was a very common technology, press-fit backplanes. You made a PC board with all the interconnect on it (power + signals) and pressed-in contact fingers. Then, connector housings were pressed onto the contacts. I don't know if anybody still makes these contacts. It would be hugely expensive to have custom ones made, but if they are still being made they might not be too bad. I'm not sure 3D-printed housings would be strong enough for this, but maybe if ABS they would. Of course, there might actually still be somebody making clones of the DEC connectors. They used basically the same design for PDP-8, PDP-11, KL10, VAX, etc. Certainly, there were people cloning them back in the 1980's. Winchester made the official ones for DEC. > Objectives > The basic board set as original. M8300, M8310, M8320 etc. > Same form factor > Plug compatible – but board contents can differ from original Well, this could all be done with one FPGA, but if you want to do each PC board separately, a modest CPLD or small FPGA would certainly do each board's functionality. Jon TTL I understand. FPGA == Black Magic and Snake OiI to me. Rod
Re: Core memory emulator using non volatile ram.
On 12/15/2018 11:19 PM, Rod G8DGR via cctech wrote: However I began to think would it be possible to create a close copy of an 8/e out of modern parts. Finally the big one – Omnibus and the connectors its made from. A 3D printing candidate? I’m going to autopsy a busted connector and see how they are constructed inside. Yup, this will be a problem. A couple decades ago, there was a very common technology, press-fit backplanes. You made a PC board with all the interconnect on it (power + signals) and pressed-in contact fingers. Then, connector housings were pressed onto the contacts. I don't know if anybody still makes these contacts. It would be hugely expensive to have custom ones made, but if they are still being made they might not be too bad. I'm not sure 3D-printed housings would be strong enough for this, but maybe if ABS they would. Of course, there might actually still be somebody making clones of the DEC connectors. They used basically the same design for PDP-8, PDP-11, KL10, VAX, etc. Certainly, there were people cloning them back in the 1980's. Winchester made the official ones for DEC. Objectives The basic board set as original. M8300, M8310, M8320 etc. Same form factor Plug compatible – but board contents can differ from original Well, this could all be done with one FPGA, but if you want to do each PC board separately, a modest CPLD or small FPGA would certainly do each board's functionality. Jon
Re: Core memory emulator using non volatile ram.
Anyone building 8 omnibus batter backed up core replacement currently that is available off the shelf reasonably for 8 m,e and f? (( Smaller size board than the 8a would accept for memory as I remember..)) Have a 8 m or f in my den on a shelf... as as I best remember it 20 years ago had 4 k or flaky core in it. might be fun to play with. Alas there might me other things wrong on other boards by now too Ed# In a message dated 12/16/2018 6:44:55 AM US Mountain Standard Time, cct...@classiccmp.org writes: On 12/15/2018 01:01 PM, Guy Sotomayor Jr via cctech wrote: > FRAM or MRAM. I make extensive use of them in my projects. > > Everspin has a few (all SMT and 3.3v). As I recall they run ~$20/ea for 4Mb > (512K x 8 or 256K x 16). > > TTFN - Guy > >> On Dec 15, 2018, at 1:22 AM, Rod G8DGR via cctalk >> wrote: >> >> I have an idea to produce an MM-8 clone using RAM that acts like core when >> turned off. >> Can anybody suggest a chip that will do this? >> >> Rod Smallwood >> >> My call on this is that cmos static ram 4Bit wide does the job well I have 32K of it in my PDP-8 to get past possible failure of hard to find and get core. A Panasonic BR-1 lithium cell has enough capacity at the measured drain for about 6-7 years and the Dallas power management chip makes it a non hack. Flash, EEprom and Magnetic FRAM and MRAM) types have many unacceptable properties for a random access read write memory. It makes no difference to the PDP8(ILEFMA) that read is not destructive as it will write back as needed anyway. There is a design on the 'net for using CMOS ram in a straight forward buildable array for Omnibus with battery back up that is fine. Don;t get wraped around the axle about RMW as any sufficiently fast ram can do that without wearout. And compared to core it doesn't take much speed. EEprom and Flash work fine for read mostly disks or disk simulators. Allison
RE: Core memory emulator using non volatile ram.
Sent from Mail for Windows 10 From: allison via cctech Sent: 16 December 2018 03:08 To: cctech@classiccmp.org Subject: Re: Core memory emulator using non volatile ram. On 12/15/2018 01:01 PM, Guy Sotomayor Jr via cctech wrote: > FRAM or MRAM. I make extensive use of them in my projects. > > Everspin has a few (all SMT and 3.3v). As I recall they run ~$20/ea for 4Mb > (512K x 8 or 256K x 16). > > TTFN - Guy > >> On Dec 15, 2018, at 1:22 AM, Rod G8DGR via cctalk >> wrote: >> >> I have an idea to produce an MM-8 clone using RAM that acts like core when >> turned off. >> Can anybody suggest a chip that will do this? >> >> Rod Smallwood >> >> My call on this is that cmos static ram 4Bit wide does the job well I have 32K of it in my PDP-8 to get past possible failure of hard to find and get core. A Panasonic BR-1 lithium cell has enough capacity at the measured drain for about 6-7 years and the Dallas power management chip makes it a non hack. Flash, EEprom and Magnetic FRAM and MRAM) types have many unacceptable properties for a random access read write memory. It makes no difference to the PDP8(ILEFMA) that read is not destructive as it will write back as needed anyway. There is a design on the 'net for using CMOS ram in a straight forward buildable array for Omnibus with battery back up that is fine. Don;t get wraped around the axle about RMW as any sufficiently fast ram can do that without wearout. And compared to core it doesn't take much speed. EEprom and Flash work fine for read mostly disks or disk simulators. Allison Sheesh!! Well what a response. This stems from my (so far) successful major over haul of my PDP-8/e. I found one failed 7474 and one failed 8881 – replaced and now working. I think I have the rim loader toggled in and will attempt to send a paper tape image from Hyperterm Strangely I do have at least three genuine complete 4k memory sets. However I began to think would it be possible to create a close copy of an 8/e out of modern parts. As you all know I make front panels so that’s not a problem. I did manage to copy my (distorted) bezel in resin. A friend has been able to 3D print toggle switch leavers that fit and work. Vince Sylngstat has done a console board PCB layout. Power supply clearly not a problem. So what’s left? Case? Well I have one of those and I suspect a sheet metal shop would not have a problem Finally the big one – Omnibus and the connectors its made from. A 3D printing candidate? I’m going to autopsy a busted connector and see how they are constructed inside. Objectives The basic board set as original. M8300, M8310, M8320 etc. Same form factor Plug compatible – but board contents can differ from original The idea is replace one item at time until you no longer have any DEC parts. Yup a FAKE-8 I may even need a label “No part in this PDP-8/e computer was manufactured by digital equipment corporation” Rod Smallwood
Re: Core memory emulator using non volatile ram.
> On Dec 15, 2018, at 7:09 PM, allison via cctech wrote: > > On 12/15/2018 01:01 PM, Guy Sotomayor Jr via cctech wrote: >> FRAM or MRAM. I make extensive use of them in my projects. >> >> Everspin has a few (all SMT and 3.3v). As I recall they run ~$20/ea for 4Mb >> (512K x 8 or 256K x 16). >> >> TTFN - Guy >> >>> On Dec 15, 2018, at 1:22 AM, Rod G8DGR via cctalk >>> wrote: >>> >>> I have an idea to produce an MM-8 clone using RAM that acts like core when >>> turned off. >>> Can anybody suggest a chip that will do this? >>> >>> Rod Smallwood >>> >>> > Flash, EEprom and Magnetic FRAM and MRAM) types > have many unacceptable > properties for a random access read write memory. I think you’re mistaken about FRAM and MRAM. They are byte oriented devices and are designed to replace SRAM + battery. Which in my mind makes them preferable as they reduce parts count. The current MRAM has unlimited write endurance (same as SRAM) and depending upon the part is 35-55ns access/cycle time. FRAM has a similar access time but requires an internal restore so it’s cycle time is about 2x (one of the reasons I prefer MRAM now). TTFN - Guy
Re: Core memory emulator using non volatile ram.
On 12/15/2018 01:01 PM, Guy Sotomayor Jr via cctech wrote: > FRAM or MRAM. I make extensive use of them in my projects. > > Everspin has a few (all SMT and 3.3v). As I recall they run ~$20/ea for 4Mb > (512K x 8 or 256K x 16). > > TTFN - Guy > >> On Dec 15, 2018, at 1:22 AM, Rod G8DGR via cctalk >> wrote: >> >> I have an idea to produce an MM-8 clone using RAM that acts like core when >> turned off. >> Can anybody suggest a chip that will do this? >> >> Rod Smallwood >> >> My call on this is that cmos static ram 4Bit wide does the job well I have 32K of it in my PDP-8 to get past possible failure of hard to find and get core. A Panasonic BR-1 lithium cell has enough capacity at the measured drain for about 6-7 years and the Dallas power management chip makes it a non hack. Flash, EEprom and Magnetic FRAM and MRAM) types have many unacceptable properties for a random access read write memory. It makes no difference to the PDP8(ILEFMA) that read is not destructive as it will write back as needed anyway. There is a design on the 'net for using CMOS ram in a straight forward buildable array for Omnibus with battery back up that is fine. Don;t get wraped around the axle about RMW as any sufficiently fast ram can do that without wearout. And compared to core it doesn't take much speed. EEprom and Flash work fine for read mostly disks or disk simulators. Allison
