Re: TRS-80 Question

2022-04-19 Thread Charles Dickman via cctech
On Tue, Apr 12, 2022 at 3:46 PM Fred Cisin via cctech 
wrote:

> >> There's a 2K hole in the Model I memory map above the ROM
> On Tue, 12 Apr 2022, Yeechang Lee via cctech wrote:
> > Is this the hole that causes stock Model I to not run CP/M?
>
> NO.
> The problem with CP/M on TRS80 is that CP/M expects RAM from location 0 on
> up.


When I was a freshman at Purdue, I lugged my Model III to my dorm room and
connected to the ECN network with a 300 baud modem. I used a local editor
and wrote a Pascal program to upload my Pascal source to the dual processor
VAX-11/780 (Google George Goble), ea or eb, (I don't remember) that was
used by our introductory programming class. The terminal program I had was
something I found in Byte magazine in assembler and I modified it for the
TRS-80. I had BASIC, Assembler and Fortran on the TRS-80 M III, so it was
probably all in assembly.

There was an article in Byte about CP/M for the TRS-80 Model III that
described a hack to swap the ROM for RAM. The idea was to invert bits A15
and A14. That would move the ROM and keyboard from  to C000. There was
a spare bit in some 4 bit register, so all you had to do was cut a couple
traces and insert some XOR gates. I remember doing the modification on a
Saturday while listening to the Purdue football game on the radio. I put it
all back together and it worked. WoHo!

At that point though I had no access to CP/M or where I might get it legal
or otherwise, but I was good to go when I found it.

I still have the computer and I still have the Byte copy. So 37 years later
I should try to complete the project.

-chuck


Re: TRS-80 Question

2022-04-12 Thread Fred Cisin via cctech

There's a 2K hole in the Model I memory map above the ROM

On Tue, 12 Apr 2022, Yeechang Lee via cctech wrote:

Is this the hole that causes stock Model I to not run CP/M?


NO.
The problem with CP/M on TRS80 is that CP/M expects RAM from location 0 on 
up.
Location 0 - FFh are used as a data structure for running programs, with 
location 100h and up as the "transient Program Area", where programs load 
and run.

TRS80 has ROM in bottom 16K.

There did exist MODIFIED CP/M ("FMG") that loaded above ROM, and ran 
programs that weren't too "hard-wired" to expect specific load location.


Parasitic Engineering (Howard Fullmer) and Omikron Mapper both made 
sandwich boards for the model 1 that moved things (under software control) 
to run "real" CP/M.  They both ALSO sold 8" drive conversions for the 
Expansion Interface.


--
Grumpy Ol' Fred ci...@xenosoft.com


Re: TRS-80 Question

2022-04-12 Thread Will Cooke via cctech



> On 04/12/2022 2:11 PM Yeechang Lee via cctech  wrote:
> 
> 
> Eric Dittman says:
> > There's a 2K hole in the Model I memory map above the ROM
> Is this the hole that causes stock Model I to not run CP/M?
> 

The ROM at address 0 is the bigger issue.  CP/M requires RAM starting at 
address 0.


Re: TRS-80 Question

2022-04-12 Thread Yeechang Lee via cctech
Eric Dittman says:
> There's a 2K hole in the Model I memory map above the ROM

Is this the hole that causes stock Model I to not run CP/M?

-- 
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