https://github.com/tblah requested changes to this pull request.
Thanks for this!
Please could you also add testing in flang/Driver/frontend-forwarding.f90,
flang/test/HLFIR/hlfir-flang.f90
https://github.com/llvm/llvm-project/pull/71820
___
@@ -1073,6 +1073,12 @@ bool CompilerInvocation::createFromArgs(
res.loweringOpts.setLowerToHighLevelFIR(true);
}
+ // -flang-deprecated-no-hlfir
+ if (args.hasArg(clang::driver::options::OPT_flang_deprecated_no_hlfir) &&
+
Author: nvartolomei
Date: 2023-11-09T18:18:40+01:00
New Revision: 6fdb1bfbc7846f9978fe98c658deb440534d2ca0
URL:
https://github.com/llvm/llvm-project/commit/6fdb1bfbc7846f9978fe98c658deb440534d2ca0
DIFF:
https://github.com/llvm/llvm-project/commit/6fdb1bfbc7846f9978fe98c658deb440534d2ca0.diff
https://github.com/PiotrZSL closed
https://github.com/llvm/llvm-project/pull/71586
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gedare wrote:
force push was required to layer the revert commit correctly.
https://github.com/llvm/llvm-project/pull/69340
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@@ -2794,6 +2794,14 @@ void ItaniumCXXABI::registerGlobalDtor(CodeGenFunction
, const VarDecl ,
if (D.isNoDestroy(CGM.getContext()))
return;
+ // OpenMP offloading supports C++ constructors and destructors but we do not
+ // always have 'atexit' available. Instead
https://github.com/gedare updated
https://github.com/llvm/llvm-project/pull/69340
>From 610d0b544d7927af93b6943078df033f154b74f8 Mon Sep 17 00:00:00 2001
From: Gedare Bloom
Date: Thu, 9 Nov 2023 09:30:24 -0700
Subject: [PATCH 1/2] Revert "Revert "[clang-format] Fix align consecutive
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/71739
>From 45a645c4e65d3b1f98dee23c2eba1cf6db99bff0 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Tue, 7 Nov 2023 17:12:31 -0600
Subject: [PATCH] [OpenMP] Rework handling of global ctor/dtors in OpenMP
Summary:
https://github.com/rtayl updated https://github.com/llvm/llvm-project/pull/71420
>From 284c04113dcb3d683e8eaad3242d5bc5d0b4987d Mon Sep 17 00:00:00 2001
From: Ryan Taylor
Date: Mon, 6 Nov 2023 10:54:17 -0500
Subject: [PATCH] [RISCV] Add bset optimization for left shift code
Changes:
li a1,
spavloff wrote:
`pragma pack` uses pragma stack and it is allowed in any place:
https://godbolt.org/z/f8fP1vn63 . If such pragma presents in the late-parsed
template, and push-pop operations in it are not balanced, the late parse of
such function can break the pragma stack and next templates
https://github.com/simpal01 updated
https://github.com/llvm/llvm-project/pull/71545
>From c7c02e2bea3cb6fb674a5e568b7d14998776c00f Mon Sep 17 00:00:00 2001
From: Simi Pallipurath
Date: Tue, 7 Nov 2023 13:05:08 +
Subject: [PATCH] [ARM] .fpu equals fpv5-d16 disables floating point MVE which
https://github.com/MDevereau updated
https://github.com/llvm/llvm-project/pull/71795
>From 9846bc9efd79e6e3c2662ea42367c102df88799d Mon Sep 17 00:00:00 2001
From: Matt Devereau
Date: Thu, 9 Nov 2023 10:50:05 +
Subject: [PATCH 1/3] [AArch64][SME2] Add ldr_zt, str_zt builtins and
intrinsics
llvmbot wrote:
@llvm/pr-subscribers-clang-driver
Author: None (jeanPerier)
Changes
Patch 1/3 of the transition to use the HLFIR step by default in lowering as
described in
https://discourse.llvm.org/t/rfc-enabling-the-hlfir-lowering-by-default/72778/7
This option will allow to lower
https://github.com/jeanPerier created
https://github.com/llvm/llvm-project/pull/71820
Patch 1/3 of the transition to use the HLFIR step by default in lowering as
described in
https://discourse.llvm.org/t/rfc-enabling-the-hlfir-lowering-by-default/72778/7
This option will allow to lower code
gedare updated this revision to Diff 558064.
gedare added a comment.
Rebase to main. Fix up use of TT_AttributeParen.
Repository:
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CHANGES SINCE LAST ACTION
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https://reviews.llvm.org/D155529
Files:
https://github.com/topperc commented:
Do we need to add the "experimental" feature to RISCVFeatures.td? If the
feature string shows up in the function attributes, won't the backend print
that it doesn't recognize the feature name when it parses the string?
iains wrote:
> > clang++ -std=c++20 foo.cpp -c -fmodule-file=X=some/dir/X.pcm
>
> Hm, according to https://clang.llvm.org/docs/StandardCPlusPlusModules.html
> this can already be achieved with the `-fmodule-output` option (and which I
> was about to try in `build2`). Is there a reason a
iains wrote:
Let us try to determine fundamental constraints.
To produce a BMI (David's ImplementationBMI) that can generate the object file,
it must contain all the AST.
this is equivalent to hypothetical ` clang++ -x c++-module foo.cpp
--prepcompile -fmodule-file=X=X-implementation.pcm`
https://github.com/KanRobert approved this pull request.
LGTM. Maybe we can add some explanations about why we add attribute
`no-evex512` for intrinsics in the description of the PR. It's a little tricky.
https://github.com/llvm/llvm-project/pull/71318
https://github.com/rapidsna approved this pull request.
Thank you! LGTM.
https://github.com/llvm/llvm-project/pull/70606
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@@ -131,35 +135,50 @@ bool X86TargetInfo::initFeatureMap(
continue;
}
-if (Feature.substr(0, 7) == "+avx10.") {
- HasAVX10 = true;
- HasAVX512F = true;
- if (Feature.substr(Feature.size() - 3, 3) == "512") {
-HasEVEX512 = true;
- }
https://github.com/balazske updated
https://github.com/llvm/llvm-project/pull/71392
From e92bf72fc80bb6823996cb71cb811d238b304aaa Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bal=C3=A1zs=20K=C3=A9ri?=
Date: Thu, 2 Nov 2023 18:12:32 +0100
Subject: [PATCH 1/3] [clang][analyzer] Improve 'errno'
martinboehme wrote:
> Could you merge for me? I don't have write access.
Done!
https://github.com/llvm/llvm-project/pull/71573
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Author: Samira Bazuzi
Date: 2023-11-09T16:57:04+01:00
New Revision: 3001d6ddaa7809274e49b794cb7ec07d21da130e
URL:
https://github.com/llvm/llvm-project/commit/3001d6ddaa7809274e49b794cb7ec07d21da130e
DIFF:
https://github.com/llvm/llvm-project/commit/3001d6ddaa7809274e49b794cb7ec07d21da130e.diff
bazuzi wrote:
Could you merge for me? I don't have write access.
https://github.com/llvm/llvm-project/pull/71573
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simpal01 wrote:
> I think the commit title would make more sense at a glance if it was saying
> what is being done instead of what's being fixed. How about:
>
> ```
> [llvm][ARM] Emit MVE .arch_extension after .fpu directive if it does not
> include MVE features
> ```
>
> Then the commit
simpal01 wrote:
> I think the commit title would make more sense at a glance if it was saying
> what is being done instead of what's being fixed. How about:
>
> ```
> [llvm][ARM] Emit MVE .arch_extension after .fpu directive if it does not
> include MVE features
> ```
>
> Then the commit
gedare added a comment.
@MyDeveloperDay ping
I have rebased to main without any problems. This patch fixes the bug.
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@@ -0,0 +1,56 @@
+; REQUIRES: arm-registered-target
+; RUN: %clang --target=arm-none-eabi -mcpu=cortex-m85 -mfloat-abi=hard
-save-temps=obj -S -o - %s | FileCheck %s
+; RUN: %clang --target=arm-none-eabi -mcpu=cortex-m55 -mfloat-abi=hard
-save-temps=obj -S -o - %s | FileCheck
gedare updated this revision to Diff 558063.
gedare added a comment.
Rebase to main
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Files:
clang/lib/Format/ContinuationIndenter.cpp
jyu2-git wrote:
Hi @efriedma-quic,
Thanks for looking into this. First for test case:
We are having difficult to reproduce the problem with small test case, the
error come from very big application, which related various heuristics to
trigger in a specific way to get the symbol renaming to
vpykhtin wrote:
Guys, I really need this change submitted, I'm going to submit it on monday if
there're no objections.
https://github.com/llvm/llvm-project/pull/69375
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gedare abandoned this revision.
gedare added a comment.
This is not needed due to https://github.com/llvm/llvm-project/pull/70768
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gedare updated this revision to Diff 558061.
gedare added a comment.
Add TokenAnnotator tests and light refactoring.
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CHANGES SINCE LAST ACTION
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Files:
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Jake Egan (jakeegan)
Changes
We now have 64-bit XCOFF object file support, so these tests can be enabled
again. However, some tests still fail due to unsupported debug sections, so I
cleaned up their comments.
---
Patch is 24.37 KiB,
https://github.com/jakeegan created
https://github.com/llvm/llvm-project/pull/71814
We now have 64-bit XCOFF object file support, so these tests can be enabled
again. However, some tests still fail due to unsupported debug sections, so I
cleaned up their comments.
>From
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/71739
>From c3df637dd2cb9a5210cb90a3bb69a63c31236039 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Tue, 7 Nov 2023 17:12:31 -0600
Subject: [PATCH] [OpenMP] Rework handling of global ctor/dtors in OpenMP
Summary:
@@ -3,13 +3,9 @@
readability-container-data-pointer
==
-Finds cases where code could use ``data()`` rather than the address of the
-element at index 0 in a container. This pattern is commonly used to materialize
-a pointer to the backing data
https://github.com/EugeneZelenko edited
https://github.com/llvm/llvm-project/pull/71304
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https://github.com/EugeneZelenko requested changes to this pull request.
https://github.com/llvm/llvm-project/pull/71304
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asb wrote:
Tagging @MaskRay for a quick check of this too, if he has time.
https://github.com/llvm/llvm-project/pull/71803
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yxsamliu wrote:
ping
This patch passes our internal CI.
https://github.com/llvm/llvm-project/pull/70369
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https://github.com/MDevereau updated
https://github.com/llvm/llvm-project/pull/71795
>From 9846bc9efd79e6e3c2662ea42367c102df88799d Mon Sep 17 00:00:00 2001
From: Matt Devereau
Date: Thu, 9 Nov 2023 10:50:05 +
Subject: [PATCH 1/2] [AArch64][SME2] Add ldr_zt, str_zt builtins and
intrinsics
phoebewang wrote:
> I'm a little bit confused, What's the expected behavior of `+avx10.1-512
> -avx10.1-256` in codegen aspect? Should we generate only instructions in the
> difference of sets? Or do we consider `avx10.1-256` as a base of
> `avx10.1-512` and if it is disabled `avx10.1-512`
pasaulais wrote:
@arsenm, could you share this unfinished patch you were working on? I could
start from scratch but I don't want to duplicate the work you've already done.
https://github.com/llvm/llvm-project/pull/69229
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@@ -131,35 +135,50 @@ bool X86TargetInfo::initFeatureMap(
continue;
}
-if (Feature.substr(0, 7) == "+avx10.") {
- HasAVX10 = true;
- HasAVX512F = true;
- if (Feature.substr(Feature.size() - 3, 3) == "512") {
-HasEVEX512 = true;
- }
@@ -50,11 +50,11 @@ typedef __bf16 __m128bh __attribute__((__vector_size__(16),
__aligned__(16)));
/* Define the default attributes for the functions in this file. */
#define __DEFAULT_FN_ATTRS
\
-
@@ -15,8 +15,12 @@
#define __AVX2INTRIN_H
/* Define the default attributes for the functions in this file. */
-#define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__,
__target__("avx2"), __min_vector_width__(256)))
-#define __DEFAULT_FN_ATTRS128
@@ -119,9 +119,13 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabled(Features, F, true);
std::vector UpdatedFeaturesVec;
- bool HasEVEX512 = true;
+ std::vector UpdatedAVX10FeaturesVec;
+ int HasEVEX512 = -1;
phoebewang wrote:
I think it's
@@ -9497,8 +9500,11 @@ Value *CodeGenFunction::EmitSVEScatterStore(const
SVETypeFlags ,
// mapped to . However, this might be incompatible with the
// actual type being stored. For example, when storing doubles (i64) the
// predicated should be instead. At the IR level
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/71318
>From d9ee6309924e7f248695cbd488afe98273432e84 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Sun, 5 Nov 2023 21:15:53 +0800
Subject: [PATCH 1/3] [X86][AVX10] Permit AVX512 options/features used together
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Timm Baeder (tbaederr)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/71807.diff
2 Files Affected:
- (modified) clang/lib/AST/Interp/IntegralAP.h (+3-5)
- (modified) clang/test/AST/Interp/intap.cpp (+9)
https://github.com/tbaederr created
https://github.com/llvm/llvm-project/pull/71807
None
>From 4d13e7b92c5d6bf08554a2e251ba65b8f433fb87 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Timm=20B=C3=A4der?=
Date: Thu, 9 Nov 2023 14:29:51 +0100
Subject: [PATCH] [clang][Interp] Implement bitwise
@@ -420,6 +452,38 @@ let TargetGuard = "sve,bf16" in {
def SVSTNT1_VNUM_BF : MInst<"svstnt1_vnum[_{d}]", "vPpld", "b", [IsStore],
MemEltTyDefault, "aarch64_sve_stnt1">;
}
+let TargetGuard = "sve2p1" in {
+ // Contiguous truncating store from quadword (single vector).
+
@@ -1457,6 +1457,24 @@ class AdvSIMD_GatherLoad_VS_Intrinsic
],
[IntrReadMem]>;
+class AdvSIMD_GatherLoadQ_VS_Intrinsic
+: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+[
+ llvm_nxv1i1_ty,
+
@@ -420,6 +452,38 @@ let TargetGuard = "sve,bf16" in {
def SVSTNT1_VNUM_BF : MInst<"svstnt1_vnum[_{d}]", "vPpld", "b", [IsStore],
MemEltTyDefault, "aarch64_sve_stnt1">;
}
+let TargetGuard = "sve2p1" in {
+ // Contiguous truncating store from quadword (single vector).
+
https://github.com/CarolineConcatto commented:
Hey Momchil,
Thank you for the work. I left some comments.
I did not finish it all. I still need to check the stores. But I will wait for
the answers in the load, so I can keep checking the store.
https://github.com/llvm/llvm-project/pull/71290
@@ -298,6 +298,38 @@ let TargetGuard = "sve,bf16" in {
def SVBFMLALT_LANE : SInst<"svbfmlalt_lane[_{0}]", "MMddi", "b", MergeNone,
"aarch64_sve_bfmlalt_lane_v2", [IsOverloadNone], [ImmCheck<3, ImmCheck0_7>]>;
}
+let TargetGuard = "sve2p1" in {
+ // Contiguous
@@ -9497,8 +9500,11 @@ Value *CodeGenFunction::EmitSVEScatterStore(const
SVETypeFlags ,
// mapped to . However, this might be incompatible with the
// actual type being stored. For example, when storing doubles (i64) the
// predicated should be instead. At the IR level
@@ -298,6 +298,38 @@ let TargetGuard = "sve,bf16" in {
def SVBFMLALT_LANE : SInst<"svbfmlalt_lane[_{0}]", "MMddi", "b", MergeNone,
"aarch64_sve_bfmlalt_lane_v2", [IsOverloadNone], [ImmCheck<3, ImmCheck0_7>]>;
}
+let TargetGuard = "sve2p1" in {
+ // Contiguous
@@ -420,6 +452,38 @@ let TargetGuard = "sve,bf16" in {
def SVSTNT1_VNUM_BF : MInst<"svstnt1_vnum[_{d}]", "vPpld", "b", [IsStore],
MemEltTyDefault, "aarch64_sve_stnt1">;
}
+let TargetGuard = "sve2p1" in {
+ // Contiguous truncating store from quadword (single vector).
+
https://github.com/CarolineConcatto edited
https://github.com/llvm/llvm-project/pull/71290
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@@ -2794,6 +2794,14 @@ void ItaniumCXXABI::registerGlobalDtor(CodeGenFunction
, const VarDecl ,
if (D.isNoDestroy(CGM.getContext()))
return;
+ // OpenMP offloading supports C++ constructors and destructors but we do not
+ // always have 'atexit' available. Instead
https://github.com/kito-cheng approved this pull request.
Checked with `Generic_GCC::GCCInstallationDetector::init` to make sure clang
will use that to search gcc toolchain, so LGTM.
https://github.com/llvm/llvm-project/pull/71803
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@@ -2794,6 +2794,14 @@ void ItaniumCXXABI::registerGlobalDtor(CodeGenFunction
, const VarDecl ,
if (D.isNoDestroy(CGM.getContext()))
return;
+ // OpenMP offloading supports C++ constructors and destructors but we do not
+ // always have 'atexit' available. Instead
jhuber6 wrote:
Just noticed I'm actually calling the destructors backwards in AMDGPU. Will fix
that.
https://github.com/llvm/llvm-project/pull/71739
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https://github.com/mihailo-stojanovic edited
https://github.com/llvm/llvm-project/pull/71803
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https://github.com/mihailo-stojanovic updated
https://github.com/llvm/llvm-project/pull/71803
>From 3c73fdf962c2e4fc8d993a34595f21a3926710d0 Mon Sep 17 00:00:00 2001
From: Mihailo Stojanovic
Date: Tue, 19 Sep 2023 14:30:00 +0300
Subject: [PATCH] [clang] Enable --gcc-install-dir for RISCV
https://github.com/mihailo-stojanovic reopened
https://github.com/llvm/llvm-project/pull/71803
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@@ -1809,6 +1816,23 @@ bool SIInsertWaitcnts::shouldFlushVmCnt(MachineLoop *ML,
return HasVMemLoad && UsesVgprLoadedOutside;
}
+bool SIInsertWaitcnts::insertWaitcntAfterMemOp(MachineFunction ) {
+ bool Modified = false;
+
+ for (auto : MF) {
arsenm
@@ -98,6 +100,11 @@ extern cl::opt PrintPipelinePasses;
static cl::opt ClSanitizeOnOptimizerEarlyEP(
"sanitizer-early-opt-ep", cl::Optional,
cl::desc("Insert sanitizers on OptimizerEarlyEP."), cl::init(false));
+
+// Re-link builtin bitcodes after optimization
+static
@@ -1809,6 +1816,23 @@ bool SIInsertWaitcnts::shouldFlushVmCnt(MachineLoop *ML,
return HasVMemLoad && UsesVgprLoadedOutside;
}
+bool SIInsertWaitcnts::insertWaitcntAfterMemOp(MachineFunction ) {
+ bool Modified = false;
+
+ for (auto : MF) {
arsenm
@@ -98,6 +100,11 @@ extern cl::opt PrintPipelinePasses;
static cl::opt ClSanitizeOnOptimizerEarlyEP(
"sanitizer-early-opt-ep", cl::Optional,
cl::desc("Insert sanitizers on OptimizerEarlyEP."), cl::init(false));
+
+// Re-link builtin bitcodes after optimization
+static
@@ -113,7 +120,7 @@ class EmitAssemblyHelper {
const CodeGenOptions
const clang::TargetOptions
const LangOptions
- Module *TheModule;
+ llvm::Module *TheModule;
arsenm wrote:
Why did this suddenly need qualification?
llvmbot wrote:
@llvm/pr-subscribers-backend-risc-v
Author: None (mihailo-stojanovic)
Changes
Fix the issue where Baremetal toolchain is created instead of the
RISCVToolchain when GCC installation is explicitly passed via the
gcc-install-dir option.
---
Full diff:
https://github.com/mihailo-stojanovic created
https://github.com/llvm/llvm-project/pull/71803
Fix the issue where Baremetal toolchain is created instead of the
RISCVToolchain when GCC installation is explicitly passed via the
gcc-install-dir option.
>From
https://github.com/arsenm approved this pull request.
I think it would be better if we could eliminate ConstantExpr addrspacecasts
from the IR altogether, which would avoid most of the complexity here. I would
also somewhat prefer to push this DFS into a helper function, but can live with
it
@@ -2794,6 +2794,14 @@ void ItaniumCXXABI::registerGlobalDtor(CodeGenFunction
, const VarDecl ,
if (D.isNoDestroy(CGM.getContext()))
return;
+ // OpenMP offloading supports C++ constructors and destructors but we do not
+ // always have 'atexit' available. Instead
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/71739
>From 5283c5e08877b11a0eece51ca3877c9f5f8c7b82 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Tue, 7 Nov 2023 17:12:31 -0600
Subject: [PATCH] [OpenMP] Rework handling of global ctor/dtors in OpenMP
Summary:
@@ -2794,6 +2794,14 @@ void ItaniumCXXABI::registerGlobalDtor(CodeGenFunction
, const VarDecl ,
if (D.isNoDestroy(CGM.getContext()))
return;
+ // OpenMP offloading supports C++ constructors and destructors but we do not
+ // always have 'atexit' available. Instead
@@ -2794,6 +2794,14 @@ void ItaniumCXXABI::registerGlobalDtor(CodeGenFunction
, const VarDecl ,
if (D.isNoDestroy(CGM.getContext()))
return;
+ // OpenMP offloading supports C++ constructors and destructors but we do not
+ // always have 'atexit' available. Instead
@@ -671,6 +671,20 @@ struct GenericDeviceTy : public DeviceAllocatorTy {
Error synchronize(__tgt_async_info *AsyncInfo);
virtual Error synchronizeImpl(__tgt_async_info ) = 0;
+ /// Invokes any global constructors on the device if present and is required
+ /// by the
Timm =?utf-8?q?Bäder?= ,
Timm =?utf-8?q?Bäder?= ,
Timm =?utf-8?q?Bäder?= ,
Timm =?utf-8?q?Bäder?= ,
Timm =?utf-8?q?Bäder?= ,
Timm =?utf-8?q?Bäder?= ,
Timm =?utf-8?q?Bäder?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,816 @@
+// RUN: %clang_cc1 -verify -std=c++2a -fsyntax-only
@@ -2627,6 +2637,48 @@ struct AMDGPUDeviceTy : public GenericDeviceTy,
AMDGenericDeviceTy {
using AMDGPUEventRef = AMDGPUResourceRef;
using AMDGPUEventManagerTy = GenericDeviceResourceManagerTy;
+ /// Common method to invoke a single threaded constructor or destructor
+
@@ -671,6 +671,20 @@ struct GenericDeviceTy : public DeviceAllocatorTy {
Error synchronize(__tgt_async_info *AsyncInfo);
virtual Error synchronizeImpl(__tgt_async_info ) = 0;
+ /// Invokes any global constructors on the device if present and is required
+ /// by the
@@ -671,6 +671,20 @@ struct GenericDeviceTy : public DeviceAllocatorTy {
Error synchronize(__tgt_async_info *AsyncInfo);
virtual Error synchronizeImpl(__tgt_async_info ) = 0;
+ /// Invokes any global constructors on the device if present and is required
+ /// by the
https://github.com/jplehr commented:
Thanks Joseph. Another two nits.
https://github.com/llvm/llvm-project/pull/71739
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https://github.com/jplehr edited https://github.com/llvm/llvm-project/pull/71739
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@@ -843,6 +843,44 @@ getOutputStream(CompilerInstance , llvm::StringRef
inFile,
llvm_unreachable("Invalid action!");
}
+static std::unique_ptr
+createTLII(llvm::Triple , const CodeGenOptions ) {
+ auto tlii = std::make_unique(targetTriple);
+ assert(tlii && "Failed to
@@ -81,6 +81,17 @@ class CodeGenOptions : public CodeGenOptionsBase {
RK_WithPattern, // Remark pattern specified via '-Rgroup=regexp'.
};
+ enum class VectorLibrary {
+NoLibrary, // Don't use any vector library.
+Accelerate, // Use the Accelerate framework.
+
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 18bb9725619569687bec2c013768511105266a5e
9846bc9efd79e6e3c2662ea42367c102df88799d --
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/71739
>From 0a1f4b5d514a5e1525e3178a80f6e8f5638bfb69 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Tue, 7 Nov 2023 17:12:31 -0600
Subject: [PATCH] [OpenMP] Rework handling of global ctor/dtors in OpenMP
Summary:
@@ -2627,6 +2637,48 @@ struct AMDGPUDeviceTy : public GenericDeviceTy,
AMDGenericDeviceTy {
using AMDGPUEventRef = AMDGPUResourceRef;
using AMDGPUEventManagerTy = GenericDeviceResourceManagerTy;
+ /// Common method to invoke a single threaded constructor or destructor
+
@@ -2627,6 +2637,48 @@ struct AMDGPUDeviceTy : public GenericDeviceTy,
AMDGenericDeviceTy {
using AMDGPUEventRef = AMDGPUResourceRef;
using AMDGPUEventManagerTy = GenericDeviceResourceManagerTy;
+ /// Common method to invoke a single threaded constructor or destructor
+
Timm =?utf-8?q?B=C3=A4der?=
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tbaederr wrote:
Ping
https://github.com/llvm/llvm-project/pull/69713
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tbaederr wrote:
Tests should work now
https://github.com/llvm/llvm-project/pull/71648
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https://github.com/tbaederr updated
https://github.com/llvm/llvm-project/pull/71648
>From f1421c190fd480a664bab80281db1e8abb1056a1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Timm=20B=C3=A4der?=
Date: Wed, 8 Nov 2023 06:49:41 +0100
Subject: [PATCH] [clang][Interp] Implement IntegralAP subtraction
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Matthew Devereau (MDevereau)
Changes
Adds the builtins:
void svldr_zt(uint64_t zt, const void *rn)
void svstr_zt(uint64_t zt, void *rn)
And the intrinsics:
call void @llvm.aarch64.sme.ldr.zt(i32, ptr)
tail call void
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