[PATCH] D76078: [AArch64][SVE] Add a pass for SVE intrinsic optimisations

2020-03-23 Thread Andrzej Warzynski via Phabricator via cfe-commits
andwar added a comment. Thanks for the updates @kmclaughlin ! Would you mind adding a comment to clearly mark the negative tests? E.g. for `@reinterpret_reductions_1`? Maybe also a comment `why` a particular case is not optimised? You've already done that for some tests, but not all of them.

[PATCH] D76078: [AArch64][SVE] Add a pass for SVE intrinsic optimisations

2020-03-20 Thread Andrzej Warzynski via Phabricator via cfe-commits
andwar added a comment. > Have you considered adding an interface for the new PM? Please ignore that comment ^^^. I incorrectly assumed that the backend has also been ported to the new PM, but that's not the case. In particular, `llc` will only use the legacy PM anyway: https://github.com/llvm

[PATCH] D76078: [AArch64][SVE] Add a pass for SVE intrinsic optimisations

2020-03-16 Thread Andrzej Warzynski via Phabricator via cfe-commits
andwar added a comment. Cheers for working on this @kmclaughlin ! Have you considered adding an interface for the new PM? You could check this for reference: https://reviews.llvm.org/rGd6de5f12d485a85504bc99d384a85634574a27e2 (also implements a FunctionPass). Comment at: llv

[PATCH] D75160: [AArch64][SVE] Add SVE2 intrinsic for xar

2020-03-04 Thread Andrzej Warzynski via Phabricator via cfe-commits
andwar accepted this revision. andwar added a comment. This revision is now accepted and ready to land. LGTM, cheers for working on this! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75160/new/ https://reviews.llvm.org/D75160 __

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

2020-02-21 Thread Andrzej Warzynski via Phabricator via cfe-commits
andwar added a comment. Cheers for working on this @kmclaughlin! Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:2035 + +def int_aarch64_sve_bdep_x : AdvSIMD_2VectorArg_Intrinsic; +def int_aarch64_sve_bext_x : AdvSIMD_2VectorArg_Intrinsic; What does `_x`

[PATCH] D74550: [AArch64][SVE] Add SVE index intrinsic

2020-02-13 Thread Andrzej Warzynski via Phabricator via cfe-commits
andwar added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:10923 +static SDValue LowerSVEIntrinsicIndex(SDNode *N, SelectionDAG &DAG) { + SDLoc dl(N); + SDValue Op1 = N->getOperand(1); [nit] This should be `DL`: https://llvm.org/

[PATCH] D71698: [AArch64][SVE] Add intrinsic for non-faulting loads

2020-01-02 Thread Andrzej Warzynski via Phabricator via cfe-commits
andwar added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:9998 + // GLD1* instructions perform an implicit zero-extend, which makes them // perfect candidates for combining. Could you replace `GLD1*` with `Load`? I believe th

[PATCH] D61446: Generalize the pass registration mechanism used by Polly to any third-party tool

2019-09-21 Thread Andrzej Warzynski via Phabricator via cfe-commits
andwar added inline comments. Comment at: llvm/examples/Bye/Bye.cpp:53 +/* New PM Registration */ + +llvm::PassPluginLibraryInfo getByePluginInfo() { [nit] Empty line Comment at: llvm/examples/Bye/CMakeLists.txt:9 +else() + target_link_librari

[PATCH] D67294: Register and parse a simplified version of '#pragma omp declare variant'

2019-09-11 Thread Andrzej Warzynski via Phabricator via cfe-commits
andwar marked 2 inline comments as done. andwar added inline comments. Comment at: lib/Parse/ParseOpenMP.cpp:779-783 + auto Identinfo = PP.getIdentifierInfo(VectorVariantId.Ident->getName()); + LookupResult Lookup(Actions, Identinfo, VectorVariantId.Loc, +

[PATCH] D67294: Register and parse a simplified version of '#pragma omp declare variant'

2019-09-11 Thread Andrzej Warzynski via Phabricator via cfe-commits
andwar added a comment. I've addressed most of the comments except for those related to templates. I'd like to clarify as what is the expected behaviour there before proceeding with implementation. Comment at: include/clang/Basic/Attr.td:3220 +private: + NamedDecl *V

[PATCH] D67294: Register and parse a simplified version of '#pragma omp declare variant'

2019-09-11 Thread Andrzej Warzynski via Phabricator via cfe-commits
andwar updated this revision to Diff 219673. andwar marked 6 inline comments as done. andwar added a comment. - Removed `declare variant` from Attr.td - Moved the 'vector-var-id' lookup from ParseOpenMP.cpp to SemaOpenMP.cpp - Parsing 'vector-var-id' as an expression - Removed the creation of the

[PATCH] D67294: Register and parse a simplified version of '#pragma omp declare variant'

2019-09-06 Thread Andrzej Warzynski via Phabricator via cfe-commits
andwar created this revision. andwar added a reviewer: ABataev. Herald added a reviewer: jdoerfert. Herald added a project: clang. Herald added a subscriber: cfe-commits. This patch implements the basic parsing and semantic analysis of `#pragma omp declare variant`: * registers '#pragma om

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