[PATCH] D91974: [PowerPC] Rename the vector pair intrinsics and builtins to replace the _mma_ prefix by _vsx_

2020-12-16 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 312238. bsaleil added a comment. Rebase and fix comment Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91974/new/ https://reviews.llvm.org/D91974 Files: clang/include/clang/Basic/BuiltinsPPC.def

[PATCH] D91819: [PowerPC] Enable paired vector type and intrinsics when MMA is disabled

2020-12-15 Thread Baptiste Saleil via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. bsaleil marked an inline comment as done. Closed by commit rG57d83c3a90c4: [PowerPC] Enable paired vector type and intrinsics when MMA is disabled (authored by

[PATCH] D91819: [PowerPC] Enable paired vector type and intrinsics when MMA is disabled

2020-12-15 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil added inline comments. Comment at: clang/lib/AST/ASTContext.cpp:1427 + if (Target.getTriple().isPPC64() && + Target.hasFeature("paired-vector-memops")) { +if (Target.hasFeature("mma")) { amyk wrote: > Is it better to do `hasFeature()` over

[PATCH] D91974: [PowerPC] Rename the pair intrinsics and builtins to replace the _mma_ prefix by _vsx_

2020-11-23 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil created this revision. bsaleil added reviewers: nemanjai, amyk, saghir, lei, PowerPC. bsaleil added projects: PowerPC, LLVM. Herald added subscribers: llvm-commits, cfe-commits, shchenz, kbarton, hiraditya. Herald added a project: clang. bsaleil requested review of this revision. On PPC,

[PATCH] D91819: [PowerPC] Enable paired vector type and intrinsics when MMA is disabled

2020-11-19 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil created this revision. bsaleil added reviewers: nemanjai, saghir, amyk, lei. bsaleil added projects: PowerPC, LLVM, clang. Herald added subscribers: llvm-commits, cfe-commits, dexonsmith, shchenz, arphaman, martong, kbarton, hiraditya. Herald added a reviewer: shafik. bsaleil requested

[PATCH] D90799: [PowerPC] Add paired vector load and store builtins and intrinsics

2020-11-13 Thread Baptiste Saleil via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG3f78605a8cb1: [PowerPC] Add paired vector load and store builtins and intrinsics (authored by bsaleil). Repository: rG LLVM Github Monorepo

[PATCH] D91200: [PowerPC] Prevent the use of MMA with P9 and earlier

2020-11-12 Thread Baptiste Saleil via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG170e45ae186b: [PowerPC] Prevent the use of MMA with P9 and earlier (authored by bsaleil). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D91200: [PowerPC] Prevent the use of MMA with P9 and earlier

2020-11-11 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 304662. bsaleil added a comment. clang-format Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91200/new/ https://reviews.llvm.org/D91200 Files: clang/lib/Basic/Targets/PPC.cpp

[PATCH] D91200: [PowerPC] Prevent the use of MMA with P9 and earlier

2020-11-10 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil created this revision. bsaleil added reviewers: nemanjai, saghir, lei, amyk, PowerPC. bsaleil added projects: clang, PowerPC. Herald added subscribers: cfe-commits, shchenz, kbarton. bsaleil requested review of this revision. We want to allow using MMA on `P10` CPU only. This patch

[PATCH] D90799: [PowerPC] Add paired vector load and store builtins and intrinsics

2020-11-09 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 303973. bsaleil added a comment. Simplify control flow and improve test cases Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90799/new/ https://reviews.llvm.org/D90799 Files:

[PATCH] D90799: [PowerPC] Add paired vector load and store builtins and intrinsics

2020-11-06 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 303540. bsaleil added a comment. Fix unaligned load/store select Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90799/new/ https://reviews.llvm.org/D90799 Files: clang/include/clang/Basic/BuiltinsPPC.def

[PATCH] D90799: [PowerPC] Add paired vector load and store builtins and intrinsics

2020-11-05 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 303152. bsaleil added a comment. Rebase patch and add Sema check test case for the builtins Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90799/new/ https://reviews.llvm.org/D90799 Files:

[PATCH] D90799: [PowerPC] Add paired vector load and store builtins and intrinsics

2020-11-05 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 303132. bsaleil added a comment. Add support for the paired load/store intrinsics in `PPCLoopInstrFormPrep` Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90799/new/ https://reviews.llvm.org/D90799 Files:

[PATCH] D82035: [PowerPC] Add Sema checks for MMA types

2020-11-04 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:10339 + if (Context.getTargetInfo().getTriple().isPPC64()) +CheckPPCMMAType(RetValExp->getType(), ReturnLoc); } NeHuang wrote: > CheckPPCMMAType returns bool value. Do we need add

[PATCH] D90799: [PowerPC] Add paired vector load and store builtins and intrinsics

2020-11-04 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 302983. bsaleil added a comment. Add builtin tests Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90799/new/ https://reviews.llvm.org/D90799 Files: clang/include/clang/Basic/BuiltinsPPC.def

[PATCH] D82035: [PowerPC] Add Sema checks for MMA types

2020-11-04 Thread Baptiste Saleil via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGf976ba613958: [PowerPC] Add Sema checks for MMA types (authored by bsaleil). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D90799: [PowerPC] Add paired vector load and store builtins and intrinsics

2020-11-04 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil created this revision. bsaleil added reviewers: nemanjai, amyk, saghir, lei. bsaleil added projects: LLVM, PowerPC. Herald added subscribers: llvm-commits, cfe-commits, shchenz, kbarton, hiraditya. Herald added a project: clang. bsaleil requested review of this revision. This patch adds

[PATCH] D82035: [PowerPC] Add Sema checks for MMA types

2020-11-04 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 302918. bsaleil added a comment. Change function name and improve comment Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82035/new/ https://reviews.llvm.org/D82035 Files:

[PATCH] D81748: [PowerPC] Add MMA builtin decoding and definitions

2020-11-03 Thread Baptiste Saleil via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGdaa127d77eab: [PowerPC] Add MMA builtin decoding and definitions (authored by bsaleil). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D81748: [PowerPC] Add MMA builtin decoding and definitions

2020-10-28 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 301437. bsaleil added a comment. Fix typo and add comment to explain why we add the `ASTContext::DecodeTypeStr` function. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81748/new/

[PATCH] D81508: [PowerPC] Add __vector_pair and __vector_quad types

2020-10-28 Thread Baptiste Saleil via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG40dd4d5233d9: [Clang][PowerPC] Add __vector_pair and __vector_quad types (authored by bsaleil). Repository: rG LLVM Github Monorepo CHANGES

[PATCH] D82035: [PowerPC] Add Sema checks for MMA types

2020-10-27 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 301010. bsaleil added reviewers: nemanjai, saghir, lei, rsmith. bsaleil added a comment. Herald added a subscriber: dexonsmith. Rebasing patch Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82035/new/

[PATCH] D81748: [PowerPC] Add MMA builtin decoding and definitions

2020-10-26 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 300805. bsaleil added a comment. Herald added a subscriber: dexonsmith. Rebase patch Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81748/new/ https://reviews.llvm.org/D81748 Files:

[PATCH] D81508: [PowerPC] Add __vector_pair and __vector_quad types

2020-10-23 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 300408. bsaleil added a comment. Herald added a subscriber: dexonsmith. Rebasing the patch Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81508/new/ https://reviews.llvm.org/D81508 Files:

[PATCH] D84962: [PowerPC] Correct cpsgn's behaviour on PowerPC to match that of the ABI

2020-10-05 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil accepted this revision. bsaleil added a comment. LGTM, please fix the unrelated change when committing. Comment at: clang/test/CodeGen/builtins-ppc-vsx.c:1 -// REQUIRES: powerpc-registered-target +// requires: powerpc-registered-target // RUN: %clang_cc1

[PATCH] D84968: [PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types

2020-09-28 Thread Baptiste Saleil via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG0156914275be: [PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types (authored by bsaleil). Repository: rG LLVM Github

[PATCH] D84968: [PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types

2020-09-28 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 294776. bsaleil added a comment. Use early exit in lowering functions and extend test case Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D84968/new/ https://reviews.llvm.org/D84968 Files:

[PATCH] D84962: [PowerPC] Correct cpsgn's behaviour on PowerPC to match that of the ABI

2020-09-23 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-vsx.c:1840 +// CHECK: %6 = call <4 x float> @llvm.copysign.v4f32(<4 x float> %5, <4 x float> %4) + vec_cpsgn(a, b); +} Could you also add a call to `__builtin_vsx_xvcpsgnsp` and the

[PATCH] D84968: [PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types

2020-09-09 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 290804. bsaleil added a comment. Rebase so the patch can be applied on top of master. Also change the datalayout string on all ppc64 platforms to improve compatibility between object files. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D84968/new/

[PATCH] D84962: [PowerPC] Correct cpsgn's behaviour on PowerPC to match that of the ABI

2020-09-08 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:14298 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); -return Builder.CreateCall(F, {X, Y}); +return Builder.CreateCall(F, {Y, X}); } Could you add a test case in

[PATCH] D86795: [PowerPC] Implement builtins for xvcvspbf16 and xvcvbf16spn

2020-09-01 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil accepted this revision. bsaleil added a comment. This revision is now accepted and ready to land. LGTM, thanks for adding that. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D86795/new/ https://reviews.llvm.org/D86795

[PATCH] D81442: [PowerPC] Add clang options to control MMA support

2020-08-24 Thread Baptiste Saleil via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG512e256c0d8c: [PowerPC] Add clang options to control MMA support (authored by bsaleil). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81442/new/

[PATCH] D82675: [PowerPC] Implement Vector Extract Mask builtins in LLVM/Clang

2020-08-04 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil accepted this revision as: bsaleil. bsaleil added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82675/new/ https://reviews.llvm.org/D82675

[PATCH] D84968: [PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types

2020-07-30 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil created this revision. bsaleil added reviewers: PowerPC, nemanjai, lei, hfinkel. bsaleil added projects: PowerPC, LLVM. Herald added subscribers: llvm-commits, cfe-commits, shchenz, kbarton, hiraditya. Herald added a project: clang. bsaleil requested review of this revision. Herald added

[PATCH] D81442: [PowerPC] Add clang options to control MMA support

2020-07-28 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 281381. bsaleil added a comment. Update diff so it can be applied to master. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81442/new/ https://reviews.llvm.org/D81442 Files:

[PATCH] D83722: [PowerPC] Add options to control paired vector memops support

2020-07-28 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 281341. bsaleil added a comment. Update diff so it can be applied to master Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83722/new/ https://reviews.llvm.org/D83722 Files:

[PATCH] D83722: [PowerPC] Add options to control paired vector memops support

2020-07-22 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil marked an inline comment as done. bsaleil added inline comments. Comment at: llvm/lib/Target/PowerPC/PPC.td:243 + "32Byte load and store instructions", + [FeatureISA3_0]>; amyk wrote: > Is this supposed to be

[PATCH] D83722: [PowerPC] Add options to control paired vector memops support

2020-07-20 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 279341. bsaleil added a comment. Add PairedVectorMemops to the list of unsupported features in a comment Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83722/new/ https://reviews.llvm.org/D83722 Files:

[PATCH] D82576: [PowerPC][Power10] Implement low-order Vector Modulus Builtins, and add Vector Multiply/Divide/Modulus Builtins Tests

2020-07-16 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil accepted this revision. bsaleil added a comment. This revision is now accepted and ready to land. Thanks for the explanation. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82576/new/ https://reviews.llvm.org/D82576

[PATCH] D82576: [PowerPC][Power10] Implement low-order Vector Modulus Builtins, and add Vector Multiply/Divide/Modulus Builtins Tests

2020-07-15 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:28 + return vec_mul(vulla, vullb); +} + Are the tests for `vec_mul` with `v4i32` missing ? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D81442: [PowerPC] Add clang options to control MMA support

2020-07-14 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 277858. bsaleil added a comment. Add test to check that the `mma` option is supported by the targets. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81442/new/ https://reviews.llvm.org/D81442 Files:

[PATCH] D83722: [PowerPC] Add options to control paired vector memops support

2020-07-14 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 277847. bsaleil added a comment. Add test to check `paired-vector-memops` is supported by the targets. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83722/new/ https://reviews.llvm.org/D83722 Files:

[PATCH] D83722: [PowerPC] Add options to control paired vector memops support

2020-07-14 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 277838. bsaleil added a comment. Re-upload with surrounding context Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83722/new/ https://reviews.llvm.org/D83722 Files: clang/include/clang/Driver/Options.td

[PATCH] D83497: [PowerPC][Power10] Fix VINS* (vector insert byte/half/word) instructions to have i32 arguments.

2020-07-13 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil accepted this revision as: bsaleil. bsaleil added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83497/new/ https://reviews.llvm.org/D83497 ___ cfe-commits mailing list

[PATCH] D81442: [PowerPC] Add clang options to control MMA support

2020-07-13 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 277580. bsaleil added a comment. Herald added subscribers: llvm-commits, hiraditya. Also add target options with this patch Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81442/new/

[PATCH] D83722: [PowerPC] Add options to control paired vector memops support

2020-07-13 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil created this revision. bsaleil added reviewers: PowerPC, power-llvm-team, nemanjai, lei, saghir, amyk, stefanp. bsaleil added projects: LLVM, clang, PowerPC. Herald added subscribers: llvm-commits, cfe-commits, dang, steven.zhang, shchenz, hiraditya. This patch adds frontend and backend

[PATCH] D81442: [PowerPC] Add clang options to control MMA support

2020-07-13 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 277466. Herald added a subscriber: dang. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81442/new/ https://reviews.llvm.org/D81442 Files: clang/include/clang/Driver/Options.td clang/lib/Basic/Targets/PPC.cpp

[PATCH] D83338: [PowerPC][Power10] Implemented Vector Shift Builtins

2020-07-09 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil added a comment. Shouldn't we have test cases to test `vec_sl`, `vec_sr` and `vec_sra` ? Comment at: llvm/include/llvm/IR/IntrinsicsPowerPC.td:800 def int_ppc_altivec_vsrw : PowerPC_Vec_WWW_Intrinsic<"vsrw">; +def int_ppc_altivec_vsrq :

[PATCH] D83364: [PowerPC][Power10] Implement Instruction definition and MC Tests for Load and Store VSX Vector with Zero or Sign Extend

2020-07-09 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:939 + // The XFormMemOp flag for the following 8 insts is set on the instruction format. + let mayLoad = 1, mayStore = 1 in { +def LXVRBX : X_XT6_RA5_RB5<31, 13, "lxvrbx", vsrc, []>;

[PATCH] D74087: [Sema] Fix Sema checkArgCount function

2020-02-06 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil updated this revision to Diff 242963. bsaleil added a comment. Adding test case CHANGES SINCE LAST ACTION https://reviews.llvm.org/D74087/new/ https://reviews.llvm.org/D74087 Files: clang/lib/Sema/SemaChecking.cpp clang/test/Sema/custom-checking.c Index:

[PATCH] D74087: [Sema] Fix Sema checkArgCount function

2020-02-05 Thread Baptiste Saleil via Phabricator via cfe-commits
bsaleil created this revision. bsaleil added a reviewer: rsmith. bsaleil added a project: clang. Herald added a subscriber: cfe-commits. This patch fixes the checkArgCount function in Sema that is used to check the number of arguments of a call when doing custom type-checking. The patch fixes