[PATCH] D147732: [AMDGPU] Add type mangling for {read, write, readfirst, perm}lane intrinsics

jrbyrnes added inline comments. Comment at: llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp:187 +Value *AMDGPULateCodeGenPrepare::buildLegalLaneIntrinsic( +IRBuilder<> , Intrinsic::ID IID, Value *Data0, Value *Data1, Value *Lane0, arsenm wrote: >

[PATCH] D153667: [HIP]: Add -fhip-emit-relocatable to override link job creation for -fno-gpu-rdc

This revision was automatically updated to reflect the committed changes. Closed by commit rGbe8a65b598b3: [HIP]: Add -fhip-emit-relocatable to override link job creation for -fno-gpu-rdc (authored by jrbyrnes). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D153667: [HIP]: Add -fhip-emit-relocatable to override link job creation for -fno-gpu-rdc

jrbyrnes added inline comments. Comment at: clang/lib/Driver/Driver.cpp:3328-3330 + CompileDeviceOnly = C.getDriver().offloadDeviceOnly(); + Relocatable = Args.hasFlag(options::OPT_fgpu_rdc, + options::OPT_fno_gpu_rdc,

[PATCH] D153667: [HIP]: Add -fhip-emit-relocatable to override link job creation for -fno-gpu-rdc

jrbyrnes updated this revision to Diff 535519. jrbyrnes marked 3 inline comments as done. jrbyrnes added a comment. Address Comment Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D153667/new/ https://reviews.llvm.org/D153667 Files:

[PATCH] D153667: [HIP]: Add -fhip-emit-relocatable to override link job creation for -fno-gpu-rdc

jrbyrnes updated this revision to Diff 535484. jrbyrnes added a comment. Use member variabls + add diagnostic + tests Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D153667/new/ https://reviews.llvm.org/D153667 Files:

[PATCH] D153667: [HIP]: Add gpu-link-output to control link job creation

jrbyrnes updated this revision to Diff 535456. jrbyrnes added a comment. Naming + -cuda-device-only and -fno-gpu-rdc only Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D153667/new/ https://reviews.llvm.org/D153667 Files:

[PATCH] D153667: [HIP]: Add gpu-link-output to control link job creation

jrbyrnes added a comment. In D153667#4450724 , @jhuber6 wrote: > In D153667#4450705 , @jrbyrnes > wrote: > >> In D153667#4450517 , @jhuber6 >> wrote: >> >>> What's the

[PATCH] D153667: [HIP]: Add gpu-link-output to control link job creation

jrbyrnes added a comment. In D153667#4450517 , @jhuber6 wrote: > What's the difference here between this and the existing `--hip-link`? Hi @jhuber6 The commit is poorly named, the main purpose is to introduce `-no-gpu-link-output.` We want a way to

[PATCH] D153667: [HIP]: Add gpu-link-output to control link job creation

jrbyrnes updated this revision to Diff 534725. jrbyrnes marked an inline comment as done. jrbyrnes added a comment. Fix tests + add tests. Add phase test for -fgpu-rdc --no-gpu-link-output (these are not intended to be used together) Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D153667: [HIP]: Add gpu-link-output to control link job creation

jrbyrnes updated this revision to Diff 534086. jrbyrnes added a comment. Formatting Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D153667/new/ https://reviews.llvm.org/D153667 Files: clang/include/clang/Driver/Options.td

[PATCH] D153667: [HIP]: Add gpu-link-output to control link job creation

jrbyrnes created this revision. jrbyrnes added a reviewer: yaxunl. Herald added a project: All. jrbyrnes requested review of this revision. Herald added subscribers: cfe-commits, MaskRay. Herald added a project: clang. Change-Id: Ia19a28867d15022d1400d3e18c61f14259057ff4 Repository: rG LLVM

[PATCH] D147732: [AMDGPU] Add type mangling for {read, write, readfirst, perm}lane intrinsics

jrbyrnes added a comment. In D147732#4434557 , @arsenm wrote: > I think this may not hard break mesa. I believe mesa bypasses the intrinsic > creation API, and just declares the string name of the intrinsic. The type > name mangling suffix is

[PATCH] D147732: [AMDGPU] Add type mangling for {read, write, readfirst, perm}lane intrinsics

jrbyrnes updated this revision to Diff 533080. jrbyrnes marked 5 inline comments as done. jrbyrnes added a comment. Address comments + enable selection of ptr types Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147732/new/

[PATCH] D147732: [AMDGPU] Add f32 permlane{16, x16} builtin variants

jrbyrnes updated this revision to Diff 513386. jrbyrnes marked an inline comment as done. jrbyrnes added a comment. Use type mangling Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147732/new/ https://reviews.llvm.org/D147732 Files:

[PATCH] D147732: [AMDGPU] Add f32 permlane{16, x16} builtin variants

jrbyrnes added a comment. In D147732#4249567 , @rampitec wrote: > Isn't it simpler to lower it to an existing int intrinsic and casts in clang? Thanks for your comment Stas! I think it would be ideal if clang inserted pure bitcasts for floats instead

[PATCH] D147732: [AMDGPU] Add f32 permlane{16, x16} builtin variants

jrbyrnes created this revision. jrbyrnes added reviewers: rampitec, arsenm. Herald added subscribers: kosarev, foad, kerbowa, hiraditya, tpr, dstuttard, yaxunl, jvesely, kzhuravl. Herald added a project: All. jrbyrnes requested review of this revision. Herald added subscribers: llvm-commits,

[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

jrbyrnes added a comment. In D135269#3981856 , @yaxunl wrote: > In D135269#3981561 , @nikic wrote: > >> Checking back here again on whether there is any progress on finding the >> root cause of the issue. If no

[PATCH] D132079: [AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy

jrbyrnes accepted this revision. jrbyrnes added a comment. This revision is now accepted and ready to land. LGTM Comment at: llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp:427 DAG->addMutation(createStoreClusterDAGMutation(DAG->TII, DAG->TRI));

[PATCH] D132079: [AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy

jrbyrnes added a comment. Just a couple nitpicks Comment at: llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:1071 PipelineSolver PS(SyncedSchedGroups, SyncedInstrs, DAG); // PipelineSolver performs the mutation by adding the edges it Have a fully unguarded

[PATCH] D132079: [AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy

jrbyrnes added a comment. LGTM again Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D132079/new/ https://reviews.llvm.org/D132079 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D132079: [AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy

jrbyrnes added inline comments. Comment at: llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:1063 +} else if (Opc == AMDGPU::IGLP_OPT) { + if (!foundSB && !foundIGLP) +initIGLPOpt(*R); I think this makes more sense if you parse the entire dag first,

[PATCH] D132079: [AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy

jrbyrnes added a comment. Hey Austin -- Just have a small question about the purpose of shouldApplyStrategy -- other than that, LGTM. Comment at: llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:758 + + bool shouldApplyStrategy(ScheduleDAGInstrs *DAG) override { return true; } +

[PATCH] D128158: [AMDGPU] Add amdgcn_sched_group_barrier builtin

jrbyrnes added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D128158/new/ https://reviews.llvm.org/D128158 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D128158: [AMDGPU] Add amdgcn_sched_group_barrier builtin

jrbyrnes added a comment. Hey Austin -- I like the removal of canAddMIs. In the original design, I was leaving open the possibility for users to pass in canAddMIs rather than a mask / SchedGroup name, but it looks like this isn't the direction we're going, and the classification functions