[PATCH] D131134: [X86] Report error if the amx enabled on the non-64-bits target

LiuChen3 added a comment. In D131134#3707397 , @craig.topper wrote: > What problem are we trying to solve here? CPUID reports AMX as supported even > in 32-bit mode. Why can't the user pass it to the compiler? I thought AMX is only supported on 64-bit

[PATCH] D131134: [X86] Report error if the amx enabled on the non-64-bits target

LiuChen3 updated this revision to Diff 450724. LiuChen3 added a comment. change the error report Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D131134/new/ https://reviews.llvm.org/D131134 Files:

[PATCH] D131134: [X86] Report error if the amx enabled on the non-64-bits target

LiuChen3 updated this revision to Diff 450702. LiuChen3 added a comment. fix lit fail and handle '-march=native' Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D131134/new/ https://reviews.llvm.org/D131134 Files:

[PATCH] D131134: [X86] Report error if the amx enabled on the non-64-bits target

LiuChen3 added a comment. In D131134#3699742 , @craig.topper wrote: > How does this interact with `-march=native -m32`. Won't that pick up the amx > flag from CPUID? Good point. I will continue the work. Repository: rG LLVM Github Monorepo

[PATCH] D131134: [X86] Report error if the amx enabled on the non-64-bits target

LiuChen3 added a comment. In D131134#3699742 , @craig.topper wrote: > How does this interact with `-march=native -m32`. Won't that pick up the amx > flag from CPUID? In D131134#3699344 , @aaron.ballman

[PATCH] D131134: [X86] Report error if the amx enabled on the non-64-bits target

LiuChen3 created this revision. Herald added a project: All. LiuChen3 requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. For now we check if the amx intrinsics used on 64-bits target. This check is not accurate. Repository: rG LLVM Github

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 added a comment. In D124435#3515541 , @jyknight wrote: > I find the option names you have a bit confusing. I'd like to suggest calling > them, instead: > > caller: Extend a small integer parameter in the caller; callee will assume it > has

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 added a comment. Sorry for the late update. I hope you can take the time to continue reviewing, @rjmccall . I'm not sure if I understand you correctly. Now if the `-mextend-small-integers=default` is used, compiler will report error. Repository: rG LLVM Github Monorepo CHANGES

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 updated this revision to Diff 449230. LiuChen3 added a comment. rebase and address rjmccall's comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124435/new/ https://reviews.llvm.org/D124435 Files:

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 added a comment. Thanks, @rjmccall . I'm sorry I don't have much time on this patch recently. I will update it later. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124435/new/ https://reviews.llvm.org/D124435

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 updated this revision to Diff 427551. LiuChen3 added a comment. Use `-mextend-small-integers=` instead of boolean option Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124435/new/ https://reviews.llvm.org/D124435 Files:

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 added inline comments. Comment at: clang/lib/CodeGen/TargetInfo.cpp:1938 +return IsConservativeExtend ? ABIArgInfo::getConservativeExtend(Ty) +: ABIArgInfo::getExtend(Ty); } rjmccall wrote: > LiuChen3 wrote: > >

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 added inline comments. Comment at: clang/docs/ClangCommandLineReference.rst:2988-2992 +.. option:: -mconservative-extend +Always extend the integer parameter both in the callee and caller. + +.. option:: -mno-conservative-extend +Keep the original integer parameter

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 added a comment. In D124435#3474130 , @skan wrote: > Should we update the `clang/docs/ReleaseNotes.rst` for this? The ReleaseNotes says "written by LLVM Team". So I am not sure if I can update this. Repository: rG LLVM Github Monorepo

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 updated this revision to Diff 425428. LiuChen3 added a comment. add one missing comment Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124435/new/ https://reviews.llvm.org/D124435 Files: clang/docs/ClangCommandLineReference.rst

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 marked 9 inline comments as done. LiuChen3 added inline comments. Comment at: clang/lib/CodeGen/CGCall.cpp:2310 case ABIArgInfo::Extend: + case ABIArgInfo::ConservativeExtend: if (RetAI.isSignExt()) At present, `ConservativeExtend` has no

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 updated this revision to Diff 425427. LiuChen3 added a comment. Address comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124435/new/ https://reviews.llvm.org/D124435 Files: clang/docs/ClangCommandLineReference.rst

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 added inline comments. Comment at: clang/docs/ClangCommandLineReference.rst:2988-2992 +.. option:: -mconservative-extend +Always extend the integer parameter both in the callee and caller. + +.. option:: -mno-conservative-extend +Keep the original integer parameter

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 added inline comments. Comment at: clang/test/CodeGen/X86/integer_argument_passing.c:2 +// RUN: %clang_cc1 -O2 -triple -x86_64-linux-gnu %s -emit-llvm -o - | FileCheck %s --check-prefixes=EXTEND,CHECK +// RUN: %clang_cc1 -O2 -triple -i386-linux-gnu %s -emit-llvm -o - |

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 added inline comments. Comment at: clang/lib/CodeGen/CGCall.cpp:2451 + // attribute to the callee. + if (AttrOnCallSite || AI.getKind() == ABIArgInfo::Extend) { +if (AI.isSignExt()) pengfei wrote: > Does the change affect Windows?

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 added a comment. In D124435#3474130 , @skan wrote: > Should we update the `clang/docs/ReleaseNotes.rst` for this? Maybe? I will update it in the next patch. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 updated this revision to Diff 425135. LiuChen3 added a comment. fix bug Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124435/new/ https://reviews.llvm.org/D124435 Files: clang/docs/ClangCommandLineReference.rst

[PATCH] D124435: [X86] Always extend the integer parameters in callee

LiuChen3 created this revision. Herald added subscribers: dexonsmith, jdoerfert, pengfei. Herald added a project: All. LiuChen3 requested review of this revision. Herald added subscribers: cfe-commits, MaskRay. Herald added a project: clang. For now clang will assume the integer parameters have

[PATCH] D124067: [x86] Support 3 builtin functions for 32-bits targets

LiuChen3 added inline comments. Comment at: clang/test/CodeGen/X86/sse2-builtins.c:560 // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1 + // X86-LABEL: test_mm_cvtsi64_si128 + // X86: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0 xiangzhangllvm

[PATCH] D118103: [X86]Fix the wrong value of bit_AVXVNNI

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGf6984b299afc: Fix the wrong value of bit_AVXVNNI (authored by LiuChen3). Herald added a project: clang. Herald added a subscriber: cfe-commits.

[PATCH] D89105: [X86] Support Intel avxvnni

LiuChen3 added inline comments. Comment at: clang/lib/Headers/cpuid.h:199 /* Features in %eax for leaf 7 sub-leaf 1 */ +#define bit_AVXVNNI 0x0008 #define bit_AVX512BF160x0020 craig.topper wrote: > RKSimon wrote: > > @liuchen3

[PATCH] D100368: [X86] Support some missing intrinsics

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG72e4bf12eec4: [X86] Support some missing intrinsics (authored by LiuChen3). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D100368: [X86] Support some missing intrinsics

LiuChen3 added inline comments. Comment at: clang/test/CodeGen/X86/avx512f-builtins.c:10853 + +__m512i test_mm512_mask_i32logather_epi64(__m512i __v1_old, __mmask8 __mask, __m512i __index, void const *__addr) { + // CHECK-LABEL: @test_mm512_mask_i32logather_epi64

[PATCH] D100368: [X86] Support some missing intrinsics

LiuChen3 updated this revision to Diff 338445. LiuChen3 added a comment. Fix format issue. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D100368/new/ https://reviews.llvm.org/D100368 Files: clang/lib/Headers/avx512fintrin.h

[PATCH] D100368: [X86] Support some missing intrinsics

LiuChen3 updated this revision to Diff 338443. LiuChen3 added a comment. 1. Rebase. 2. Adding _mm512_i32loscatter_epi64 and _mm512_mask_i32loscatter_epi64. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D100368/new/ https://reviews.llvm.org/D100368

[PATCH] D78564: [i386] Modify the alignment of __m128/__m256/__m512 vector type according i386 abi.

LiuChen3 added a comment. Thanks for your review. Hope this patch won't cause too many ABI issues in the future. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D78564/new/ https://reviews.llvm.org/D78564

[PATCH] D78564: [i386] Modify the alignment of __m128/__m256/__m512 vector type according i386 abi.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG1c4108ab661d: [i386] Modify the alignment of __m128/__m256/__m512 vector type according i386… (authored by LiuChen3). Herald added a project: clang.

[PATCH] D99565: [X86] Support replacing aligned vector moves with unaligned moves when avx is enabled.

LiuChen3 updated this revision to Diff 337333. LiuChen3 added a comment. Address Craig's comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D99565/new/ https://reviews.llvm.org/D99565 Files: clang/include/clang/Driver/Options.td

[PATCH] D100368: [X86] Support some missing intrinsics

LiuChen3 updated this revision to Diff 337301. LiuChen3 added a comment. Address Simon's comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D100368/new/ https://reviews.llvm.org/D100368 Files: clang/lib/Headers/avx512fintrin.h

[PATCH] D100368: [X86] Support some missing intrinsics

LiuChen3 added a comment. In D100368#2685189 , @RKSimon wrote: > Add _mm512_i32loscatter_epi64 and _mm512_mask_i32loscatter_epi64 for > completeness? It seems we doesn't support KNCNI in LLVM. Am I right? Repository: rG LLVM Github Monorepo

[PATCH] D100368: [X86] Support some missing intrinsics

LiuChen3 created this revision. Herald added a subscriber: pengfei. LiuChen3 requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Support for _mm512_i32logather_pd, _mm512_mask_i32logather_pd, _mm512_i32logather_epi64,

[PATCH] D99565: [X86] Support replacing aligned vector moves with unaligned moves when avx is enabled.

LiuChen3 updated this revision to Diff 337064. LiuChen3 added a comment. Address Craig's comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D99565/new/ https://reviews.llvm.org/D99565 Files: clang/include/clang/Driver/Options.td

[PATCH] D99565: [X86] Support replacing aligned vector moves with unaligned moves when avx is enabled.

LiuChen3 added a comment. In D99565#2678073 , @craig.topper wrote: > I think I wouldn't mind if we just didn't emit aligned loads/store > instructions for AVX/AVX512 from isel and other places in the compiler in the > first place. As noted, if the load

[PATCH] D99565: [X86] Support replacing aligned vector moves with unaligned moves when avx is enabled.

LiuChen3 added a comment. In D99565#2682809 , @lebedev.ri wrote: > I'm still uncomfortable with changing current status quo, even though i > obviously don't get to cast the final vote here. > > One should not use aligned loads in hope that they will

[PATCH] D99565: [X86] Support replacing aligned vector moves with unaligned moves when avx is enabled.

LiuChen3 updated this revision to Diff 337057. LiuChen3 added a comment. 1. Rebase; 2. Emit unaligned move in ISEL; 3. Only do the conversion on AVX machine. I am still working on fast-isel. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D99565/new/

[PATCH] D99565: [X86] Support replacing aligned vector moves with unaligned moves when avx is enabled.

LiuChen3 added a comment. In D99565#2678073 , @craig.topper wrote: > I think I wouldn't mind if we just didn't emit aligned loads/store > instructions for AVX/AVX512 from isel and other places in the compiler in the > first place. As noted, if the load

[PATCH] D99565: [X86] Support replacing aligned vector moves with unaligned moves when avx is enabled.

LiuChen3 added inline comments. Comment at: clang/include/clang/Driver/Options.td:1642 +Group, Flags<[CoreOption, HelpHidden]>, +HelpText<"Enable transforming aligned vector move instruction to " + "unaligned vector move.">; craig.topper

[PATCH] D99565: [X86] Support replacing aligned vector moves with unaligned moves when avx is enabled.

LiuChen3 created this revision. Herald added subscribers: jansvoboda11, dang, pengfei, hiraditya. LiuChen3 requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. With AVX the performance for aligned vector move and unaligned

[PATCH] D97358: [X86] Support amx-bf16 intrinsic.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG4bc7c8631ad6: [X86] Support amx-bf16 intrinsic. (authored by LiuChen3). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D97358: [X86] Support amx-bf16 intrinsic.

LiuChen3 added a comment. I don't know why pre-merge-checks failed. I can check-all successfully locally in redhat8. I don't have debian mainchine to reproduce this problem. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D97358/new/

[PATCH] D97358: [X86] Support amx-bf16 intrinsic.

LiuChen3 updated this revision to Diff 326002. LiuChen3 added a comment. Address Pengfei and Yuanke's comments. We don't need more tile type. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D97358/new/ https://reviews.llvm.org/D97358 Files:

[PATCH] D97358: [X86] Support amx-bf16 intrinsic.

LiuChen3 added inline comments. Comment at: clang/lib/Headers/amxintrin.h:283 +typedef struct __tile1024bf16_str { + const unsigned short row; LuoYuanke wrote: > pengfei wrote: > > Is there much value to differentiate the type? We are using the same AMX > >

[PATCH] D97358: [X86] Support amx-bf16 intrinsic.

LiuChen3 updated this revision to Diff 325988. LiuChen3 added a comment. Adding back 'avx512f' to amx-tile-basic.ll Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D97358/new/ https://reviews.llvm.org/D97358 Files:

[PATCH] D97358: [X86] Support amx-bf16 intrinsic.

LiuChen3 created this revision. Herald added subscribers: pengfei, hiraditya. LiuChen3 requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. Adding support for intrinsics of AMX-BF16. This patch alse fix a bug that AMX-INT8

[PATCH] D97259: [X86] Support amx-int8 intrinsic.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGf8b9035aae44: [X86] Support amx-int8 intrinsic. (authored by LiuChen3). Changed prior to commit:

[PATCH] D97259: [X86] Support amx-int8 intrinsic.

LiuChen3 added inline comments. Comment at: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:4625 + +case Intrinsic::x86_tdpbssd_internal: +case Intrinsic::x86_tdpbsud_internal: pengfei wrote: > Nit: Maybe we can try to move the lowering of the AMX intrinsics to

[PATCH] D97259: [X86] Support amx-int8 intrinsic.

LiuChen3 added inline comments. Comment at: clang/include/clang/Basic/BuiltinsX86_64.def:106 TARGET_BUILTIN(__builtin_ia32_tdpbssd_internal, "V256iUsUsUsV256iV256iV256i", "n", "amx-int8") + +TARGET_BUILTIN(__builtin_ia32_tdpbsud_internal, "V256iUsUsUsV256iV256iV256i", "n",

[PATCH] D97259: [X86] Support amx-int8 intrinsic.

LiuChen3 created this revision. Herald added subscribers: pengfei, hiraditya. LiuChen3 requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. Adding support for intrinsics of TDPBSUD/TDPBUSD/TDPBUUD. Repository: rG LLVM

[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG776f92e06759: [X86] Add support for vex, vex2, vex3, and evex for MASM (authored by LiuChen3). Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

LiuChen3 marked an inline comment as done. LiuChen3 added a comment. > It allows more than two, right? like `{vex}{vex2}{vex3} instruction`. I think > it should be a bug for att. Yes, My previous statement is incorrect, it should be ‘two more’. Thanks for your correction. We might need another

[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

LiuChen3 marked an inline comment as done. LiuChen3 added a comment. > 2. Delete IsPrefix parameter, and delete 'break' It should be 'continue'. Sorry for this mistake. Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3083 + } + if (IsPrefix) { +

[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

LiuChen3 updated this revision to Diff 305959. LiuChen3 added a comment. 1. Check prefix, ignoring case 2. Delete IsPrefix parameter, and delete 'break', so that we won't check prefix again. I am not sure if this is right. Att format can allow two prefix and using the last one as the finally

[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

LiuChen3 added inline comments. Comment at: clang/lib/AST/Stmt.cpp:795 + SmallVector Pieces; + AsmStr.split(Pieces, "\n\t"); + std::string MSAsmString; pengfei wrote: > Can we always assume the separator is `\n\t`? I think so. From the code, we can see '\n\t'

[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

LiuChen3 added a comment. Ping? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90441/new/ https://reviews.llvm.org/D90441 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

LiuChen3 added inline comments. Comment at: clang/lib/AST/Stmt.cpp:801 +// since we don't support masm style prefix in backend. +if (Instruction.startswith("vex ")) + MSAsmString += '{' + Instruction.substr(0, 3).str() + '}' + From X86AsmParser, the

[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

LiuChen3 updated this revision to Diff 304730. LiuChen3 added a comment. Rebase. Adding the '{}' to prefix when generate IR. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90441/new/ https://reviews.llvm.org/D90441 Files: clang/lib/AST/Stmt.cpp

[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

LiuChen3 added inline comments. Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:2851 +// Parse MASM style pseudo prefixes. +// FIXME: This prefix should only be used for MASM, not for intel-syntax. +if (isParsingIntelSyntax()) {

[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

LiuChen3 added inline comments. Comment at: clang/test/CodeGen/X86/ms-inline-asm-prefix.c:1 +// RUN:%clang_cc1 %s -ferror-limit 0 -triple=x86_64-pc-widows-msvc -target-feature +avx512f -target-feature +avx2 -target-feature +avx512vl -fasm-blocks -mllvm -x86-asm-syntax=intel -S

[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

LiuChen3 updated this revision to Diff 302769. LiuChen3 added a comment. 1. Address comments; 2. Only support parsing vex/vex2/vex3/evex prefix for MASM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90441/new/ https://reviews.llvm.org/D90441

[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

LiuChen3 added inline comments. Comment at: clang/test/CodeGen/X86/ms-inline-asm-prefix.c:1 +// RUN:%clang_cc1 %s -ferror-limit 0 -triple=x86_64-pc-widows-msvc -target-feature +avx512f -target-feature +avx2 -target-feature +avx512vl -fasm-blocks -mllvm -x86-asm-syntax=intel -S

[PATCH] D89105: [X86] Support Intel avxvnni

LiuChen3 marked 2 inline comments as done. LiuChen3 added a comment. Thanks for all of your review! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D89105/new/ https://reviews.llvm.org/D89105 ___

[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

LiuChen3 created this revision. Herald added subscribers: llvm-commits, cfe-commits, hiraditya. Herald added projects: clang, LLVM. LiuChen3 requested review of this revision. For MASM syntax, the prefixes are not enclosed in braces. The assembly code should like: "evex vcvtps2pd xmm0, xmm1"

[PATCH] D89184: Support complex target features combinations

LiuChen3 added a comment. In D89184#2363591 , @echristo wrote: > Let's go ahead and unblock you, but getting a lot of this refactored would be > great if you can. I think it's hitting the limits of the original design. :) Thanks! :) CHANGES SINCE

[PATCH] D89184: Support complex target features combinations

LiuChen3 added a comment. In D89184#2360846 , @echristo wrote: > I'll take a look tomorrow, sorry for the delay. No problem. Thanks! CHANGES SINCE LAST ACTION https://reviews.llvm.org/D89184/new/ https://reviews.llvm.org/D89184

[PATCH] D89184: Support complex target features combinations

LiuChen3 added a comment. Ping? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D89184/new/ https://reviews.llvm.org/D89184 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

LiuChen3 added a comment. In D90009#2354849 , @kiranchandramohan wrote: > I have added a fix to run the test only when the X86 target is available. > Please feel free to change if it is not the correct fix. >

[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG180548c5c784: [X86] VEX/EVEX prefix doesnt work for inline assembly. (authored by LiuChen3). Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D89184: Support complex target features combinations

LiuChen3 added a comment. Hi, @echristo. What's your opinion here? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D89184/new/ https://reviews.llvm.org/D89184 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

LiuChen3 added inline comments. Comment at: llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp:352 + if (Flags & X86::Force_VEXEncoding) +O << "\t{vex}"; + else if (Flags & X86::Force_VEX2Encoding) pengfei wrote: > `"\t{vex}\t"` ? No "\t" needed to

[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

LiuChen3 updated this revision to Diff 300188. LiuChen3 added a comment. Address comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90009/new/ https://reviews.llvm.org/D90009 Files: clang/test/CodeGen/X86/att-inline-asm-prefix.c

[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

LiuChen3 added inline comments. Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3896 +// encoder. Prefixes |= X86::IP_USE_VEX3; +Prefixes |= X86::Force_VEX3Encoding; craig.topper wrote: > LiuChen3 wrote: > > craig.topper wrote: > > > Why

[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

LiuChen3 added inline comments. Comment at: clang/test/CodeGen/X86/att-inline-asm-prefix.c:14 +"{vex2} vcvtps2pd %xmm0, %xmm1\n\t" +"{vex3} vcvtps2pd %xmm0, %xmm1\n\t" +"{evex} vcvtps2pd %xmm0, %xmm1\n\t" > Does this bug only effect the printing of

[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

LiuChen3 added inline comments. Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:2824 ForcedVEXEncoding = VEXEncoding_VEX; + else if (Prefix == "vex2") +ForcedVEXEncoding = VEXEncoding_VEX2; pengfei wrote: > I think it's

[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

LiuChen3 created this revision. Herald added subscribers: llvm-commits, cfe-commits, hiraditya. Herald added projects: clang, LLVM. LiuChen3 requested review of this revision. For now, we lost the encoding information if we using inline assembly. The encoding for the inline assembly will keep

[PATCH] D89184: Support complex target features combinations

LiuChen3 added a comment. In D89184#2346453 , @pengfei wrote: > LGTM. But I suggest you waiting for 1 or 2 days to see if other reviewers > object. Sure. Thanks. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D89184/new/

[PATCH] D89747: Add option to use older clang ABI behavior when passing certain union types as function arguments

LiuChen3 added a comment. Adding an option compatible with old abi is good method. Looks good for me. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D89747/new/ https://reviews.llvm.org/D89747 ___

[PATCH] D89184: Support complex target features combinations

LiuChen3 added a comment. ping? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D89184/new/ https://reviews.llvm.org/D89184 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D89184: Support complex target features combinations

LiuChen3 added inline comments. Comment at: clang/lib/CodeGen/CodeGenFunction.cpp:2389 } -if (!hasRequiredFeatures(ReqFeatures, CGM, FD, MissingFeature)) +if (!llvm::all_of(ReqFeatures, [&](StringRef Feature) { + if (!CallerFeatureMap.lookup(Feature)) {

[PATCH] D89361: [X86][NFC] Fix RUN line bug in the testcase

LiuChen3 added a comment. Thanks for all of your help! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D89361/new/ https://reviews.llvm.org/D89361 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D89361: [X86][NFC] Fix RUN line bug in the testcase

This revision was automatically updated to reflect the committed changes. Closed by commit rGbd05afcb3f40: [X86][NFC] Fix RUN line bug in the testcase (authored by LiuChen3). Herald added a project: clang. Herald added a subscriber: cfe-commits. Changed prior to commit:

[PATCH] D89184: Support complex target features combinations

LiuChen3 added a comment. > D89105 appears to use only `"avx512vl , > avx512vnni | avxvnni"`. > Does it mean `(avx512vl , avx512vnni) | avxvnni` or `avx512vl , (avx512vnni | > avxvnni)` ? Yes. "avx512vl , avx512vnni | avxvnni" means (avx512vl , avx512vnni) |

[PATCH] D78699: [X86] Passing union type through register.

LiuChen3 added a comment. In D78699#2328541 , @dyung wrote: > Hi, the test you added seems to pass both before and after your change, is > this intended? Oh, yes. I made mistake on my RUN line. So these tests are not really checked. Thanks for your

[PATCH] D78699: [X86] Passing union type through register.

LiuChen3 added a comment. In D78699#2320678 , @bruno wrote: > LGTM Thanks for your review. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D78699/new/ https://reviews.llvm.org/D78699

[PATCH] D78699: [X86] Passing union type through register.

This revision was automatically updated to reflect the committed changes. Closed by commit rG26cfb6e562f1: [X86] Passing union type through register (authored by LiuChen3). Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D60748: Adds an option "malign-pass-aggregate" to make the alignment of the struct and union parameters compatible with the default gcc

LiuChen3 abandoned this revision. LiuChen3 added a comment. In D60748#2310148 , @RKSimon wrote: > @wxiao3 @LiuChen3 Are you still looking at this or should it be abandoned? I will abandon this patch for it is difficult to confirm the behavior of gcc.

[PATCH] D78533: [i386] Fix bug that get __m128/__m256/__m512 with wrong alignment for variadic functions.

LiuChen3 added a comment. I uploaded a new patch D78564 as another solution, but it modified the current clang calling convention. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D78533/new/ https://reviews.llvm.org/D78533

[PATCH] D78473: [i386] Fix bug that get __m128/__m256/__m512 with wrong alignment for variadic functions.Currently clang aligns to 16 bytes when passing __m128/__m256/__m512 vector type.However, when

LiuChen3 created this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. LiuChen3 abandoned this revision. ...alignment, including struct, union and vector types. For struct/union, there is no probem because it will align to 4 bytes when passing them. For

[PATCH] D60748: Adds an option "malign-pass-aggregate" to make the alignment of the struct and union parameters compatible with the default gcc

LiuChen3 marked an inline comment as done. LiuChen3 added inline comments. Comment at: clang/lib/CodeGen/TargetInfo.cpp:1570 +return 4; +} else if (Align < 16) + return MinABIStackAlignInBytes; LiuChen3 wrote: > jyknight wrote: > > If I

[PATCH] D60748: Adds an option "malign-pass-aggregate" to make the alignment of the struct and union parameters compatible with the default gcc

LiuChen3 marked 3 inline comments as done. LiuChen3 added inline comments. Comment at: clang/lib/CodeGen/TargetInfo.cpp:1559 + if (const auto *AT = QT->getAsArrayTypeUnsafe()) +TempAlignment = getContext().getTypeAlign(AT->getElementType()) / 8; +

[PATCH] D60748: Adds an option "malign-pass-aggregate" to make the alignment of the struct and union parameters compatible with the default gcc

LiuChen3 added a comment. > I think at least the initial patch is correct. I re-read your comment above, please ignore this sentence. Sorry for the noise. My question now is that since we cannot guarantee that we are doing the right thing, is this patch necessary? CHANGES SINCE LAST ACTION

[PATCH] D60748: Adds an option "malign-pass-aggregate" to make the alignment of the struct and union parameters compatible with the default gcc

LiuChen3 marked 3 inline comments as done. LiuChen3 added a comment. In D60748#1931440 , @jyknight wrote: > Since the ABI this is trying to match is not documented literally anywhere, I > think we need to have some confidence that what this implements is

[PATCH] D60748: Adds an option "malign-pass-aggregate" to make the alignment of the struct and union parameters compatible with the default gcc

LiuChen3 updated this revision to Diff 251290. LiuChen3 retitled this revision from " Fix i386 struct and union parameter alignment" to "Adds an option "malign-pass-aggregate" to make the alignment of the struct and union parameters compatible with the default gcc". LiuChen3 edited the summary

[PATCH] D60748: Fix i386 struct and union parameter alignment

LiuChen3 added a comment. In D60748#1924794 , @rjmccall wrote: > Oh, I see you just updated your patch months ago without ever mentioning that > it was ready for review. > > It sounds to me like GCC retroactively added a switch specifying which >

[PATCH] D60748: Fix i386 struct and union parameter alignment

LiuChen3 updated this revision to Diff 250483. LiuChen3 added a comment. Herald added a subscriber: arichardson. rebase. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D60748/new/ https://reviews.llvm.org/D60748 Files: clang/lib/CodeGen/TargetInfo.cpp

[PATCH] D60748: Fix i386 struct and union parameter alignment

LiuChen3 added a comment. Ping? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D60748/new/ https://reviews.llvm.org/D60748 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

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