[PATCH] D152206: [Basic] Support 64-bit x86 target for UEFI

mbrkusanin added a comment. If there are others experiencing the same error then I can push my fix: https://github.com/llvm/llvm-project/pull/67696 if there are no other suggestions. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152206/new/

[PATCH] D152206: [Basic] Support 64-bit x86 target for UEFI

mbrkusanin added inline comments. Comment at: llvm/unittests/IR/DataLayoutTest.cpp:109 +TEST(DataLayoutTest, UEFI) { + Triple TT = Triple("x86_64-unknown-uefi"); + Prabhuk wrote: > mbrkusanin wrote: > > This is giving me a linker error: > > > > $ ninja

[PATCH] D152206: [Basic] Support 64-bit x86 target for UEFI

mbrkusanin added inline comments. Comment at: llvm/unittests/IR/DataLayoutTest.cpp:109 +TEST(DataLayoutTest, UEFI) { + Triple TT = Triple("x86_64-unknown-uefi"); + This is giving me a linker error: $ ninja unittests/IR/IRTests /usr/bin/ld:

[PATCH] D73644: [Mips] Add intrinsics for 4-byte and 8-byte MSA loads/stores.

This revision was automatically updated to reflect the committed changes. Closed by commit rG5ba931a84a34: [Mips] Add intrinsics for 4-byte and 8-byte MSA loads/stores. (authored by mbrkusanin). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D73644: [Mips] Add intrinsics for 4-byte and 8-byte MSA loads/stores.

mbrkusanin updated this revision to Diff 243775. mbrkusanin edited the summary of this revision. mbrkusanin added a comment. - Rebase - Rename **ldrq_w** to **ldr_w**; Rename **strq_w** to **str_w**. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D73644/new/

[PATCH] D73644: [Mips] Add intrinsics for 4-byte and 8-byte MSA loads/stores.

mbrkusanin added a comment. Not yet, a proposal was made to both GCC and LLVM and as far as I can tell no work was done on GCC yet. If we accept these names I'll let them know so we end up with matching names. As for 4/8 byte loads, in case of having them implemented as **ld** plus some extra

[PATCH] D73644: [Mips] Add intrinsics for 4-byte and 8-byte MSA loads/stores.

mbrkusanin added a comment. Rebase. Not yet, a proposal was made to both GCC and LLVM and as far as I can tell no work was done on that yet. If we accept these names I'll let them know so we end up with matching names. As for 4/8 byte loads, in case of having them implemented as **ld** plus

[PATCH] D73644: [Mips] Add intrinsics for 4-byte and 8-byte MSA loads/stores.

mbrkusanin updated this revision to Diff 243153. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D73644/new/ https://reviews.llvm.org/D73644 Files: clang/include/clang/Basic/BuiltinsMips.def clang/lib/Headers/msa.h clang/lib/Sema/SemaChecking.cpp

[PATCH] D73644: [Mips] Add intrinsics for 4-byte and 8-byte MSA loads/stores.

mbrkusanin added a comment. We could do that for loads. For example on Mips32r5 (where we need most instructions) for intrinsic **ldr_d** instead of: lwr $1, 16($5) lwl $1, 19($5) lwr $2, 20($5) lwl $2, 23($5) fill.w $w0, $1

[PATCH] D73644: [Mips] Add intrinsics for 4-byte and 8-byte MSA loads/stores.

mbrkusanin added a comment. A few notes/questions: 1. Generated code was tested with Qemu: - For mips32r5 Qemu provides p5600 - For mips64r6 Qemu provides i6400 - For mips64r5 there is no cpu on Qemu with MSA and it appears that there won't be any hardware with Mips64r5 and MSA. - For

[PATCH] D73644: [Mips] Add intrinsics for 4-byte and 8-byte MSA loads/stores.

mbrkusanin created this revision. mbrkusanin added reviewers: atanasyan, petarj, sdardis, mstojanovic. mbrkusanin added projects: LLVM, clang. Herald added subscribers: cfe-commits, jrtc27, hiraditya, arichardson. New intrinisics are implemented for when we need to port SIMD code from other

[PATCH] D66795: [Mips] Use appropriate private label prefix based on Mips ABI

This revision was automatically updated to reflect the committed changes. Closed by commit rG4b63ca1379a8: [Mips] Use appropriate private label prefix based on Mips ABI (authored by mbrkusanin). Changed prior to commit: https://reviews.llvm.org/D66795?vs=224603=226112#toc Repository: rG

[PATCH] D66795: [Mips] Use appropriate private label prefix based on Mips ABI

mbrkusanin updated this revision to Diff 224603. mbrkusanin added a comment. - Rebase - Ping @echristo @craig.topper @tstellar @dylanmckay @petecoup If there are no objections then I'll split this into llvm, clang and lldb patches and commit them next week. CHANGES SINCE LAST ACTION

[PATCH] D66795: [Mips] Use appropriate private label prefix based on Mips ABI

mbrkusanin updated this revision to Diff 222832. mbrkusanin added a comment. - rebase CHANGES SINCE LAST ACTION https://reviews.llvm.org/D66795/new/ https://reviews.llvm.org/D66795 Files: clang/lib/Parse/ParseStmtAsm.cpp clang/tools/driver/cc1as_main.cpp

[PATCH] D66795: [Mips] Use appropriate private label prefix based on Mips ABI

mbrkusanin added a comment. @echristo @craig.topper @uweigand @tstellar @dylanmckay @petecoup Do you have any comments on the current patch? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D66795/new/ https://reviews.llvm.org/D66795 ___

[PATCH] D66795: [Mips] Use appropriate private label prefix based on Mips ABI

mbrkusanin updated this revision to Diff 221931. mbrkusanin added reviewers: echristo, craig.topper, uweigand, tstellar, dylanmckay, petecoup. mbrkusanin added a comment. - rebase CHANGES SINCE LAST ACTION https://reviews.llvm.org/D66795/new/ https://reviews.llvm.org/D66795 Files:

[PATCH] D66795: [Mips] Use appropriate private label prefix based on Mips ABI

mbrkusanin added a comment. Any comment on whether we should split this into two patches? One that adds `MCTargetOptions` to `MCAsmInfo` and another one that just fixes prefixes for Mips. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D66795/new/ https://reviews.llvm.org/D66795

[PATCH] D66795: [Mips] Use appropriate private label prefix based on Mips ABI

mbrkusanin updated this revision to Diff 220830. mbrkusanin added a comment. - `MipsMCAsmInfo()` now always reads ABI from `MipsABIInfo` instead of `Triple`. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D66795/new/ https://reviews.llvm.org/D66795 Files:

[PATCH] D66795: [Mips] Use appropriate private label prefix based on Mips ABI

mbrkusanin added a comment. In D66795#1650305 , @atanasyan wrote: > But take a look at `LLVMCreateDisasmCPUFeatures` function from > `Disassembler.cpp`. If we cannot retrieve `MCTargetOptions` right in this > function, we will have to change "LLVM-C"

[PATCH] D66795: [Mips] Use appropriate private label prefix based on Mips ABI

mbrkusanin updated this revision to Diff 220675. mbrkusanin added a comment. Herald added subscribers: lldb-commits, cfe-commits, seiya, lenary, rupprecht, jrtc27, hiraditya. Herald added projects: clang, LLDB. - MCTargetOptions is now always passed to MCAsmInfo (or rather createMCAsmInfo). In