[PATCH] D146242: [ARM] Fixing ABI mismatch for packed structs and fields

olista01 accepted this revision. olista01 added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D146242/new/ https://reviews.llvm.org/D146242

[PATCH] D146802: [Documentation] improved documentation of diagnostic messages by explaining thier syntax and test of clang by telling which subobject is uninitialized

olista01 added a comment. There is existing documentation of the diagnostics system here, which you could extend if something is still unclear or incomplete: - clang/docs/InternalsManual.rst - https://clang.llvm.org/docs/InternalsManual.html#the-diagnostics-subsystem Repository: rG LLVM

[PATCH] D138143: [FPEnv] Enable strict fp for AArch64 in clang

olista01 accepted this revision. olista01 added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138143/new/ https://reviews.llvm.org/D138143

[PATCH] D59631: [AArch64] Support selecting TPIDR_EL[1-3] as the thread base

This revision was automatically updated to reflect the committed changes. Closed by commit rC357250: [AArch64] Support selecting TPIDR_EL[1-3] as the thread base (authored by olista01, committed by ). Changed prior to commit: https://reviews.llvm.org/D59631?vs=191800=192814#toc Repository:

[PATCH] D59631: [AArch64] Support selecting TPIDR_EL[1-3] as the thread base

olista01 accepted this revision. olista01 added a comment. This revision is now accepted and ready to land. I can't see any other uses of the option groups, or any way to put an option into two groups, so this LGTM. I'll commit it for you as before. CHANGES SINCE LAST ACTION

[PATCH] D59631: [AArch64] Support selecting TPIDR_EL[1-3] as the thread base

olista01 added a reviewer: olista01. olista01 added a comment. Is there an existing compiler which this option is trying to be compatible with? GCC for AArch64 doesn't currently have an option for this, so we don't have to worry about compatibility with that. If possible, I'd prefer for the

[PATCH] D57765: [ARM] Add Cortex-M35P Support

olista01 accepted this revision. olista01 added a comment. This revision is now accepted and ready to land. LGTM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57765/new/ https://reviews.llvm.org/D57765 ___ cfe-commits mailing list

[PATCH] D23610: [ARM] Add pre-defined macros for ROPI and RWPI

This revision was automatically updated to reflect the committed changes. Closed by commit rL354265: [ARM] Add pre-defined macros for ROPI and RWPI (authored by olista01, committed by ). Changed prior to commit: https://reviews.llvm.org/D23610?vs=91990=187220#toc Repository: rL LLVM

[PATCH] D23610: [ARM] Add pre-defined macros for ROPI and RWPI

olista01 added a comment. Yes, the back-end work was all done years ago, I just also forgot about these while waiting for the ACLE to be published. Repository: rL LLVM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D23610/new/ https://reviews.llvm.org/D23610

[PATCH] D23610: [ARM] Add pre-defined macros for ROPI and RWPI

olista01 added a comment. These macros have been in the published ACLE for a while now: https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros#position-independent-code Repository: rL LLVM CHANGES SINCE LAST ACTION

[PATCH] D57765: [ARM] Add Cortex-M35P Support

olista01 requested changes to this revision. olista01 added inline comments. This revision now requires changes to proceed. Comment at: test/Driver/arm-cortex-cpus.c:826 // RUN: %clang -target arm -mcpu=cortex-m33 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV8MMAIN %s

[PATCH] D57764: [AArch64] Add Cortex-A76 and Cortex-A76AE Support

olista01 accepted this revision. olista01 added a comment. This revision is now accepted and ready to land. LGTM, but please remember to upload with more context. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57764/new/ https://reviews.llvm.org/D57764

[PATCH] D54148: [NFC][Clang][Aarch64] Add missing test file

olista01 accepted this revision. olista01 added a comment. This revision is now accepted and ready to land. LGTM Repository: rC Clang https://reviews.llvm.org/D54148 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D51429: [AArch64] Return Address Signing B Key Support

olista01 accepted this revision. olista01 added a comment. This revision is now accepted and ready to land. LGTM, thanks! https://reviews.llvm.org/D51429 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D51429: [AArch64] Return Address Signing B Key Support

olista01 added inline comments. Comment at: lib/CodeGen/CGDeclCXX.cpp:364 if (RASignKind != CodeGenOptions::SignReturnAddressScope::None) + { Fn->addFnAttr("sign-return-address", LLVM style has the opening brace on the same line as the if. There's a

[PATCH] D51429: [AArch64] Return Address Signing B Key Support

olista01 added inline comments. Comment at: lib/Frontend/CompilerInvocation.cpp:1133 + if (Arg *A = Args.getLastArg(OPT_msign_return_address_EQ)) { +const auto SignScopeKey = StringRef(A->getValue()).split('+'); +StringRef SignScope = SignScopeKey.first;

[PATCH] D52493: [AArch64][v8.5A] Test clang option for the Memory Tagging Extension

This revision was automatically updated to reflect the committed changes. Closed by commit rC343566: [AArch64][v8.5A] Test clang option for the Memory Tagging Extension (authored by olista01, committed by ). Changed prior to commit: https://reviews.llvm.org/D52493?vs=166910=167900#toc

[PATCH] D52492: [AArch64][v8.5A] Test optional Armv8.5-A random number extension

This revision was automatically updated to reflect the committed changes. Closed by commit rC343220: [AArch64][v8.5A] Test optional Armv8.5-A random number extension (authored by olista01, committed by ). Changed prior to commit: https://reviews.llvm.org/D52492?vs=166909=167322#toc

[PATCH] D52491: [ARM/AArch64][v8.5A] Add Armv8.5-A target

This revision was automatically updated to reflect the committed changes. Closed by commit rC343111: [ARM/AArch64][v8.5A] Add Armv8.5-A target (authored by olista01, committed by ). Changed prior to commit: https://reviews.llvm.org/D52491?vs=166908=167130#toc Repository: rC Clang

[PATCH] D52492: [AArch64][v8.5A] Test optional Armv8.5-A random number extension

olista01 created this revision. Herald added a reviewer: javed.absar. Herald added subscribers: cfe-commits, chrib, kristof.beyls. The implementation of this is in TargetParser, so we only need to add a test for it in clang. Patch by Pablo Barrio! Repository: rC Clang

[PATCH] D52493: [AArch64][v8.5A] Test clang option for the Memory Tagging Extension

olista01 created this revision. Herald added a reviewer: javed.absar. Herald added subscribers: cfe-commits, kristof.beyls. The implementation of this is in TargetParser, so we only need to add a test for it in clang. Patch by Pablo Barrio! Repository: rC Clang

[PATCH] D52491: [ARM/AArch64][v8.5A] Add Armv8.5-A target

olista01 created this revision. Herald added a reviewer: javed.absar. Herald added subscribers: cfe-commits, chrib, kristof.beyls. This patch allows targetting Armv8.5-A from Clang. Most of the implementation is in TargetParser, so this is mostly just adding tests. Patch by Pablo Barrio!

[PATCH] D51432: [AArch64] Unwinding support for return address signing

olista01 accepted this revision. olista01 added a comment. This revision is now accepted and ready to land. LGTM, thanks! https://reviews.llvm.org/D51432 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D51432: [AArch64] Unwinding support for return address signing

olista01 added inline comments. Comment at: src/DwarfInstructions.hpp:210 +register unsigned long long x16 __asm("x16") = cfa; +asm("autia1716": "+r"(x17): "r"(x16)); +returnAddress = x17; I don't think this will work for cross-unwinding

[PATCH] D51429: [AArch64] Return Address Signing B Key Support

olista01 added a comment. This looks like it has the same problem as https://reviews.llvm.org/D51418 (doesn't get applied to C++ static constructor functions). Repository: rC Clang https://reviews.llvm.org/D51429 ___ cfe-commits mailing list

[PATCH] D51418: [AArch64] Enable return address signing for static ctors

This revision was automatically updated to reflect the committed changes. Closed by commit rC342126: [AArch64] Enable return address signing for static ctors (authored by olista01, committed by ). Herald added a subscriber: cfe-commits. Repository: rC Clang https://reviews.llvm.org/D51418

[PATCH] D49793: [AArch64] - return address signing

olista01 accepted this revision. olista01 added a comment. This revision is now accepted and ready to land. LGTM, thanks! https://reviews.llvm.org/D49793 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D50175: [AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests

olista01 accepted this revision. olista01 added a comment. This revision is now accepted and ready to land. LGTM, thanks! https://reviews.llvm.org/D50175 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D50175: [AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests

olista01 added inline comments. Comment at: test/Driver/aarch64-cpus.c:10 +// GENERIC: "-cc1"{{.*}} "-triple" "aarch64"{{.*}} "-target-cpu" "generic" +// GENERIC-LE: "-cc1"{{.*}} "-triple" "aarch64--"{{.*}} "-target-cpu" "generic" SjoerdMeijer wrote: >

[PATCH] D50175: [AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests

olista01 added inline comments. Comment at: test/Driver/aarch64-cpus.c:10 +// GENERIC: "-cc1"{{.*}} "-triple" "aarch64"{{.*}} "-target-cpu" "generic" +// GENERIC-LE: "-cc1"{{.*}} "-triple" "aarch64--"{{.*}} "-target-cpu" "generic" Why do these need new check

[PATCH] D46109: [ARM, AArch64] Add intrinsics for dot product instructions

This revision was automatically updated to reflect the committed changes. Closed by commit rC331039: [ARM,AArch64] Add intrinsics for dot product instructions (authored by olista01, committed by ). Changed prior to commit: https://reviews.llvm.org/D46109?vs=144081=144341#toc Repository: rC

[PATCH] D46109: [ARM, AArch64] Add intrinsics for dot product instructions

olista01 marked an inline comment as done. olista01 added inline comments. Comment at: test/CodeGen/arm-neon-dot-product.c:1 +// RUN: %clang_cc1 -triple armv8-linux-gnueabihf -target-cpu cortex-a57 -target-feature +dotprod \ +// RUN: -disable-O0-optnone -emit-llvm -o - %s |

[PATCH] D46108: [ARM] Add __ARM_FEATURE_DOTPROD pre-defined macro

This revision was automatically updated to reflect the committed changes. Closed by commit rC331038: [ARM] Add __ARM_FEATURE_DOTPROD pre-defined macro (authored by olista01, committed by ). Changed prior to commit: https://reviews.llvm.org/D46108?vs=144080=144339#toc Repository: rC Clang

[PATCH] D46109: [ARM, AArch64] Add intrinsics for dot product instructions

olista01 created this revision. olista01 added reviewers: rengolin, SjoerdMeijer, flyingforyou. Herald added a reviewer: javed.absar. Herald added subscribers: llvm-commits, chrib, kristof.beyls. The ACLE spec which describes these intrinsics hasn't been published yet, but this is based on the

[PATCH] D46108: [ARM] Add __ARM_FEATURE_DOTPROD pre-defined macro

olista01 created this revision. olista01 added reviewers: rengolin, SjoerdMeijer, flyingforyou. Herald added a reviewer: javed.absar. Herald added subscribers: llvm-commits, chrib, kristof.beyls. This adds a pre-defined macro to test if the compiler has support for the v8.2-A dot rpoduct

[PATCH] D38452: Mark test as a long-test

olista01 accepted this revision. olista01 added a comment. This revision is now accepted and ready to land. LGTM. https://reviews.llvm.org/D38452 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D36666: [ObjC] Use consistent comment style in inline asm

This revision was automatically updated to reflect the committed changes. Closed by commit rL311325: [ObjC] Use consistent comment style in inline asm (authored by olista01). Changed prior to commit: https://reviews.llvm.org/D3?vs=110927=111942#toc Repository: rL LLVM

[PATCH] D36666: [ObjC] Use consistent comment style in inline asm

olista01 added reviewers: rnk, niravd, SjoerdMeijer. olista01 added a comment. Ping. Repository: rL LLVM https://reviews.llvm.org/D3 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D36666: [ObjC] Use consistent comment style in inline asm

olista01 created this revision. Herald added a subscriber: javed.absar. The comment markers accepted by the assembler vary between different targets, but '//' is always accepted, so we should use that for consistency. Repository: rL LLVM https://reviews.llvm.org/D3 Files:

[PATCH] D23610: [ARM] Add pre-defined macros for ROPI and RWPI

olista01 added a comment. Ping. Repository: rL LLVM https://reviews.llvm.org/D23610 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D31765: Skip Unicode character expansion in assembly files

olista01 accepted this revision. olista01 added a comment. This revision is now accepted and ready to land. LGTM https://reviews.llvm.org/D31765 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D31501: [RFC] Integrate clang -cc1as diagnostics into DiagnosticsEngine

olista01 added a comment. That all sounds sensible from an assembler perspective, especially the ability to gradually move diagnostics into categories rather than having one big change that touches every assembler diag. However, I've not done much work in clang, so it would be good to get

[PATCH] D23610: [ARM] Add pre-defined macros for ROPI and RWPI

olista01 updated this revision to Diff 91990. olista01 retitled this revision from "[ARM] Add pre-defined macros for ROPI, RWPI and FPIC" to "[ARM] Add pre-defined macros for ROPI and RWPI". olista01 edited the summary of this revision. Repository: rL LLVM https://reviews.llvm.org/D23610

[PATCH] D23610: [ARM] Add pre-defined macros for ROPI, RWPI and FPIC

olista01 added a comment. My patch to the ACLE has now been accepted, so it will be in the next release. This is the wording: __ARM_ROPI is defined to 1 if the translation unit is being compiled in read-only position independent mode. In this mode, all read-only data and functions are at a

[PATCH] D23610: [ARM] Add pre-defined macros for ROPI, RWPI and FPIC

olista01 added a comment. I've proposed a patch to the ACLE to add these macros, but it's stalled in review. I've just given it a ping, I'll try to get an answer soon. Repository: rL LLVM https://reviews.llvm.org/D23610 ___ cfe-commits mailing