[PATCH] D152495: [Clang][SemaCXX] Add unused warning for variables declared in condition expressions

pranavk added a comment. I agree -Wunused-condition-variable sounds like a good idea. There are still numerous instances of this warning/error showing up when doing a self-build of LLVM, let alone warnings/errors that are showing up in internal code bases who are using LLVM HEAD for compiling t

[PATCH] D147266: [AArch64] Sink operands to allow for bitselect instructions

pranavk added a comment. I forgot to update the differential link in the commit but this patch was merged as part of (https://github.com/llvm/llvm-project/commit/726785b1594c6b567c5c8ddd59075aee726590c6) Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.or

[PATCH] D147266: [AArch64] Sink operands to allow for bitselect instructions

pranavk added a comment. This has been superseded by https://reviews.llvm.org/D147266 I forgot to update the link in the final commit here (https://github.com/llvm/llvm-project/commit/726785b1594c6b567c5c8ddd59075aee726590c6) Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION h

[PATCH] D147266: [AArch64] Sink operands to allow for bitselect instructions

pranavk closed this revision. pranavk added a comment. > I noticed there was another instance of vbsl being reported recently in > https://github.com/llvm/llvm-project/issues/62642. Hopefully it can be > addresses via extra optimizations too. This is another InstCombine problem -- as soon as it

[PATCH] D147266: [AArch64] Sink operands to allow for bitselect instructions

pranavk added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:14361-14363 + for (unsigned Idx = 0; Idx < MainAnd->getNumOperands(); Idx++) { +if (MainAnd->getOperand(Idx) != IA) { + Ops.push_back(&MainAnd->getOperandU

[PATCH] D147266: [AArch64] Sink operands to allow for bitselect instructions

pranavk added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:14361-14363 + for (unsigned Idx = 0; Idx < MainAnd->getNumOperands(); Idx++) { +if (MainAnd->getOperand(Idx) != IA) { + Ops.push_back(&MainAnd->getOperandU

[PATCH] D147266: [AArch64] Sink operands to allow for bitselect instructions

pranavk updated this revision to Diff 522309. pranavk marked 3 inline comments as done. pranavk added a comment. address reviewer comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147266/new/ https://reviews.llvm.org/D147266 Files: llvm/lib

[PATCH] D147266: [AArch64] Sink operands to allow for bitselect instructions

pranavk updated this revision to Diff 521545. pranavk added a comment. More concise pattern matching Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147266/new/ https://reviews.llvm.org/D147266 Files: llvm/lib/Target/AArch64/AArch64ISelLowering.cp

[PATCH] D147266: [AArch64] Sink operands to allow for bitselect instructions

pranavk updated this revision to Diff 521505. pranavk added a comment. add test Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147266/new/ https://reviews.llvm.org/D147266 Files: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/test/CodeGen

[PATCH] D147266: [AArch64] Sink operands to allow for bitselect instructions

pranavk added a comment. tests coming Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147266/new/ https://reviews.llvm.org/D147266 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm

[PATCH] D147266: [AArch64] Sink operands to allow for bitselect instructions

pranavk updated this revision to Diff 521474. pranavk edited the summary of this revision. pranavk added a comment. Address reviewer comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147266/new/ https://reviews.llvm.org/D147266 Files: llvm/

[PATCH] D147266: [AArch64] Sink operands to allow for bitselect instructions

pranavk planned changes to this revision. pranavk marked 2 inline comments as done. pranavk added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:14343 +// passed to this function. Starting pattern matching with any other +// instruction (such

[PATCH] D147266: [AArch64] Add IR intrinsics for vbsl* C intrinsics

pranavk updated this revision to Diff 521115. pranavk added a comment. [AArch64] Change shouldSinkOperand to allow bitselect instructions Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147266/new/ https://reviews.llvm.org/D147266 Files: llvm/lib/

[PATCH] D147266: [AArch64] Add IR intrinsics for vbsl* C intrinsics

pranavk updated this revision to Diff 521114. pranavk added a comment. [AArch64][InstCombine] Bail out for bitselect instructions Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147266/new/ https://reviews.llvm.org/D147266 Files: llvm/lib/Transfor

[PATCH] D147266: [AArch64] Add IR intrinsics for vbsl* C intrinsics

pranavk planned changes to this revision. pranavk added a comment. I agree. I changed the implementation to not introduce the intrinsic. I will need another change in InstCombine to handle case #1 mentioned on github bug report. I will have separate patch for it changing InstCombine. Thanks Re

[PATCH] D147266: [AArch64] Add IR intrinsics for vbsl* C intrinsics

pranavk updated this revision to Diff 521040. pranavk edited the summary of this revision. pranavk added a comment. Change shouldSinkOperand to allow backend to generate bitselect instructions Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147266/new

[PATCH] D147360: [AArch64] Add IR intrinsic for vbsl*

pranavk created this revision. Herald added subscribers: hiraditya, kristof.beyls. Herald added a project: All. pranavk requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. Repository: rG LLVM Github Monorepo https://reviews

[PATCH] D147266: [AArch64] Add IR intrinsics for vbsl* C intrinsics

pranavk created this revision. Herald added subscribers: hiraditya, kristof.beyls. Herald added a project: All. pranavk requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. VBSL intrinsics can be found here: https://developer.