[PATCH] D147525: [X86] Add AMX_COMPLEX to Graniterapids

xiangzhangllvm accepted this revision. xiangzhangllvm added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147525/new/ https://reviews.llvm.org/D147525 ___ cfe-commits mailing list

[PATCH] D147420: [X86] Support AMX Complex instructions

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG038b7e6b761c: [X86] Support AMX Complex instructions (authored by xiangzhangllvm). Herald added a project: clang. Herald added a subscriber:

[PATCH] D138547: [X86][AMX] Fix typo of the headerfile.

xiangzhangllvm accepted this revision. xiangzhangllvm added a comment. This revision is now accepted and ready to land. LGTM， thanks Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138547/new/ https://reviews.llvm.org/D138547

[PATCH] D135941: [X86] Support AMX-FP16

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG661881d43633: [X86] Add AMX-FP16 instructions. (authored by xiangzhangllvm). Herald added a project: clang. Herald added a subscriber: cfe-commits.

[PATCH] D132636: [X86][bugfix] redefine __SSC_MARK to escape cpp string literal concatenation problem

This revision was automatically updated to reflect the committed changes. Closed by commit rG2da0df5e7cac: [X86][bugfix] redefine __SSC_MARK to escape cpp string literal concatenation… (authored by xiangzhangllvm). Herald added a project: clang. Herald added a subscriber: cfe-commits.

[PATCH] D130065: [X86] Use Min behavior for cf-protection-{return,branch}/ibt-seal module flags

xiangzhangllvm added inline comments. Comment at: clang/lib/CodeGen/CodeGenModule.cpp:746 // Indicate that we want to instrument return control flow protection. -getModule().addModuleFlag(llvm::Module::Override, "cf-protection-return", +

[PATCH] D130065: [X86] Use Min behavior for cf-protection-{return,branch}/ibt-seal module flags

xiangzhangllvm added inline comments. Comment at: clang/lib/CodeGen/CodeGenModule.cpp:746 // Indicate that we want to instrument return control flow protection. -getModule().addModuleFlag(llvm::Module::Override, "cf-protection-return", +

[PATCH] D129826: [X86] [BugFix] Add 64 bit implement for __SSC_MARK

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG4bb19de4b6cb: [X86] Add 64 bit implement for __SSC_MARK (authored by xiangzhangllvm). Herald added a project: clang. Herald added a subscriber:

[PATCH] D129346: [X86] [Linux build][Stack Protector] Support for -mstack-protector-guard-symbol

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGa45dd3d8140e: [X86] Support -mstack-protector-guard-symbol (authored by xiangzhangllvm). Herald added a project: clang. Herald added a subscriber:

[PATCH] D118355: Add -mmanual-endbr switch to allow manual selection of control-flow protection

xiangzhangllvm added inline comments. Comment at: llvm/lib/Target/X86/X86IndirectBranchTracking.cpp:156-161 if (needsPrologueENDBR(MF, M)) { -auto MBB = MF.begin(); -Changed |= addENDBR(*MBB, MBB->begin()); +if (!ManualENDBR || MF.getFunction().doesCfCheck()) { +

[PATCH] D118355: Add -mmanual-endbr switch to allow manual selection of control-flow protection

xiangzhangllvm added inline comments. Comment at: llvm/lib/Target/X86/X86IndirectBranchTracking.cpp:156-161 if (needsPrologueENDBR(MF, M)) { -auto MBB = MF.begin(); -Changed |= addENDBR(*MBB, MBB->begin()); +if (!ManualENDBR || MF.getFunction().doesCfCheck()) { +

[PATCH] D124067: [x86] Support 3 builtin functions for 32-bits targets

xiangzhangllvm added a comment. close with clang format at commit 6454ff35e0e7b0c0762c640031aa6c2b5d1f16ec [Clang Format] emmintrin.h smmintrin.h (NFC) Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D124067: [x86] Support 3 builtin functions for 32-bits targets

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGafa536e33e10: [x86] Support 3 builtin functions for 32-bits mode (authored by xiangzhangllvm). Herald added a project: clang. Changed prior to

[PATCH] D124067: [x86] Support 3 builtin functions for 32-bits targets

xiangzhangllvm marked an inline comment as done. xiangzhangllvm added inline comments. Comment at: clang/lib/Headers/emmintrin.h:3476 +/// This intrinsic corresponds to the VMOVQ / MOVQ instruction +/// in 64 bits. /// RKSimon wrote: > xiangzhangllvm wrote: >

[PATCH] D124067: [x86] Support 3 builtin functions for 32-bits targets

xiangzhangllvm marked an inline comment as done. xiangzhangllvm added inline comments. Comment at: clang/lib/Headers/emmintrin.h:3476 +/// This intrinsic corresponds to the VMOVQ / MOVQ instruction +/// in 64 bits. /// craig.topper wrote: > craig.topper

[PATCH] D124067: [x86] Support 3 builtin functions for 32-bits targets

xiangzhangllvm updated this revision to Diff 424113. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124067/new/ https://reviews.llvm.org/D124067 Files: clang/include/clang/Basic/BuiltinsX86.def clang/include/clang/Basic/BuiltinsX86_64.def clang/lib/Headers/emmintrin.h

[PATCH] D124067: [x86] Support 3 builtin functions for 32-bits targets

xiangzhangllvm updated this revision to Diff 424070. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124067/new/ https://reviews.llvm.org/D124067 Files: clang/include/clang/Basic/BuiltinsX86.def clang/include/clang/Basic/BuiltinsX86_64.def clang/lib/Headers/emmintrin.h

[PATCH] D124067: [x86] Support 3 builtin functions for 32-bits targets

xiangzhangllvm marked an inline comment as done. xiangzhangllvm added inline comments. Comment at: clang/test/CodeGen/X86/sse2-builtins.c:547 // X64: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0 // X64: insertelement <2 x i64> %{{.*}}, i64 0, i32 1 return

[PATCH] D124067: [x86] Support 3 builtin functions for 32-bits targets

xiangzhangllvm updated this revision to Diff 424067. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124067/new/ https://reviews.llvm.org/D124067 Files: clang/include/clang/Basic/BuiltinsX86.def clang/include/clang/Basic/BuiltinsX86_64.def clang/lib/Headers/emmintrin.h

[PATCH] D124067: [x86] Support 3 builtin functions for 32-bits targets

xiangzhangllvm added a comment. In D124067#3461551 , @RKSimon wrote: > OK - SSE2/SSE41 now have i386 coverage - please can you rebase and update the > checks to use CHECK/X64/X86 ? Hi @RKSimon, I very appreciate your help to update the test! You are

[PATCH] D124067: [x86] Support 3 builtin functions for 32-bits targets

xiangzhangllvm added inline comments. Comment at: clang/test/CodeGen/X86/sse2-builtins.c:560 // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1 + // X86-LABEL: test_mm_cvtsi64_si128 + // X86: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0 LiuChen3

[PATCH] D124067: [x86] Support 3 builtin functions for 32-bits targets

xiangzhangllvm added inline comments. Comment at: clang/test/CodeGen/X86/sse2-builtins.c:560 // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1 + // X86-LABEL: test_mm_cvtsi64_si128 + // X86: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0

[PATCH] D124067: [x86] Support 3 builtin functions for 32-bits targets

xiangzhangllvm added inline comments. Comment at: clang/test/CodeGen/X86/sse2-builtins.c:560 // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1 + // X86-LABEL: test_mm_cvtsi64_si128 + // X86: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0 RKSimon

[PATCH] D122567: [X86][AMX] enable amx cast intrinsics in FE.

xiangzhangllvm accepted this revision. xiangzhangllvm added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D122567/new/ https://reviews.llvm.org/D122567

[PATCH] D122567: [X86][AMX] enable amx cast intrinsics in FE.

xiangzhangllvm added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:5413-5415 +if (PTy->isX86_AMXTy()) + ArgValue = Builder.CreateIntrinsic(Intrinsic::x86_cast_vector_to_tile, + {ArgValue->getType()},

[PATCH] D122567: [X86][AMX] enable amx cast intrinsics in FE.

xiangzhangllvm added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:5413-5415 +if (PTy->isX86_AMXTy()) + ArgValue = Builder.CreateIntrinsic(Intrinsic::x86_cast_vector_to_tile, + {ArgValue->getType()},

[PATCH] D120887: The [2/3] Fix mangle problem when variable used in inline asm （Add modifier P for ARR[BaseReg+IndexReg+..]）

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG287dad13abba: [InlineAsm] Fix mangle problem when global variable used in inline asm (authored by xiangzhangllvm). Herald added subscribers:

[PATCH] D120886: [Inline asm][1/3] Fix mangle problem when variable used in inline asm (Revert 2 history bugfix patch)

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG8a6b644c7923: [Inline asm] Fix mangle problem when variable used in inline asm. (authored by xiangzhangllvm). Herald added subscribers: cfe-commits,

[PATCH] D118052: [X86] Fix CodeGen Module Flag for -mibt-seal

xiangzhangllvm added inline comments. Comment at: clang/test/CodeGen/X86/x86-cf-protection.c:4 // RUN: %clang -target i386-unknown-unknown -x c -E -dM -o - -fcf-protection=full %s | FileCheck %s --check-prefix=FULL +// RUN: %clang -target i386-unknown-unknown -o - -emit-llvm

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

xiangzhangllvm added inline comments. Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:1759 // It is widely common for MS InlineAsm to use a global variable and one/two // registers in a mmory expression, and though unaccessible via rip/eip. if (IsGlobalLV &&

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

xiangzhangllvm added inline comments. Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:1759 // It is widely common for MS InlineAsm to use a global variable and one/two // registers in a mmory expression, and though unaccessible via rip/eip. if (IsGlobalLV &&

[PATCH] D109739: [X86][InlineAsm][Bugfix] Use mem size information (*word ptr) for "global variable + registers" memory expression in inline asm.

This revision was automatically updated to reflect the committed changes. Closed by commit rG1f1c71aeacc1: [X86][InlineAsm] Use mem size information (*word ptr) for global variable +… (authored by xiangzhangllvm). Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository:

[PATCH] D109488: [X86] Adjust Keylocker store register num for encodekey128/256

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGc81d6ab87582: [X86] Adjust Keylocker handle mem size (authored by xiangzhangllvm). Herald added a project: clang. Herald added a subscriber:

[PATCH] D108682: [X86] Support __SSC_MARK(const int id) in x86gprintrin.h

This revision was automatically updated to reflect the committed changes. Closed by commit rG83e82ff76753: [X86] Support __SSC_MARK(const int id) (authored by xiangzhangllvm). Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo CHANGES

[PATCH] D105336: [X86] Refine code of generating BB labels in Keylocker

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGa39bb960fc1e: [X86] Refine code of generating BB labels in Keylocker (authored by xiangzhangllvm). Herald added a project: clang. Herald added a

[PATCH] D88398: [X86] Support Intel Key Locker

xiangzhangllvm added a comment. I'll use the old patch to recover it, thanks! CHANGES SINCE LAST ACTION https://reviews.llvm.org/D88398/new/ https://reviews.llvm.org/D88398 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D88398: [X86] Support Intel Key Locker

xiangzhangllvm added a comment. Oh, sorry, It is a mistake, I planned to update to https://reviews.llvm.org/D105336 How can I revert this update ? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D88398/new/ https://reviews.llvm.org/D88398 ___

[PATCH] D88398: [X86] Support Intel Key Locker

xiangzhangllvm updated this revision to Diff 356413. xiangzhangllvm added a comment. Refine Clang format CHANGES SINCE LAST ACTION https://reviews.llvm.org/D88398/new/ https://reviews.llvm.org/D88398 Files: clang/lib/CodeGen/CGBuiltin.cpp Index: clang/lib/CodeGen/CGBuiltin.cpp

[PATCH] D104766: [X86] Zero some outputs of Keylocker intrinsics in error case

xiangzhangllvm added a comment. Done at https://reviews.llvm.org/D105336, thanks again! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D104766/new/ https://reviews.llvm.org/D104766 ___ cfe-commits mailing

[PATCH] D104766: [X86] Zero some outputs of Keylocker intrinsics in error case

xiangzhangllvm added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:14834 +BasicBlock *NoError = createBasicBlock(StrNoErr, this->CurFn); +BasicBlock *Error = createBasicBlock(StrErr, this->CurFn); craig.topper wrote: > Sorry I'm late

[PATCH] D102288: [HWASan] Add -fsanitize=lam flag and enable HWASan to use it.

xiangzhangllvm added inline comments. Comment at: compiler-rt/test/hwasan/TestCases/Linux/vfork.c:7 -// Aliasing mode does not support stack tagging. -// XFAIL: x86_64 What does here XFAIL mean, do not test in x86_64 ? Repository: rG LLVM Github Monorepo

[PATCH] D101059: [X86][AMX] Add description for AMX new interface.

xiangzhangllvm added a comment. +1 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D101059/new/ https://reviews.llvm.org/D101059 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D100919: [AArch64] Support customizing stack protector guard

xiangzhangllvm accepted this revision. xiangzhangllvm added a comment. This revision is now accepted and ready to land. I didn't find any problem in the main context of the patch, +1 first. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D100919/new/

[PATCH] D98757: [AMX] Not fold constant bitcast into amx intrisic

xiangzhangllvm added a comment. In D98757#2631042 , @lebedev.ri wrote: > The ongoing special-casing of `X86_AMXTy` through the llvm due to the > inability of the existing backend passes to handle certain llvm ir constructs. We have bring up it to

[PATCH] D98757: [AMX] Not fold constant bitcast into amx intrisic

xiangzhangllvm added a comment. In D98757#2631019 , @lebedev.ri wrote: > Once again, i suggest to bring this up on llvm-dev. That is obvious, Discuss what, can you point it out clearly ? The topic is do it in mid-end or back-end ? Repository: rG LLVM

[PATCH] D98757: [AMX] Not fold constant bitcast into amx intrisic

xiangzhangllvm added a comment. In D98757#2630968 , @lebedev.ri wrote: > I think that is a traditional backend problem that the pass will just have to > be updated to deal with. Hi @lebedev.ri , seems there is some mistakes, let me first point out the

[PATCH] D98757: [AMX] Not fold constant bitcast into amx intrisic

xiangzhangllvm added a comment. In D98757#2630942 , @lebedev.ri wrote: > I strongly suggest you bring up this ongoing creep of `if > (DestTy->isX86_AMXTy()) return false;` on llvm-dev. > I strongly supsect you are covering up bugs in you backend/pass

[PATCH] D98757: [AMX] Not fold constant bitcast into amx intrisic

xiangzhangllvm added inline comments. Comment at: llvm/lib/Analysis/ConstantFolding.cpp:101 /// Constant fold bitcast, symbolically evaluating it with DataLayout. /// This always returns a non-null constant, but it may be a /// ConstantExpr if unfoldable.

[PATCH] D98757: [AMX] Not fold constant bitcast into amx intrisic

xiangzhangllvm added a comment. In D98757#2630844 , @LuoYuanke wrote: > Probably we need a .ll test case to for constant folding. Fold constant is done in CSE and SCCP which are both passes run in Clang (O2 )

[PATCH] D98757: [AMX] Not fold constant bitcast into amx intrisic

xiangzhangllvm added a comment. In D98757#2630764 , @LuoYuanke wrote: > Would you add a test case for it? at clang/test/CodeGen/X86/amx_api.c Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D98757/new/

[PATCH] D98757: [AMX] Not fold constant bitcast into amx intrisic

xiangzhangllvm added inline comments. Comment at: clang/test/CodeGen/X86/amx_api.c:39 +void test_tile_init(short row, short col) { + __tile1024i c = {row, col, {1, 2, 3}}; + __tile_stored(buf, STRIDE, c); we usually write like this __tile1024i c = {row, col};

[PATCH] D98757: [AMX] Not fold constant bitcast into amx intrisic

xiangzhangllvm created this revision. xiangzhangllvm added reviewers: LuoYuanke, pengfei, LiuChen3, yubing. Herald added a subscriber: hiraditya. xiangzhangllvm requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. We won't

[PATCH] D97358: [X86] Support amx-bf16 intrinsic.

xiangzhangllvm added a comment. +1 first, didn't see key problems. Comment at: clang/lib/Headers/amxintrin.h:326 +__DEFAULT_FN_ATTRS_BF16 +static void __tile_tdpbf16ps(__tile1024i *dst, __tile1024i src1, + __tile1024i src2) { yubing

[PATCH] D93594: [X86] Pass to transform amx intrinsics to scalar operation.

xiangzhangllvm added inline comments. Comment at: llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp:211-212 +IRBuilderBase , DomTreeUpdater , +LoopInfo , Value *Row, Value *Col, +

[PATCH] D93594: [X86] Pass to transform amx intrinsics to scalar operation.

xiangzhangllvm added inline comments. Comment at: llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp:356 + I->eraseFromParent(); +} + } I see you need force match bitcast then replace, add assert for no bitcast case Comment at:

[PATCH] D63908: hwasan: Improve precision of checks using short granule tags.

xiangzhangllvm added inline comments. Comment at: compiler-rt/trunk/lib/hwasan/hwasan_checks.h:76 +#endif + return *(u8 *)(ptr | (kShadowAlignment - 1)) == ptr_tag; +} Hello @pcc I think here seems some problem, the ptr is user passing point, *(ptr + n) should

[PATCH] D88631: [X86] Support customizing stack protector guard

xiangzhangllvm added a comment. TKS all review!! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D88631/new/ https://reviews.llvm.org/D88631 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D88631: [X86] Support customizing stack protector guard

This revision was automatically updated to reflect the committed changes. Closed by commit rG7c3fea7721e4: [X86] Support customizing stack protector guard (authored by xiangzhangllvm). Herald added a project: clang. Herald added a subscriber: cfe-commits. Changed prior to commit:

[PATCH] D83111: [X86-64] Support Intel AMX Intrinsic

This revision was not accepted when it landed; it landed in state "Needs Review". This revision was automatically updated to reflect the committed changes. Closed by commit rG939d8309dbd4: [X86-64] Support Intel AMX Intrinsic (authored by xiangzhangllvm). Herald added a project: clang. Herald

[PATCH] D83111: [X86-64] Support Intel AMX Intrinsic

xiangzhangllvm added a comment. In D83111#2134747 , @craig.topper wrote: > LGTM with all instances of "pointer point" replace with just "pointer" Done it in commit. Thank you! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D83111: [X86-64] Support Intel AMX Intrinsic

This revision was automatically updated to reflect the committed changes. Closed by commit rG939d8309dbd4: [X86-64] Support Intel AMX Intrinsic (authored by xiangzhangllvm). Herald added a project: clang. Herald added a subscriber: cfe-commits. Changed prior to commit:

[PATCH] D79617: Add cet.h for writing CET-enabled assembly code

xiangzhangllvm added a comment. Hello rsmith, first, very sorry for have committed this patch before your reply, I waited 10 days, I thought you have agreed it. I think the linux-ABI can be the specification of this head file. The context of this cet.h is according to the linux ABI about

[PATCH] D79617: Add cet.h for writing CET-enabled assembly code

This revision was automatically updated to reflect the committed changes. Closed by commit rGbcc0c894f38f: Add cet.h for writing CET-enabled assembly code (authored by xiangzhangllvm). Changed prior to commit: https://reviews.llvm.org/D79617?vs=264772=264799#toc Repository: rG LLVM Github

[PATCH] D79617: Add cet.h for writing CET-enabled assembly code

xiangzhangllvm added a comment. @rsmith Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D79617/new/ https://reviews.llvm.org/D79617 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D79617: Add cet.h for writing CET-enabled assembly code

This revision was automatically updated to reflect the committed changes. Closed by commit rGe7e84ff24a5f: Add cet.h for writing CET-enabled assembly code (authored by xiangzhangllvm). Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo

[PATCH] D77205: [X86] Add TSXLDTRK instructions.

This revision was automatically updated to reflect the committed changes. Closed by commit rGa3dc9490004c: [X86] Add TSXLDTRK instructions. (authored by tianqing, committed by xiangzhangllvm). Changed prior to commit: https://reviews.llvm.org/D77205?vs=256170=256189#toc Repository: rG LLVM

[PATCH] D77193: [X86] Add SERIALIZE instruction.

This revision was automatically updated to reflect the committed changes. Closed by commit rGd08fadd6628a: [X86] Add SERIALIZE instruction. (authored by tianqing, committed by xiangzhangllvm). Changed prior to commit: https://reviews.llvm.org/D77193?vs=254114=254447#toc Repository: rG LLVM

[PATCH] D70157: Align branches within 32-Byte boundary

xiangzhangllvm added a comment. In D70157#1746793 , @MaskRay wrote: > On x86, the preferred function alignment is 16 > (https://github.com/llvm/llvm-project/blob/arcpatch-D70157/llvm/lib/Target/X86/X86ISelLowering.cpp#L1893), > which is the default

[PATCH] D70157: Align branches within 32-Byte boundary

xiangzhangllvm added inline comments. Comment at: llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h:134 + /// macro-fusion. + inline FirstMFInstKind classifyFirstOpcode(unsigned Opcode) { +switch (Opcode) { xiangzhangllvm wrote: > We rarely put function

[PATCH] D70157: Align branches within 32-Byte boundary

xiangzhangllvm added inline comments. Comment at: llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h:134 + /// macro-fusion. + inline FirstMFInstKind classifyFirstOpcode(unsigned Opcode) { +switch (Opcode) { We rarely put function definition at *.h, if

[PATCH] D62367: [X86] VP2INTERSECT clang

xiangzhangllvm marked 3 inline comments as done. xiangzhangllvm added a comment. Done, Thank you very much! Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62367/new/ https://reviews.llvm.org/D62367 ___ cfe-commits

[PATCH] D62367: [X86] VP2INTERSECT clang

xiangzhangllvm updated this revision to Diff 202359. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62367/new/ https://reviews.llvm.org/D62367 Files: docs/ClangCommandLineReference.rst include/clang/Basic/BuiltinsX86.def include/clang/Driver/Options.td

[PATCH] D62367: [X86] VP2INTERSECT clang

xiangzhangllvm added a comment. Hi Dear friends, could you help merge this patch? Thank you very much! Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62367/new/ https://reviews.llvm.org/D62367 ___ cfe-commits mailing

[PATCH] D62367: [X86] VP2INTERSECT clang

xiangzhangllvm updated this revision to Diff 202350. xiangzhangllvm added a comment. rebase Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62367/new/ https://reviews.llvm.org/D62367 Files: docs/ClangCommandLineReference.rst

[PATCH] D62367: [X86] VP2INTERSECT clang

xiangzhangllvm updated this revision to Diff 201805. xiangzhangllvm added a comment. rebase Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62367/new/ https://reviews.llvm.org/D62367 Files: docs/ClangCommandLineReference.rst

[PATCH] D62367: [X86] VP2INTERSECT clang

xiangzhangllvm marked an inline comment as done. xiangzhangllvm added inline comments. Comment at: lib/Headers/avx512vlvp2intersectintrin.h:39 + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_2intersect_epi32(__m256i __a, __m256i __b, __mmask8 *__m0, __mmask8 *__m1) {

[PATCH] D62367: [X86] VP2INTERSECT clang

xiangzhangllvm updated this revision to Diff 201618. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62367/new/ https://reviews.llvm.org/D62367 Files: docs/ClangCommandLineReference.rst include/clang/Basic/BuiltinsX86.def include/clang/Driver/Options.td

[PATCH] D62367: [X86] VP2INTERSECT clang

xiangzhangllvm marked an inline comment as done. xiangzhangllvm added inline comments. Comment at: lib/Headers/avx512vlvp2intersectintrin.h:39 + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_2intersect_epi32(__m256i __a, __m256i __b, __mmask8 *__m0, __mmask8 *__m1) {

[PATCH] D62367: [X86] VP2INTERSECT clang

xiangzhangllvm updated this revision to Diff 201611. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62367/new/ https://reviews.llvm.org/D62367 Files: docs/ClangCommandLineReference.rst include/clang/Basic/BuiltinsX86.def include/clang/Driver/Options.td

[PATCH] D62367: [X86] VP2INTERSECT clang

xiangzhangllvm updated this revision to Diff 201137. xiangzhangllvm added a comment. rebase Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62367/new/ https://reviews.llvm.org/D62367 Files: docs/ClangCommandLineReference.rst

[PATCH] D62367: VP2INTERSECT clang

xiangzhangllvm created this revision. xiangzhangllvm added reviewers: craig.topper, LuoYuanke, annita.zhang, pengfei. Herald added subscribers: cfe-commits, mgorny. Herald added a project: clang. Support intel AVX512 VP2INTERSECT instructions in clang Repository: rC Clang

[PATCH] D62115: fix a issue that clang is incompatible with gcc with -H option.

xiangzhangllvm added inline comments. Comment at: lib/Frontend/HeaderIncludeGen.cpp:55 + // Simplify Filename that starts with "./" + if (Filename.startswith("./")); +Filename=Filename.substr(2); Need remove ";" ? Repository: rC Clang CHANGES SINCE

[PATCH] D56990: Bugfix for Replacement of tied operand of inline asm

xiangzhangllvm added a comment. In D56990#1426977 , @efriedma wrote: > LGTM; I'll merge it tonight or tomorrow. Thank you very much! Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D56990/new/

[PATCH] D56990: Bugfix for Replacement of tied operand of inline asm

xiangzhangllvm added a comment. We found may tests failed about this issue. I hope It can be committed. Thank you very much! Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D56990/new/ https://reviews.llvm.org/D56990

[PATCH] D56990: Bugfix for Replacement of tied operand of inline asm

xiangzhangllvm added a comment. Hi, efriedma could you help he commit this patch? Thank you very much! Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D56990/new/ https://reviews.llvm.org/D56990 ___ cfe-commits mailing

[PATCH] D56990: Bugfix for Replacement of tied operand of inline asm

xiangzhangllvm updated this revision to Diff 189979. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D56990/new/ https://reviews.llvm.org/D56990 Files: lib/CodeGen/CGStmt.cpp test/CodeGen/asm-inout.c Index: test/CodeGen/asm-inout.c

[PATCH] D56990: Bugfix for Replacement of tied operand of inline asm

xiangzhangllvm added a comment. Thank you, efriedma But but the LLVM and Clang are different projects, I can commit the change at one time. I 'll update the patch for clang first. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D56990/new/

[PATCH] D56990: Bugfix for Replacement of tied operand of inline asm

xiangzhangllvm added a comment. !!! Hi, dear efriedma, very sorry! I just saw your reply. line 2093: getTargetHooks().adjustInlineAsmType(... InputConstraint,...) will just deal with the constrain string, and it can't check the TiedOperand in the function. So, this will make inconsistent

[PATCH] D56990: Bugfix for Replacement of tied operand of inline asm

xiangzhangllvm added a comment. Hi dears, Could you please help me merge the patch. Thank you! Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D56990/new/ https://reviews.llvm.org/D56990 ___ cfe-commits mailing list

[PATCH] D56990: Bugfix for Replacement of tied operand of inline asm

xiangzhangllvm created this revision. xiangzhangllvm added reviewers: craig.topper, smaslov, LuoYuanke. xiangzhangllvm added a project: clang. Herald added subscribers: cfe-commits, eraman. The constraint "0" in the following asm did not consider the its relationship with "=y" when try to