[PATCH] D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag.

khchen abandoned this revision. khchen added a comment. Herald added subscribers: jobnoorman, luke, pcwang-thead, eopXD, VincentWu. Herald added a project: All. we don't need this patch because we already handle the empty target-abi module flag now. Repository: rG LLVM Github Monorepo

[PATCH] D78035: [PoC][RISCV] enable LTO/ThinLTO on RISCV

khchen abandoned this revision. khchen added a comment. Herald added subscribers: jobnoorman, luke, pcwang-thead, eopXD, VincentWu, arichardson. Herald added a project: All. I'm not working on RISC-V now and please reference https://reviews.llvm.org/D132843#3770454 to see the follow-up work.

[PATCH] D72245: [PoC][RISCV][LTO] Pass target-abi via module flag metadata

khchen abandoned this revision. khchen added a comment. Herald added subscribers: jobnoorman, luke, pcwang-thead, eopXD, VincentWu, ormris, vkmr, frasercrmck, arichardson. Herald added a project: All. I'm not working on RISC-V now and please reference https://reviews.llvm.org/D132843#3770454 to

[PATCH] D140662: [NFC][Clang][RISCV] Reduce boilerplate when determining prototype for segment loads

khchen added a comment. LGTM. Thanks for clean up code! Comment at: clang/include/clang/Basic/riscv_vector.td:820 +(Address0, ..., Address{NF - 1}, mask, Ptr, VL) +(Address0, ..., Address{NF - 1}, mask, Maskedoff0, ..., Maskedoff{NF - 1}, + Ptr, VL) nit:

[PATCH] D140687: [Clang][RISCV] Use poison instead of undef

khchen accepted this revision. khchen added a comment. This revision is now accepted and ready to land. LGTM, thanks!! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D140687/new/ https://reviews.llvm.org/D140687

[PATCH] D140662: [NFC][Clang][RISCV] Reduce boilerplate when determining prototype for segment loads

khchen added inline comments. Comment at: clang/include/clang/Basic/riscv_vector.td:847 + + // Intrinsic is in the form of below, + // Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Mask, VL, Policy) After remove the builtins comment I don't have idea

[PATCH] D140389: [NFC][Clang][RISCV] Rename data member 'DefaultPolicy' to 'PolicyAttrs'

khchen accepted this revision. khchen added a comment. This revision is now accepted and ready to land. LGTM, thanks! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D140389/new/ https://reviews.llvm.org/D140389

[PATCH] D138429: [clang][RISCV][NFC] Prevent data race in RVVType::computeType

khchen added inline comments. Comment at: clang/include/clang/Support/RISCVVIntrinsicUtils.h:284 + +class RVVTypeCache { +private: nit: maybe we could add some comments to said the motivation for `RVVTypeCache`. Comment at:

[PATCH] D132843: [RISCV] Ensure target features get passed to the LTO linker for RISC-V

khchen added a comment. > Possible solution/results: > > 1. All functions in `a.o` and `b.o` using same target features during the > first build stage, `-march=rv64gc` for a.o, `-march=rv64g` for `b.o`, and > `-march` option given in LTO CodeGen stage is ignored, it only used for ELF >

[PATCH] D71387: pass -mabi to LTO linker only in RISC-V targets, enable RISC-V LTO

khchen added a comment. In D71387#3755056 , @lewis-revill wrote: > I believe this patch is still relevant/necessary when using LTO for RISCV, so > can I ask if @khchen is able to update it to rebase/address the feedback? If > not, are there are any

[PATCH] D126750: [RISCV][Clang] Support policy function for all vector segment load.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG010f329803c8: [RISCV][Clang] Support policy function for all vector segment load. (authored by khchen). Changed prior to commit:

[PATCH] D126749: [RISCV][Clang] Support policy functions for Vector Mask Instructions.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGbb99d4b11d84: [RISCV][Clang] Support policy functions for Vector Mask Instructions. (authored by khchen). Repository: rG LLVM Github Monorepo

[PATCH] D126748: [RISCV][Clang] Support policy functions for Vector Reduction Instructions.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGdffdca85ec2d: [RISCV][Clang] Support policy functions for Vector Reduction (authored by khchen). Changed prior to commit:

[PATCH] D126746: [RISCV][Clang] Support policy functions for Vector Comparison Instructions.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG9caf2cc05c02: [RISCV][Clang] Support policy functions for Vector Comparison (authored by khchen). Repository: rG LLVM Github Monorepo CHANGES

[PATCH] D126745: [RISCV][Clang] Support policy functions for vmerge, vfmerge and vcompress.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG7eddeb9e99f3: [RISCV][Clang] Support policy functions for vmerge, vfmerge and (authored by khchen). Changed prior to commit:

[PATCH] D126745: [RISCV][Clang] Support policy functions for vmerge, vfmerge and vcompress.

khchen added a comment. @nlopes we will update all undef to poison in follow up patches. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D126745/new/ https://reviews.llvm.org/D126745 ___ cfe-commits

[PATCH] D126745: [RISCV][Clang] Support policy functions for vmerge, vfmerge and vcompress.

khchen added a comment. oops.. all tests need to updated and include all intrinsic IR tests... Is there any benefit to switch UndefValue to PoisonValue? maybe those changed should be in other follow-up patches? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D126745: [RISCV][Clang] Support policy functions for vmerge, vfmerge and vcompress.

khchen added a comment. In D126745#3691544 , @craig.topper wrote: > In D126745#3691528 , @khchen wrote: > >> In D126745#3678776 , @nlopes wrote: >> >>> While at it,

[PATCH] D126745: [RISCV][Clang] Support policy functions for vmerge, vfmerge and vcompress.

khchen added a comment. In D126745#3678776 , @nlopes wrote: > While at it, could you switch those UndefValue with PoisonValue if possible? > Thank you! I'm not sure UndefValue will work because the backend would only check isUndef() to generate

[PATCH] D126743: [RISCV][Clang] Add tests for all supported policy functions. (NFC)

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG8e51917b39cd: [RISCV][Clang] Add tests for all supported policy functions. (NFC) (authored by khchen). Repository: rG LLVM Github Monorepo

[PATCH] D126741: [RISCV][Clang] Refactor RISCVVEmitter. (NFC)

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG93f8657c743b: [RISCV][Clang] Refactor RISCVVEmitter. (NFC) (authored by khchen). Changed prior to commit:

[PATCH] D126740: [RISCV][Clang] Refactor and rename rvv intrinsic related stuff. (NFC)

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGbc4eef509b21: [RISCV][Clang] Refactor and rename rvv intrinsic related stuff. (NFC) (authored by khchen). Changed prior to commit:

[PATCH] D129043: [RISCV][Clang] Teach RISCVEmitter to generate BitCast for pointer operands.

khchen added inline comments. Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:111 +if (I.value()->isPointer()) { + assert(RVVI->getIntrinsicTypes().front() == -1 && + "RVVI should be vector load intrinsic."); I feel this logic is not

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

khchen added a comment. @craig.topper @rogfer01 - do you have other comments? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111617/new/ https://reviews.llvm.org/D111617 ___ cfe-commits mailing list

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

khchen accepted this revision. khchen added a comment. This revision is now accepted and ready to land. LGTM. Other than that last comments. Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:77 + // Create compressed hsignature table from SemaRecords. + void init(const

[PATCH] D126461: [RISCV] Extract and store new vl of vleff/vlsegff iff destination isn't null

khchen added a comment. Could you please purpose this implement in rvv-intrinsc-doc first? I think this feature need to have discussion because store to nullptr is UB but we are making it as defined behavior only for these intrinsics. Personally I like they have consistent behavior and in

[PATCH] D126461: [RISCV] Extract and store new vl of vleff iff destination isn't null

khchen added a comment. IMO, if I'm an user, I would not expected intrinsic function will generate the condition code to impact the performance, maybe we need to raise a issue in rvv-intrinsic-doc. maybe another way is adding a note in intrinsic document to address that the vl could not be a

[PATCH] D126461: [RISCV] Extract and store new vl of vleff iff destination isn't null

khchen added a comment. > Store to null will be changed to unreachable, so all instructions after vleff > intrinsic call will be deleted and it causes runtime errors. If destination > to store is null, we won't extract and store the new vl. > Yes, but only for vleff instructions, since it

[PATCH] D125624: [gold] Remove an external dependency to GNU binutils' header file

khchen added a comment. IMO, maybe we could keep the DLLVM_BINUTILS_INCDIR option support but default is using the Plugin.h? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D125624/new/ https://reviews.llvm.org/D125624

[PATCH] D125323: [RISCV] Add the passthru operand for RVV unmasked segment load IR intrinsics.

khchen added a comment. In D125323#3549794 , @pcwang-thead wrote: > Is there an easy way to update tests? Or we need to add passthru operands > manually? I will appreciate it if you can tell me. :-) use sed to do replacement. ex. #!/bin/bash set

[PATCH] D126749: [RISCV][Clang] Support policy functions for Vector Mask Instructions.

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, kito-cheng, fakepaper56, eopXD. Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o,

[PATCH] D126748: [RISCV][Clang] Support policy functions for Vector Reduction Instructions.

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, kito-cheng, fakepaper56, eopXD. Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o,

[PATCH] D126746: [RISCV][Clang] Support policy functions for Vector Comparison Instructions.

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, kito-cheng, fakepaper56, eopXD. Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o,

[PATCH] D126745: [RISCV][Clang] Support policy functions for vmerge, vfmerge and vcompress.

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, kito-cheng, fakepaper56, eopXD. Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o,

[PATCH] D126743: [RISCV][Clang] Add tests for all supported policy functions. (NFC)

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, kito-cheng, fakepaper56, eopXD. Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o,

[PATCH] D126741: [RISCV][Clang] Refactor RISCVVEmitter. (NFC)

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, kito-cheng, fakepaper56, eopXD. Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o,

[PATCH] D126740: [RISCV][Clang] Refactor and rename rvv intrinsic related stuff. (NFC)

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, kito-cheng, fakepaper56, eopXD. Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o,

[PATCH] D126634: [RISCV][NFC] Rename variables in rvv intrinsics related files.

This revision was automatically updated to reflect the committed changes. Closed by commit rG79e3d57f5228: [RISCV][NFC] Rename variables in rvv intrinsics related files. (authored by khchen). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D126634/new/

[PATCH] D126634: [RISCV][NFC] Rename variables in rvv intrinsics related files.

khchen created this revision. khchen added a reviewer: kito-cheng. Herald added subscribers: sunshaoce, VincentWu, luke957, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones,

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

khchen added inline comments. Comment at: clang/lib/Sema/SemaRVVLookup.cpp:175 + for (auto : RVVIntrinsicRecords) { +// Create Intrinsics for each type and LMUL. +BasicType BaseType = BasicType::Unknown; Those code logic need to sync with

[PATCH] D126042: [RISCV][NFC] Remove `*=` operator for LMULType

khchen accepted this revision. khchen added a comment. This revision is now accepted and ready to land. LGTM, thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D126042/new/ https://reviews.llvm.org/D126042

[PATCH] D125765: [RISCV] Add type aliases float16_t, float32_t and float64_t

khchen added a comment. In D125765#3526835 , @pcwang-thead wrote: > In D125765#3524456 , @khchen wrote: > >> I think we have no consensus in >>

[PATCH] D125875: [RISCV] Add vread_csr and vwrite_csr to riscv_vector.h

khchen added a comment. please move those tests to `test/CodeGen/RISCV/rvv-intrinsics` and rename them without `rvv-` prefix. Comment at: clang/include/clang/Basic/riscv_vector.td:1511 +__extension__ extern __inline +__attribute__ ((__always_inline__, __gnu_inline__,

[PATCH] D125765: [RISCV] Add type aliases float16_t, float32_t and float64_t

khchen added a comment. I think we have no consensus in https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/18#issuecomment-817890161, and most people disagree the current naming, maybe we need to have more followup discussion before landing this patch. For example, maybe `_Float16`

[PATCH] D125886: [RISCV][NFC] Rename variable in RISCVVEmitter.cpp

khchen accepted this revision. khchen added a comment. This revision is now accepted and ready to land. LGTM, thanks! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D125886/new/ https://reviews.llvm.org/D125886

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

khchen added a comment. Do we need to have some tests in `clang/test/PCH/` for new #pragma? Comment at: clang/lib/Sema/SemaLookup.cpp:932 + if (DeclareRVVBuiltins) { +if (GetRVVBuiltinInfo(*this, R, II, PP)) { + return true; Don’t Use

[PATCH] D124730: [RISCV][NFC] Refactor RISC-V vector intrinsic utils.

khchen accepted this revision. khchen added a comment. This revision is now accepted and ready to land. Thanks Kito. This all LGTM except some warnings need to fix. Comment at: clang/lib/Support/RISCVVIntrinsicUtils.cpp:384 +return PD; // Handle primitive type

[PATCH] D125323: [RISCV] Add the passthru operand for RVV unmasked segment load IR intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG7dfc56c10746: [RISCV] Add the passthru operand for RVV unmasked segment load IR intrinsics. (authored by khchen). Changed prior to commit:

[PATCH] D125323: [RISCV] Add the passthru operand for RVV unmasked segment load IR intrinsics.

khchen updated this revision to Diff 428674. khchen added a comment. address Craig's comments, thanks!! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D125323/new/ https://reviews.llvm.org/D125323 Files: clang/include/clang/Basic/riscv_vector.td

[PATCH] D124730: [RISCV][NFC] Refactor RISC-V vector intrinsic utils.

khchen added a comment. Herald added a subscriber: shiva0217. Thanks for refactoring! Comment at: clang/include/clang/Support/RISCVVIntrinsicUtils.h:55 +// basic vector type, used to compute type info of arguments. +enum class PrimitiveType : uint8_t { + Invalid,

[PATCH] D125323: [RISCV] Add the passthru operand for RVV unmasked segment load IR intrinsics.

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, frasercrmck, kito-cheng, arcbbb, monkchiang, eopXD. Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei,

[PATCH] D124611: [RISCV][Clang] add more tests for clang driver. (NFC)

This revision was automatically updated to reflect the committed changes. Closed by commit rG6c10014f1de6: [RISCV][Clang] add more tests for clang driver. (NFC) (authored by khchen). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124611/new/

[PATCH] D124611: [RISCV][Clang] add more tests for clang driver. (NFC)

khchen updated this revision to Diff 426587. khchen added a comment. Add zve64* tests. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124611/new/ https://reviews.llvm.org/D124611 Files: clang/test/Driver/riscv-arch.c Index:

[PATCH] D124510: [RISCV] Precommit test for D124509

khchen accepted this revision. khchen added a comment. This revision is now accepted and ready to land. LGTM. Thanks! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124510/new/ https://reviews.llvm.org/D124510

[PATCH] D124611: [RISCV][Clang] add more tests for clang driver. (NFC)

khchen created this revision. khchen added reviewers: craig.topper, asb, luismarques. Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01,

[PATCH] D124509: [RISCV] Fix int16 -> __fp16 conversion code gen

khchen added a comment. It's seem like all targets need to return `false` in `useFP16ConversionIntrinsics` for correctness of `int16` -> `__fp16` conversion? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124509/new/

[PATCH] D124186: [RISCV] Fix incorrect policy implement for unmasked vslidedown and vslideup.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGffe03ff75c26: [RISCV] Fix incorrect policy implement for unmasked vslidedown and vslideup. (authored by khchen). Changed prior to commit:

[PATCH] D124186: [RISCV] Fix incorrect policy implement for unmasked vslidedown and vslideup.

khchen updated this revision to Diff 424517. khchen edited the summary of this revision. khchen added a comment. update clang tests. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124186/new/ https://reviews.llvm.org/D124186 Files:

[PATCH] D124186: [RISCV] Fix incorrect policy implement for unmasked vslidedown and vslideup.

khchen added a comment. In D124186#3465136 , @craig.topper wrote: > The intrinsic interface doesn't care about 0 give user control of vstart. Nearly every instruction is undisturbed for > 0 > But having said that it probably makes sense to keep the

[PATCH] D124062: [RISCV][Clang][NFC] Update vid intrinsic tests.

khchen added a comment. In D124062#3461069 , @frasercrmck wrote: > Were they perhaps passing because `i64 [[VL:%.*]]` was matching the `, i64 0` > too? Seems like a flaw in the checks generated by the script, but I can see > how the majority of the

[PATCH] D124062: [RISCV][Clang][NFC] Update vid intrinsic tests.

This revision was automatically updated to reflect the committed changes. Closed by commit rGbd0d126302a8: [RISCV][Clang][NFC] Update vid intrinsic tests. (authored by khchen). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124062/new/

[PATCH] D124062: [RISCV][Clang][NFC] Update vid intrinsic tests.

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, frasercrmck, kito-cheng, arcbbb, monkchiang, eopXD. Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei,

[PATCH] D122455: Revert "[RISCV] Add policy operand for masked compare and vmsbf/vmsif/vmsof IR"

This revision was not accepted when it landed; it landed in state "Needs Review". This revision was automatically updated to reflect the committed changes. Closed by commit rG10b2760da0fd: Revert [RISCV] Add policy operand for masked compare and vmsbf/vmsif/vmsof IR (authored by khchen). Herald

[PATCH] D122455: Revert "[RISCV] Add policy operand for masked compare and vmsbf/vmsif/vmsof IR"

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, frasercrmck, kito-cheng, arcbbb, monkchiang, eopXD. Herald added subscribers: s, VincentWu, luke957, StephenFan, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o,

[PATCH] D120870: [RISCV][NFC] Refine and refactor RISCVVEmitter and riscv_vector.td.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG23d60ce164db: [RISCV][NFC] Refine and refactor RISCVVEmitter and riscv_vector.td. (authored by khchen). Herald added subscribers: s, StephenFan,

[PATCH] D120228: [RISCV] Add policy operand for masked compare and vmsbf/vmsif/vmsof IR intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG10fd2822b77e: [RISCV] Add policy operand for masked compare and vmsbf/vmsif/vmsof IR (authored by khchen). Herald added a subscriber: StephenFan.

[PATCH] D120227: [RISCV] Add policy operand for masked vid and viota IR intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG9ab18cc53537: [RISCV] Add policy operand for masked vid and viota IR intrinsics. (authored by khchen). Herald added subscribers: s, StephenFan,

[PATCH] D121984: [RISCV][NFC] Moving RVV intrinsic type related util to llvm/Support

khchen accepted this revision. khchen added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D121984/new/ https://reviews.llvm.org/D121984

[PATCH] D121578: [RISCV][NFC] Add tests to address invalid arch dependencies.

This revision was automatically updated to reflect the committed changes. Closed by commit rGf5fea45d09e5: [RISCV][NFC] Add tests to address invalid arch dependencies. (authored by khchen). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D121578/new/

[PATCH] D70401: [RISCV] Complete RV32E/ilp32e implementation

khchen added a comment. Herald added a subscriber: s. In D70401#3384758 , @pcwang-thead wrote: > In D70401#3250049 , @khchen wrote: > >> 1. please add a check here >>

[PATCH] D120228: [RISCV] Add policy operand for masked compare and vmsbf/vmsif/vmsof IR intrinsics.

khchen updated this revision to Diff 416057. khchen added a comment. Herald added subscribers: s, arichardson. rebase on main. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D120228/new/ https://reviews.llvm.org/D120228 Files:

[PATCH] D121345: [RISCV] Add +experimental-zvfh extension to cover half types in vectors.

khchen added a comment. LGTM. wait @kito-cheng to approve it. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D121345/new/ https://reviews.llvm.org/D121345 ___ cfe-commits mailing list

[PATCH] D121578: [RISCV][NFC] Add tests to address invalid arch dependencies.

khchen created this revision. khchen added reviewers: craig.topper, kito-cheng. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult,

[PATCH] D120449: [RISCV][RVV] Add strict vfcvt intrinsics that have side effects for dynamically-set rounding mode

khchen added a comment. Makes sense to me, but I'd appreciate someone else for a final LGTM. Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:4683 +Ops.push_back(VL); +Ops.push_back(DAG.getUNDEF(XLenVT)); // Policy + } arcbbb wrote: >

[PATCH] D120870: [RISCV][NFC] Refine and refactor RISCVVEmitter and riscv_vector.td.

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, kito-cheng, arcbbb, monkchiang, eopXD. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl,

[PATCH] D118333: [RISCV] Use computeTargetABI from llc as well as clang

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG4e115b7d8811: [RISCV] Update computeTargetABI from llc as well as clang (authored by khchen). Changed prior to commit:

[PATCH] D120228: [RISCV] Add policy operand for masked compare and vmsbf/vmsif/vmsof IR intrinsics.

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, frasercrmck, kito-cheng, arcbbb, monkchiang, eopXD. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl,

[PATCH] D120227: [RISCV] Add policy operand for masked vid and viota IR intrinsics.

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, frasercrmck, kito-cheng, arcbbb, monkchiang, eopXD. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl,

[PATCH] D119727: [RISCV] Add the policy operand for nomask vector Multiply-Add IR intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGca783124073f: [RISCV] Add the policy operand for nomask vector Multiply-Add IR intrinsics. (authored by khchen). Changed prior to commit:

[PATCH] D119686: [RISCV] Add the passthru operand for nomask vadc/vsbc/vmerge/vfmerge IR intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG093ecccdab47: [RISCV] Add the passthru operand for vadc/vsbc/vmerge/vfmerge IR intrinsics. (authored by khchen). Repository: rG LLVM Github

[PATCH] D70401: [RISCV] Complete RV32E/ilp32e implementation

khchen added a comment. In D70401#3325419 , @zixuan-wu wrote: > It's difficult to run llvm-test-suite in ilp32e abi in Linux. Because there > are no workable environment such as runtime and kernel for ilp32e in GNU > series tools. > And we can not run

[PATCH] D119686: [RISCV] Add the passthru operand for nomask vadc/vsbc/vmerge/vfmerge IR intrinsics.

khchen updated this revision to Diff 409156. khchen added a comment. rebase and add more one test. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D119686/new/ https://reviews.llvm.org/D119686 Files: clang/include/clang/Basic/riscv_vector.td

[PATCH] D118253: [RISCV] Add the passthru operand for some RVV nomask unary and nullary intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGe8973dd389e7: [RISCV] Add the passthru operand for some RVV nomask unary and nullary… (authored by khchen). Changed prior to commit:

[PATCH] D117989: [RISCV] Add the passthru operand for RVV nomask binary intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGb7847199044e: [RISCV] Add the passthru operand for RVV nomask binary intrinsics. (authored by khchen). Herald added a subscriber: qcolombet.

[PATCH] D119727: [RISCV] Add the policy operand for nomask vector Multiply-Add IR intrinsics.

khchen updated this revision to Diff 408840. khchen added a comment. Rebase and refine code. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D119727/new/ https://reviews.llvm.org/D119727 Files: clang/include/clang/Basic/riscv_vector.td

[PATCH] D119727: [RISCV] Add the policy operand for nomask vector Multiply-Add IR intrinsics.

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, frasercrmck, kito-cheng, arcbbb, monkchiang, eopXD. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl,

[PATCH] D119686: [RISCV] Add the passthru operand for vadc/vsbc/vmerge/vfmerge IR intrinsics.

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, frasercrmck, kito-cheng, arcbbb, monkchiang, eopXD. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl,

[PATCH] D117681: [RISCV] Add the policy operand for some masked RVV ternary IR intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGd224be3b999a: [RISCV] Add the policy operand for some masked RVV ternary IR intrinsics. (authored by khchen). Changed prior to commit:

[PATCH] D117681: [RISCV] Add the policy operand for some masked RVV ternary IR intrinsics.

khchen added a comment. Gentle ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D117681/new/ https://reviews.llvm.org/D117681 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D117989: [RISCV] Add the passthru operand for RVV nomask binary intrinsics.

khchen added a comment. Gentle ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D117989/new/ https://reviews.llvm.org/D117989 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D119250: [RISCV][NFC] Refactor RISCVISAInfo.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGcfe7f690367b: [RISCV][NFC] Refactor RISCVISAInfo. (authored by khchen). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D118333: [RISCV] Use computeTargetABI from llc as well as clang

khchen updated this revision to Diff 406842. khchen added a comment. rebase on D119250 to make changes clear. Thanks for kito's suggestion! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118333/new/

[PATCH] D119250: [RISCV][NFC] Refactor RISCVISAInfo.

khchen created this revision. khchen added reviewers: asb, kito-cheng, craig.topper, jrtc27. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, vkmr, frasercrmck, dexonsmith, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX,

[PATCH] D118333: [RISCV] Use computeTargetABI from llc as well as clang

khchen added a comment. clang will calculate the default target-abi if -mabi is empty and encode the it in LLVM IR module flag. then if llc has no target-abi option (`Options.MCOptions.ABIName` is empty), in getSubtargetImpl it uses different way to compute the default target-abi, then the

[PATCH] D107290: [RISCV] Add support for the vscale_range attribute

khchen added inline comments. Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vscale-range.ll:162 + +attributes #0 = { vscale_range(2,1024) } +attributes #1 = { vscale_range(4,1024) } frasercrmck wrote: > khchen wrote: > > frasercrmck wrote: > > > khchen

[PATCH] D107290: [RISCV] Add support for the vscale_range attribute

khchen added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVTargetMachine.cpp:99 + if (VScaleRangeAttr.isValid()) { +RVVBitsMin = VScaleRangeAttr.getVScaleRangeMin() * RISCV::RVVBitsPerBlock; +if (VScaleRangeAttr.getVScaleRangeMax().hasValue())

[PATCH] D118333: [RISCV] Update computeTargetABI implementation.

khchen added a comment. In D118333#3275940 , @jrtc27 wrote: > I think this is the same idea as D118333 ? > Other than being a cleaner way of achieving the same goal. I've not looked to > see if there are any functional

[PATCH] D118333: [RISCV] Update computeTargetABI implementation.

khchen created this revision. khchen added reviewers: craig.topper, jrtc27, frasercrmck, kito-cheng, arcbbb, monkchiang, eopXD. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, armkevincheng, eric-k256, vkmr, dexonsmith, evandro, luismarques, apazos, sameer.abuasal,

[PATCH] D118253: [RISCV] Add the passthru operand for some RVV nomask unary and nullary intrinsics.

khchen created this revision. khchen added reviewers: craig.topper, rogfer01, frasercrmck, kito-cheng, arcbbb, monkchiang, eopXD. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl,

[PATCH] D117681: [RISCV] Add the policy operand for some masked RVV ternary IR intrinsics.

khchen updated this revision to Diff 403117. khchen added a comment. rebase and address Craig's comment. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D117681/new/ https://reviews.llvm.org/D117681 Files: clang/include/clang/Basic/riscv_vector.td

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