[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

craig.topper added a comment. In D105690#3101129 , @craig.topper wrote: > This patch as committed, deleted 5 test files instead of renaming them. I'm > working on restoring them. Deleted tests have been restored by 670c72f6f70434500d1475e1524a7088814fb

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

craig.topper added a comment. Herald added subscribers: VincentWu, luke957. This patch as committed, deleted 5 test files instead of renaming them. I'm working on restoring them. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105690/new/ https://re

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105690/new/ https://reviews.llvm.org/D105690 ___

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

frasercrmck added a comment. In D105690#3044417 , @HsiangKai wrote: > I think we could restart to review this patch. Thanks for bringing it up - I've lost track of the various 1.0 patches. This one LGTM from what I can tell. Repository: rG LLVM Gith

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

HsiangKai added a comment. Herald added a subscriber: achieveartificialintelligence. I think we could restart to review this patch. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105690/new/ https://reviews.llvm.org/D105690

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

frasercrmck added a comment. Sorry, I can't find if we wrote it down in some other patch -- and someone can correct me if I'm wrong -- but in one of the recent LLVM RISC-V sync-up calls we agreed that we'd skip v0.10-rc and move straight to supporting v1.0 when it's made final. So I think this

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

jacquesguan added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105690/new/ https://reviews.llvm.org/D105690 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.or

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

jacquesguan added inline comments. Comment at: llvm/test/MC/RISCV/rvv/aliases.s:86 +# NO-ALIAS: vfwredusum.vs v8, v4, v20, v0.t # encoding: [0x57,0x14,0x4a,0xc4] +vfwredusum.vs v8, v4, v20, v0.t craig.topper wrote: > jacquesguan wrote: > > kito-cheng wrote: > >

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

craig.topper added inline comments. Comment at: llvm/test/MC/RISCV/rvv/aliases.s:86 +# NO-ALIAS: vfwredusum.vs v8, v4, v20, v0.t # encoding: [0x57,0x14,0x4a,0xc4] +vfwredusum.vs v8, v4, v20, v0.t jacquesguan wrote: > kito-cheng wrote: > > I guess you want to ver

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

jacquesguan added inline comments. Comment at: llvm/test/MC/RISCV/rvv/aliases.s:86 +# NO-ALIAS: vfwredusum.vs v8, v4, v20, v0.t # encoding: [0x57,0x14,0x4a,0xc4] +vfwredusum.vs v8, v4, v20, v0.t kito-cheng wrote: > I guess you want to verify `vfredsum.vs` and `

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

HsiangKai added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:10 /// This file describes the RISC-V instructions from the standard 'V' Vector /// extension, version 0.10. /// This version is still experimental as the 'V' extension hasn't been --

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

kito-cheng added inline comments. Comment at: llvm/test/MC/RISCV/rvv/aliases.s:86 +# NO-ALIAS: vfwredusum.vs v8, v4, v20, v0.t # encoding: [0x57,0x14,0x4a,0xc4] +vfwredusum.vs v8, v4, v20, v0.t I guess you want to verify `vfredsum.vs` and `vfwredsum.vs` here?

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

frasercrmck added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:10 /// This file describes the RISC-V instructions from the standard 'V' Vector /// extension, version 0.10. /// This version is still experimental as the 'V' extension hasn't been

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

jacquesguan added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105690/new/ https://reviews.llvm.org/D105690 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.or

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

khchen added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:10 /// This file describes the RISC-V instructions from the standard 'V' Vector /// extension, version 0.10. /// This version is still experimental as the 'V' extension hasn't been -

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

jacquesguan added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:10 /// This file describes the RISC-V instructions from the standard 'V' Vector /// extension, version 0.10. /// This version is still experimental as the 'V' extension hasn't been

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

khchen added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:10 /// This file describes the RISC-V instructions from the standard 'V' Vector /// extension, version 0.10. /// This version is still experimental as the 'V' extension hasn't been -

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

HsiangKai added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:926 +def : InstAlias<"vfredsum.vs $vd, $vs2, $vs1$vm", +(VFREDUSUM_VS VR:$vd, VR:$vs2, VR:$vs1, VMaskOp:$vm)>; + How about to set the `Emit` to 0 to lower the pr

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

luismarques added inline comments. Comment at: llvm/test/CodeGen/RISCV/rvv/vfredusum-rv32.ll:1 +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+experimental-v,+d,+experimental-zfh -verify-machineinstrs \

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

frasercrmck added inline comments. Comment at: llvm/test/CodeGen/RISCV/rvv/vfredusum-rv32.ll:1 +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+experimental-v,+d,+experimental-zfh -verify-machineinstrs \