[PATCH] D153370: [RISCV] Add support for custom instructions for Sifive S76.

This revision was automatically updated to reflect the committed changes. Closed by commit rG4c37d30e22ae: [RISCV] Add support for custom instructions for Sifive S76. (authored by garvitgupta08, committed by craig.topper). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D153370: [RISCV] Add support for custom instructions for Sifive S76.

garvitgupta08 added a comment. In D153370#4447824 , @craig.topper wrote: > In D153370#4447817 , @garvitgupta08 > wrote: > >> Addressed the changes. I do not have commit access, could you please commit >> this

[PATCH] D153370: [RISCV] Add support for custom instructions for Sifive S76.

craig.topper added a comment. In D153370#4447817 , @garvitgupta08 wrote: > Addressed the changes. I do not have commit access, could you please commit > this differential on my behalf? Thanks. Yes. Can you provide the name and email address for the

[PATCH] D153370: [RISCV] Add support for custom instructions for Sifive S76.

garvitgupta08 updated this revision to Diff 534437. garvitgupta08 added a comment. Addressed the changes. I do not have commit access, could you please commit this differential on my behalf? Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D153370: [RISCV] Add support for custom instructions for Sifive S76.

craig.topper accepted this revision. craig.topper added inline comments. This revision is now accepted and ready to land. Comment at: llvm/docs/ReleaseNotes.rst:209 disassembler/assembler. +* Added support for the vendor-defined Xsfcie (SiFive SCIE) extension +

[PATCH] D153370: [RISCV] Add support for custom instructions for Sifive S76.

garvitgupta08 updated this revision to Diff 534018. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D153370/new/ https://reviews.llvm.org/D153370 Files: clang/test/Driver/riscv-cpus.c llvm/docs/RISCVUsage.rst llvm/docs/ReleaseNotes.rst

[PATCH] D153370: [RISCV] Add support for custom instructions for Sifive S76.

craig.topper added inline comments. Comment at: llvm/lib/Support/RISCVISAInfo.cpp:123 {"xsfvcp", RISCVExtensionVersion{1, 0}}, +{"xsfcie", RISCVExtensionVersion{1, 0}}, {"xtheadba", RISCVExtensionVersion{1, 0}}, Alphabetize.

[PATCH] D153370: [RISCV] Add support for custom instructions for Sifive S76.

garvitgupta08 updated this revision to Diff 533668. garvitgupta08 added a comment. Addressed the comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D153370/new/ https://reviews.llvm.org/D153370 Files: llvm/docs/RISCVUsage.rst

[PATCH] D153370: [RISCV] Add support for custom instructions for Sifive S76.

craig.topper added inline comments. Comment at: llvm/lib/Support/RISCVISAInfo.cpp:135 {"xventanacondops", RISCVExtensionVersion{1, 0}}, +{"xsfcie", RISCVExtensionVersion{1, 0}}, }; Put this with xsfvcp Comment at:

[PATCH] D153370: [RISCV] Add support for custom instructions for Sifive S76.

garvitgupta08 created this revision. garvitgupta08 added reviewers: asb, apazos, jrtc27. Herald added subscribers: jobnoorman, luke, VincentWu, vkmr, frasercrmck, luismarques, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones,