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Closed by commit rGbe7d425edc64: [PPC][AIX] Add vector callee saved registers
for AIX extended vector ABI (authored by ZarkoCA).
Repository:
rG LLVM Github Monorepo
ZarkoCA updated this revision to Diff 307499.
ZarkoCA added a comment.
Seems a few test cases require `mattr=-altivec` to pass with this patch.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D88676
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sfertile accepted this revision.
sfertile added a comment.
This revision is now accepted and ready to land.
LGTM.
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ZarkoCA updated this revision to Diff 306545.
ZarkoCA marked an inline comment as done.
ZarkoCA added a comment.
Fixed failing test cases.
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Files:
llvm/include/llvm/Target/TargetMachine.h
ZarkoCA marked 6 inline comments as done.
ZarkoCA added inline comments.
Comment at: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:235
+return TM.isPPC64()
+ ? (Subtarget.hasAltivec() ? CSR_64_AllRegs_Altivec_RegMask
+ :
ZarkoCA updated this revision to Diff 306515.
ZarkoCA marked an inline comment as done.
ZarkoCA added a comment.
Rebase and remove regmask altivec change.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
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https://reviews.llvm.org/D88676
sfertile added inline comments.
Comment at: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:235
+return TM.isPPC64()
+ ? (Subtarget.hasAltivec() ? CSR_64_AllRegs_Altivec_RegMask
+ : CSR_PPC64_RegMask)
ZarkoCA
ZarkoCA added inline comments.
Comment at: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:235
+return TM.isPPC64()
+ ? (Subtarget.hasAltivec() ? CSR_64_AllRegs_Altivec_RegMask
+ : CSR_PPC64_RegMask)
sfertile
sfertile added inline comments.
Comment at: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:235
+return TM.isPPC64()
+ ? (Subtarget.hasAltivec() ? CSR_64_AllRegs_Altivec_RegMask
+ : CSR_PPC64_RegMask)
ZarkoCA marked an inline comment as done.
ZarkoCA added inline comments.
Comment at: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:184
if (TM.isPPC64()) {
-if (Subtarget.hasAltivec())
+if (Subtarget.hasAltivec()) {
+ if (Subtarget.isAIXABI() &&
ZarkoCA updated this revision to Diff 305150.
ZarkoCA added a comment.
Rebased and addressed comments.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
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https://reviews.llvm.org/D88676
Files:
llvm/lib/Target/PowerPC/PPCCallingConv.td
sfertile added inline comments.
Comment at: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:184
if (TM.isPPC64()) {
-if (Subtarget.hasAltivec())
+if (Subtarget.hasAltivec()) {
+ if (Subtarget.isAIXABI() && !TM.getAIXExtendedAltivecABI())
I suggest
ZarkoCA updated this revision to Diff 298994.
ZarkoCA added a comment.
Fixed typo in test case.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
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https://reviews.llvm.org/D88676
Files:
llvm/lib/Target/PowerPC/PPCCallingConv.td
ZarkoCA updated this revision to Diff 298991.
ZarkoCA marked 3 inline comments as done.
ZarkoCA retitled this revision from "[PPC][AIX] Add vector callee saved
registers for AIX extended vector ABI and add clang and llvm option" to
"[PPC][AIX] Add vector callee saved registers for AIX extended
Xiangling_L added a comment.
I am wondering can we split the option related changes to a separate patch for
reviews? That would make current patch a bit easier to review and faster to be
committed as two small pieces.
If it's possible, I am thinking we can try to split it up to the following
ZarkoCA marked 5 inline comments as done.
ZarkoCA added inline comments.
Comment at: llvm/test/CodeGen/PowerPC/aix-csr-vector.ll:4
+; RUN: FileCheck --check-prefix=MIR32 %s
+
+; RUN: llc -mtriple=powerpc-unknown-aix-xcoff -verify-machineinstrs \
Xiangling_L
ZarkoCA updated this revision to Diff 298409.
ZarkoCA retitled this revision from "[PPC][AIX] Add vector callee saved
registers for AIX extended vector ABI" to "[PPC][AIX] Add vector callee saved
registers for AIX extended vector ABI and add clang and llvm option".
ZarkoCA edited the summary of
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