[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG29b263a34f1a: [Clang][AArch64] Inline assembly support for the ACLE type data512_t (authored by labrinea). Repository: rG LLVM Github Monorepo

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

efriedma accepted this revision. efriedma added a comment. This revision is now accepted and ready to land. LGTM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D94098/new/ https://reviews.llvm.org/D94098 ___ cfe-commits mailing list

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea added a comment. ping CHANGES SINCE LAST ACTION https://reviews.llvm.org/D94098/new/ https://reviews.llvm.org/D94098 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea updated this revision to Diff 360208. labrinea added a comment. This revision uses `i512` to pass the asm operands by-value. I've explained in my last comment what would be the challenges had we chosen `[i64 x 8]`. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D94098/new/

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea added a comment. > struct foo { unsigned long long x[8]; }; > void store(int *in, void *addr) > { > > struct foo x = { in[0], in[1], in[4], in[16], in[25], in[36], in[49], > in[64] }; > __asm__ volatile ("st64b %0,[%1]" : : "r" (x), "r" (addr) : "memory" ); > > } For this

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

efriedma added a comment. In D94098#2886319 , @labrinea wrote: > Firstly, the information that the load/store comes from an inline asm operand > gets lost by the time the SelectionDAG processes those nodes, and so we > cannot use a target hook to select

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea added a comment. Ok, I've tried a few things. If we add a couple of new target hooks we can make clang pass both input and output asm operands by value as `type { [8 x i64] }` avoiding the integer conversion. One issue with that is that the inline asm verifier asserts if an inline asm

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

efriedma added a comment. In D94098#2874976 , @labrinea wrote: > In D94098#2868751 , @efriedma wrote: > >> > > but in my honest opinion I don't see the benefit. The problem is, there isn't really any point to

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea added a comment. In D94098#2868751 , @efriedma wrote: > The part I'm confused about is that you're forcing it to use "*r". At the IR > level, LLVM handles something like `call void asm sideeffect "#$0", "r"([8 x > i64] %c)` fine. You'll have

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

efriedma added a comment. The part I'm confused about is that you're forcing it to use "*r". At the IR level, LLVM handles something like `call void asm sideeffect "#$0", "r"([8 x i64] %c)` fine. You'll have to do a bit of work to teach clang to emit that, but it shouldn't be that hard. I

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea added a comment. In D94098#2865372 , @efriedma wrote: > I'm confused what your goal here is, exactly. The point of allowing 512-bit > inline asm operands is presumably to allow writing efficient code involving > inline asm... but you're

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

efriedma added a comment. I'm confused what your goal here is, exactly. The point of allowing 512-bit inline asm operands is presumably to allow writing efficient code involving inline asm... but you're intentionally destroying any potential efficiency by forcing it to be passed/returned in

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea updated this revision to Diff 355908. labrinea retitled this revision from "[Clang] Inline assembly support for the ACLE type 'data512_t'." to "[Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.". labrinea edited the summary of this revision. labrinea added a