[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-04-02 Thread Craig Topper via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG944adbf28550: Recommit [RISCV] Add IR intrinsic for Zbb extension (authored by LevyHsu, committed by craig.topper). Changed prior to commit:

[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-04-02 Thread Craig Topper via Phabricator via cfe-commits
craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. I'm going to approve this. If we need to change the builtin names in the future that's easy enough to do. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-04-01 Thread Kito Cheng via Phabricator via cfe-commits
kito-cheng added a comment. Created an issue for continue discuses on riscv-c-api-doc https://github.com/riscv/riscv-c-api-doc/issues/19 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D99320/new/ https://reviews.llvm.org/D99320

[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-03-31 Thread Craig Topper via Phabricator via cfe-commits
craig.topper added a comment. In D99320#2661285 , @asb wrote: > Can I just check the reasoning on the naming? I see that the bitmanip 0.93 > spec proposes `_{rv,rv32,rv64}_{opname}` intrinsics. Does the > `__builtin__{riscv,riscv32,riscv64}_opname`

[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-03-31 Thread Alex Bradbury via Phabricator via cfe-commits
asb added a comment. Can I just check the reasoning on the naming? I see that the bitmanip 0.93 spec proposes _{rv,rv32,rv64}_{opname} intrinsics. Does the __builtin__{riscv,riscv32,riscv64}_opname format match what GCC are doing / planning to do here? Precedent for RVV, for other archs, or

[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-03-31 Thread Jim Lin via Phabricator via cfe-commits
Jim added inline comments. Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:26 + +} // TargetPrefix = "riscv" + How about put it between Atomics and Vector to follow canonical order? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-03-31 Thread Craig Topper via Phabricator via cfe-commits
craig.topper added a comment. I think this looks good to me. Anyone else have any comments? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D99320/new/ https://reviews.llvm.org/D99320 ___ cfe-commits

[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-03-30 Thread LevyHsu via Phabricator via cfe-commits
LevyHsu updated this revision to Diff 334322. LevyHsu added a comment. 1. clang/lib/Sema/SemaChecking.cpp - Fixed var name & loop 2. clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c - renamed function Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-03-30 Thread Craig Topper via Phabricator via cfe-commits
craig.topper added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:3418 // message. + bool Feature_Missing = false; + SmallVector ReqFeatures; LLVM coding style does not allow _ in variable names. Comment at:

[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-03-30 Thread LevyHsu via Phabricator via cfe-commits
LevyHsu updated this revision to Diff 334072. LevyHsu added a comment. 1. llvm/lib/Target/RISCV/RISCVISelLowering.cpp - Fixed mishandling on op0 2. clang/include/clang/Basic/BuiltinsRISCV.def clang/lib/CodeGen/CGBuiltin.cpp - Reduce port to 2 versions for 32/64 only. 3.

[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-03-29 Thread Craig Topper via Phabricator via cfe-commits
craig.topper added inline comments. Comment at: clang/include/clang/Basic/BuiltinsRISCV.def:21 +// Zbb extension +TARGET_BUILTIN(__builtin_riscv_orc_b, "LiLi", "nc", "experimental-zbb") +TARGET_BUILTIN(__builtin_riscv32_orc_b, "ZiZi", "nc", "experimental-zbb")

[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-03-29 Thread LevyHsu via Phabricator via cfe-commits
LevyHsu updated this revision to Diff 333798. LevyHsu added a comment. 1. Generated with git format-patch -o patches/ -2 HEAD -U99 2. clang/lib/Sema/SemaChecking.cpp - Rewrote CheckRISCVBuiltinFunctionCall 3. clang/lib/CodeGen/CGBuiltin.cpp - IntrinsicTypes = {ResultType}; 4.

[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-03-25 Thread Craig Topper via Phabricator via cfe-commits
craig.topper added a comment. Please upload the patch using arcanist or using -U99 when generating the diff. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D99320/new/ https://reviews.llvm.org/D99320

[PATCH] D99320: [RISCV] [1/2] Add intrinsic for Zbb extension

2021-03-25 Thread LevyHsu via Phabricator via cfe-commits
LevyHsu created this revision. LevyHsu added reviewers: craig.topper, jrtc27, kito-cheng. LevyHsu added projects: clang, LLVM. Herald added subscribers: vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult,