[clang] [llvm] [LLVM][AArch64] Add ASM constraints for reduced GPR register ranges. (PR #70970)

2023-11-03 Thread Paul Walker via cfe-commits
paulwalker-arm wrote: Rebased after pushing NFC refactoring commit. https://github.com/llvm/llvm-project/pull/70970 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [LLVM][AArch64] Add ASM constraints for reduced GPR register ranges. (PR #70970)

2023-11-02 Thread Jon Roelofs via cfe-commits
https://github.com/jroelofs approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/70970 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [LLVM][AArch64] Add ASM constraints for reduced GPR register ranges. (PR #70970)

2023-11-02 Thread Paul Walker via cfe-commits
paulwalker-arm wrote: * Rebased. * Extended coverage to include all typical scalar types. * Updated the LangRef to document the new constraints. * Added an entry to the release note. https://github.com/llvm/llvm-project/pull/70970 ___ cfe-commits

[clang] [llvm] [LLVM][AArch64] Add ASM constraints for reduced GPR register ranges. (PR #70970)

2023-11-02 Thread Paul Walker via cfe-commits
https://github.com/paulwalker-arm edited https://github.com/llvm/llvm-project/pull/70970 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [LLVM][AArch64] Add ASM constraints for reduced GPR register ranges. (PR #70970)

2023-11-02 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-clang Author: Paul Walker (paulwalker-arm) Changes [LLVM][AArch64] Add ASM constraints for reduced GPR register ranges. The patch adds the follow ASM constraints: Uci = w8-w11 Ucj = w12-w15 These constraints are required for SME load/store

[clang] [llvm] [LLVM][AArch64] Add ASM constraints for reduced GPR register ranges. (PR #70970)

2023-11-02 Thread Paul Walker via cfe-commits
https://github.com/paulwalker-arm updated https://github.com/llvm/llvm-project/pull/70970 >From 500e5007a33d4ee3d594ef5ce58f8894c231f3dc Mon Sep 17 00:00:00 2001 From: Paul Walker Date: Wed, 1 Nov 2023 16:27:29 + Subject: [PATCH 1/2] [NFC][LLVM][SVE] Refactor predicate register ASM

[clang] [llvm] [LLVM][AArch64] Add ASM constraints for reduced GPR register ranges. (PR #70970)

2023-11-02 Thread Peter Waller via cfe-commits
peterwaller-arm wrote: Worth a simultaneous update to the langref? https://github.com/llvm/llvm-project/blob/e2564b27472638d2e2019e6cd2fc6d6d608f8b8c/llvm/docs/LangRef.rst#L5080-L5106 https://github.com/llvm/llvm-project/pull/70970 ___ cfe-commits

[clang] [llvm] [LLVM][AArch64] Add ASM constraints for reduced GPR register ranges. (PR #70970)

2023-11-01 Thread Paul Walker via cfe-commits
paulwalker-arm wrote: The first commit contains refactoring that I'll land separately assuming the reviewers are happy. The new functionality is implemented by the second commit. https://github.com/llvm/llvm-project/pull/70970 ___ cfe-commits

[clang] [llvm] [LLVM][AArch64] Add ASM constraints for reduced GPR register ranges. (PR #70970)

2023-11-01 Thread Paul Walker via cfe-commits
https://github.com/paulwalker-arm created https://github.com/llvm/llvm-project/pull/70970 [LLVM][AArch64] Add ASM constraints for reduced GPR register ranges. The patch adds the follow ASM constraints: Uci => w8-w11 Ucj => w12-w15 These constraints are required for SME load/store