[clang] [riscv] Fix for __riscv_v_fixed_vlen in vector mask types (PR #76510)

topperc wrote: I also have a patch for this that I started on 6 months ago. Let me dig it up and see how far along it was. I recall there being some tricky issues. https://github.com/llvm/llvm-project/pull/76510 ___ cfe-commits mailing list

[clang] [riscv] Fix for __riscv_v_fixed_vlen in vector mask types (PR #76510)

topperc wrote: Missing CodeGen tests https://github.com/llvm/llvm-project/pull/76510 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [riscv] Fix for __riscv_v_fixed_vlen in vector mask types (PR #76510)

github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff ae0b2633c935950084860e5f6a1c2c3203726489 69bfbb84879b41d4e8e5fbbd51b9b95b0767c460 --

[clang] [riscv] Fix for __riscv_v_fixed_vlen in vector mask types (PR #76510)

llvmbot wrote: @llvm/pr-subscribers-clang Author: None (ita-sc) Changes It is already possible to have vector types with riscv_rvv_vector_bits attribute as structure members. But currently this is not the case for vector masks. Having vector masks in structures is useful for library

[clang] [riscv] Fix for __riscv_v_fixed_vlen in vector mask types (PR #76510)

https://github.com/ita-sc created https://github.com/llvm/llvm-project/pull/76510 It is already possible to have vector types with riscv_rvv_vector_bits attribute as structure members. But currently this is not the case for vector masks. Having vector masks in structures is useful for library