Author: Hsiangkai Wang Date: 2021-04-26T17:02:27+08:00 New Revision: 16dc9afa097d2577eff640f0fe9d388960c62cb9
URL: https://github.com/llvm/llvm-project/commit/16dc9afa097d2577eff640f0fe9d388960c62cb9 DIFF: https://github.com/llvm/llvm-project/commit/16dc9afa097d2577eff640f0fe9d388960c62cb9.diff LOG: [RISCV] Add REQUIRES: riscv-registered-target for RISC-V test cases. Added: Modified: clang/test/CodeGen/RISCV/rvv-intrinsics/vmmv.c clang/test/CodeGen/RISCV/rvv-intrinsics/vmnot.c Removed: ################################################################################ diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics/vmmv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics/vmmv.c index adb3a142447f..f89dc879f755 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics/vmmv.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics/vmmv.c @@ -1,10 +1,8 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py +// REQUIRES: riscv-registered-target // RUN: %clang_cc1 -triple riscv32 -target-feature +experimental-v -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck --check-prefix=CHECK-RV32 %s // RUN: %clang_cc1 -triple riscv64 -target-feature +experimental-v -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck --check-prefix=CHECK-RV64 %s -// RUN: %clang_cc1 -triple riscv64 -target-feature +experimental-v -target-feature +m -Werror -Wall -S -o - %s >/dev/null 2>%t -// RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// ASM-NOT: warning #include <riscv_vector.h> // CHECK-RV32-LABEL: @test_vmmv_m_b1( diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics/vmnot.c b/clang/test/CodeGen/RISCV/rvv-intrinsics/vmnot.c index a79d7dce4bbd..bc179d01d850 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics/vmnot.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics/vmnot.c @@ -1,10 +1,8 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py +// REQUIRES: riscv-registered-target // RUN: %clang_cc1 -triple riscv32 -target-feature +experimental-v -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck --check-prefix=CHECK-RV32 %s // RUN: %clang_cc1 -triple riscv64 -target-feature +experimental-v -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck --check-prefix=CHECK-RV64 %s -// RUN: %clang_cc1 -triple riscv64 -target-feature +experimental-v -target-feature +m -Werror -Wall -S -o - %s >/dev/null 2>%t -// RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// ASM-NOT: warning #include <riscv_vector.h> // CHECK-RV32-LABEL: @test_vmnot_m_b1( _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits