Author: Sanjay Patel Date: 2020-09-30T13:22:12-04:00 New Revision: 187686bea3878c0bf2b150d784e7eab223434e25
URL: https://github.com/llvm/llvm-project/commit/187686bea3878c0bf2b150d784e7eab223434e25 DIFF: https://github.com/llvm/llvm-project/commit/187686bea3878c0bf2b150d784e7eab223434e25.diff LOG: [CodeGen] add test for NAN creation; NFC This goes with the APFloat change proposed in D88238. This is copied from the MIPS-specific test in builtin-nan-legacy.c to verify that the normal behavior is correct on other targets without the complication of an inverted quiet bit. Added: clang/test/CodeGen/builtin-nan-exception.c Modified: Removed: ################################################################################ diff --git a/clang/test/CodeGen/builtin-nan-exception.c b/clang/test/CodeGen/builtin-nan-exception.c new file mode 100644 index 000000000000..2acf0c4390ec --- /dev/null +++ b/clang/test/CodeGen/builtin-nan-exception.c @@ -0,0 +1,23 @@ +// RUN: %clang -target aarch64 -emit-llvm -S %s -o - | FileCheck %s +// RUN: %clang -target lanai -emit-llvm -S %s -o - | FileCheck %s +// RUN: %clang -target riscv64 -emit-llvm -S %s -o - | FileCheck %s +// RUN: %clang -target x86_64 -emit-llvm -S %s -o - | FileCheck %s + +// Run a variety of targets to ensure there's no target-based diff erence. + +// The builtin always produces a 64-bit (double). +// An SNaN with no payload is formed by setting the bit after the +// the quiet bit (MSB of the significand). + +// CHECK: float 0x7FF8000000000000, float 0x7FF4000000000000 +// CHECK: double 0x7FF8000000000000, double 0x7FF4000000000000 + +float f[] = { + __builtin_nan(""), + __builtin_nans(""), +}; + +double d[] = { + __builtin_nan(""), + __builtin_nans(""), +}; _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits