Author: rksimon
Date: Sun Nov 15 08:40:31 2015
New Revision: 253169
URL: http://llvm.org/viewvc/llvm-project?rev=253169&view=rev
Log:
[X86][MMX] Added MMX IR + assembly codegen builtin tests for some missing cvt
intrinsics
Modified:
cfe/trunk/test/CodeGen/mmx-builtins.c
Modified: cfe/trunk/test/CodeGen/mmx-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/mmx-builtins.c?rev=253169&r1=253168&r2=253169&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/mmx-builtins.c (original)
+++ cfe/trunk/test/CodeGen/mmx-builtins.c Sun Nov 15 08:40:31 2015
@@ -163,6 +163,20 @@ __m64 test_mm_cmpgt_pi32(__m64 a, __m64
return _mm_cmpgt_pi32(a, b);
}
+__m128 test_mm_cvt_pi2ps(__m128 a, __m64 b) {
+ // CHECK-LABEL: test_mm_cvt_pi2ps
+ // CHECK: <4 x float> @llvm.x86.sse.cvtpi2ps
+ // CHECK-ASM: cvtpi2ps %mm{{.*}}, %xmm{{.*}}
+ return _mm_cvt_pi2ps(a, b);
+}
+
+__m64 test_mm_cvt_ps2pi(__m128 a) {
+ // CHECK-LABEL: test_mm_cvt_ps2pi
+ // CHECK: call x86_mmx @llvm.x86.sse.cvtps2pi
+ // CHECK-ASM: cvtps2pi %xmm{{.*}}, %mm{{.*}}
+ return _mm_cvt_ps2pi(a);
+}
+
__m64 test_mm_cvtpd_pi32(__m128d a) {
// CHECK-LABEL: test_mm_cvtpd_pi32
// CHECK: call x86_mmx @llvm.x86.sse.cvtpd2pi
@@ -184,6 +198,52 @@ __m128d test_mm_cvtpi32_pd(__m64 a) {
return _mm_cvtpi32_pd(a);
}
+__m128 test_mm_cvtpi32_ps(__m128 a, __m64 b) {
+ // CHECK-LABEL: test_mm_cvtpi32_ps
+ // CHECK: call <4 x float> @llvm.x86.sse.cvtpi2ps
+ // CHECK-ASM: cvtpi2ps %mm{{.*}}, %xmm{{.*}}
+ return _mm_cvtpi32_ps(a, b);
+}
+
+__m128 test_mm_cvtpi32x2_ps(__m64 a, __m64 b) {
+ // CHECK-LABEL: test_mm_cvtpi32x2_ps
+ // CHECK: call <4 x float> @llvm.x86.sse.cvtpi2ps
+ // CHECK: call <4 x float> @llvm.x86.sse.cvtpi2ps
+ // CHECK-ASM: cvtpi2ps %mm{{.*}}, %xmm{{.*}}
+ // CHECK-ASM: cvtpi2ps %mm{{.*}}, %xmm{{.*}}
+ return _mm_cvtpi32x2_ps(a, b);
+}
+
+__m64 test_mm_cvtps_pi16(__m128 a) {
+ // CHECK-LABEL: test_mm_cvtps_pi16
+ // CHECK: call x86_mmx @llvm.x86.sse.cvtps2pi
+ // CHECK-ASM: cvtps2pi %xmm{{.*}}, %mm{{.*}}
+ // CHECK-ASM: cvtps2pi %xmm{{.*}}, %mm{{.*}}
+ // CHECK-ASM: packssdw %mm{{.*}}, %mm{{.*}}
+ return _mm_cvtps_pi16(a);
+}
+
+__m64 test_mm_cvtps_pi32(__m128 a) {
+ // CHECK-LABEL: test_mm_cvtps_pi32
+ // CHECK: call x86_mmx @llvm.x86.sse.cvtps2pi
+ // CHECK-ASM: cvtps2pi %xmm{{.*}}, %mm{{.*}}
+ return _mm_cvtps_pi32(a);
+}
+
+__m64 test_mm_cvtsi32_si64(int a) {
+ // CHECK-LABEL: test_mm_cvtsi32_si64
+ // CHECK: insertelement <2 x i32>
+ // CHECK-ASM: movd
+ return _mm_cvtsi32_si64(a);
+}
+
+int test_mm_cvtsi64_si32(__m64 a) {
+ // CHECK-LABEL: test_mm_cvtsi64_si32
+ // CHECK: extractelement <2 x i32>
+ // CHECK-ASM: movd
+ return _mm_cvtsi64_si32(a);
+}
+
__m64 test_mm_cvttpd_pi32(__m128d a) {
// CHECK-LABEL: test_mm_cvttpd_pi32
// CHECK: call x86_mmx @llvm.x86.sse.cvttpd2pi
@@ -191,6 +251,13 @@ __m64 test_mm_cvttpd_pi32(__m128d a) {
return _mm_cvttpd_pi32(a);
}
+__m64 test_mm_cvttps_pi32(__m128 a) {
+ // CHECK-LABEL: test_mm_cvttps_pi32
+ // CHECK: call x86_mmx @llvm.x86.sse.cvttps2pi
+ // CHECK-ASM: cvttps2pi %xmm{{.*}}, %mm{{.*}}
+ return _mm_cvttps_pi32(a);
+}
+
__m64 test_m_from_int(int a) {
// CHECK-LABEL: test_m_from_int
// CHECK: insertelement <2 x i32>
@@ -366,6 +433,20 @@ __m64 test_mm_sad_pu8(__m64 a, __m64 b)
return _mm_sad_pu8(a, b);
}
+__m64 test_mm_shuffle_pi8(__m64 a, __m64 b) {
+ // CHECK-LABEL: test_mm_shuffle_pi8
+ // CHECK: call x86_mmx @llvm.x86.ssse3.pshuf.b
+ // CHECK-ASM: pshufb %mm{{.*}}, %mm{{.*}}
+ return _mm_shuffle_pi8(a, b);
+}
+
+__m64 test_mm_shuffle_pi16(__m64 a) {
+ // CHECK-LABEL: test_mm_shuffle_pi16
+ // CHECK: call x86_mmx @llvm.x86.sse.pshuf.w
+ // CHECK-ASM: pshufw $3, %mm{{.*}}, %mm{{.*}}
+ return _mm_shuffle_pi16(a, 3);
+}
+
__m64 test_mm_sign_pi8(__m64 a, __m64 b) {
// CHECK-LABEL: test_mm_sign_pi8
// CHECK: call x86_mmx @llvm.x86.ssse3.psign.b
@@ -387,20 +468,6 @@ __m64 test_mm_sign_pi32(__m64 a, __m64 b
return _mm_sign_pi32(a, b);
}
-__m64 test_mm_shuffle_pi8(__m64 a, __m64 b) {
- // CHECK-LABEL: test_mm_shuffle_pi8
- // CHECK: call x86_mmx @llvm.x86.ssse3.pshuf.b
- // CHECK-ASM: pshufb %mm{{.*}}, %mm{{.*}}
- return _mm_shuffle_pi8(a, b);
-}
-
-__m64 test_mm_shuffle_pi16(__m64 a) {
- // CHECK-LABEL: test_mm_shuffle_pi16
- // CHECK: call x86_mmx @llvm.x86.sse.pshuf.w
- // CHECK-ASM: pshufw $3, %mm{{.*}}, %mm{{.*}}
- return _mm_shuffle_pi16(a, 3);
-}
-
__m64 test_mm_sll_pi16(__m64 a, __m64 b) {
// CHECK-LABEL: test_mm_sll_pi16
// CHECK: call x86_mmx @llvm.x86.mmx.psll.w
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
