Author: ctopper Date: Sat Feb 18 15:15:30 2017 New Revision: 295570 URL: http://llvm.org/viewvc/llvm-project?rev=295570&view=rev Log: [X86] Replace XOP vpcmov builtins with native vector logical operations.
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/lib/Headers/xopintrin.h cfe/trunk/test/CodeGen/xop-builtins.c Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=295570&r1=295569&r2=295570&view=diff ============================================================================== --- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Sat Feb 18 15:15:30 2017 @@ -832,8 +832,6 @@ TARGET_BUILTIN(__builtin_ia32_vphaddudq, TARGET_BUILTIN(__builtin_ia32_vphsubbw, "V8sV16c", "", "xop") TARGET_BUILTIN(__builtin_ia32_vphsubwd, "V4iV8s", "", "xop") TARGET_BUILTIN(__builtin_ia32_vphsubdq, "V2LLiV4i", "", "xop") -TARGET_BUILTIN(__builtin_ia32_vpcmov, "V2LLiV2LLiV2LLiV2LLi", "", "xop") -TARGET_BUILTIN(__builtin_ia32_vpcmov_256, "V4LLiV4LLiV4LLiV4LLi", "", "xop") TARGET_BUILTIN(__builtin_ia32_vpperm, "V16cV16cV16cV16c", "", "xop") TARGET_BUILTIN(__builtin_ia32_vprotb, "V16cV16cV16c", "", "xop") TARGET_BUILTIN(__builtin_ia32_vprotw, "V8sV8sV8s", "", "xop") Modified: cfe/trunk/lib/Headers/xopintrin.h URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/xopintrin.h?rev=295570&r1=295569&r2=295570&view=diff ============================================================================== --- cfe/trunk/lib/Headers/xopintrin.h (original) +++ cfe/trunk/lib/Headers/xopintrin.h Sat Feb 18 15:15:30 2017 @@ -198,13 +198,13 @@ _mm_hsubq_epi32(__m128i __A) static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmov_si128(__m128i __A, __m128i __B, __m128i __C) { - return (__m128i)__builtin_ia32_vpcmov((__v2di)__A, (__v2di)__B, (__v2di)__C); + return (__m128i)((__v2du)__A & (__v2du)__C) | ((__v2du)__B & ~(__v2du)__C); } static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_cmov_si256(__m256i __A, __m256i __B, __m256i __C) { - return (__m256i)__builtin_ia32_vpcmov_256((__v4di)__A, (__v4di)__B, (__v4di)__C); + return (__m256i)((__v4du)__A & (__v4du)__C) | ((__v4du)__B & ~(__v4du)__C); } static __inline__ __m128i __DEFAULT_FN_ATTRS Modified: cfe/trunk/test/CodeGen/xop-builtins.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/xop-builtins.c?rev=295570&r1=295569&r2=295570&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/xop-builtins.c (original) +++ cfe/trunk/test/CodeGen/xop-builtins.c Sat Feb 18 15:15:30 2017 @@ -170,13 +170,19 @@ __m128i test_mm_hsubq_epi32(__m128i a) { __m128i test_mm_cmov_si128(__m128i a, __m128i b, __m128i c) { // CHECK-LABEL: test_mm_cmov_si128 - // CHECK: call <2 x i64> @llvm.x86.xop.vpcmov(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}) + // CHECK: [[AND:%.*]] = and <2 x i64> %{{.*}}, %{{.*}} + // CHECK: [[NEG:%.*]] = xor <2 x i64> %{{.*}}, <i64 -1, i64 -1> + // CHECK-NEXT: [[ANDN:%.*]] = and <2 x i64> %{{.*}}, [[NEG]] + // CHECK-NEXT: %{{.*}} = or <2 x i64> [[AND]], [[ANDN]] return _mm_cmov_si128(a, b, c); } __m256i test_mm256_cmov_si256(__m256i a, __m256i b, __m256i c) { // CHECK-LABEL: test_mm256_cmov_si256 - // CHECK: call <4 x i64> @llvm.x86.xop.vpcmov.256(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}}) + // CHECK: [[AND:%.*]] = and <4 x i64> %{{.*}}, %{{.*}} + // CHECK: [[NEG:%.*]] = xor <4 x i64> %{{.*}}, <i64 -1, i64 -1, i64 -1, i64 -1> + // CHECK-NEXT: [[ANDN:%.*]] = and <4 x i64> %{{.*}}, [[NEG]] + // CHECK-NEXT: %{{.*}} = or <4 x i64> [[AND]], [[ANDN]] return _mm256_cmov_si256(a, b, c); } _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits