Author: arsenm Date: Fri Jun 21 18:30:00 2019 New Revision: 364123 URL: http://llvm.org/viewvc/llvm-project?rev=364123&view=rev Log: AMDGPU: Fix target builtins for gfx10
This wasn't setting some of the features from older generations. Modified: cfe/trunk/lib/Basic/Targets/AMDGPU.cpp cfe/trunk/test/CodeGenOpenCL/amdgpu-features.cl cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-ci.cl cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err-clamp.cl cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts.cl cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-gfx9.cl cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-vi.cl Modified: cfe/trunk/lib/Basic/Targets/AMDGPU.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/AMDGPU.cpp?rev=364123&r1=364122&r2=364123&view=diff ============================================================================== --- cfe/trunk/lib/Basic/Targets/AMDGPU.cpp (original) +++ cfe/trunk/lib/Basic/Targets/AMDGPU.cpp Fri Jun 21 18:30:00 2019 @@ -144,8 +144,10 @@ bool AMDGPUTargetInfo::initFeatureMap( LLVM_FALLTHROUGH; case GK_GFX1010: Features["dl-insts"] = true; + Features["ci-insts"] = true; Features["16-bit-insts"] = true; Features["dpp"] = true; + Features["gfx8-insts"] = true; Features["gfx9-insts"] = true; Features["gfx10-insts"] = true; Features["s-memrealtime"] = true; Modified: cfe/trunk/test/CodeGenOpenCL/amdgpu-features.cl URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenOpenCL/amdgpu-features.cl?rev=364123&r1=364122&r2=364123&view=diff ============================================================================== --- cfe/trunk/test/CodeGenOpenCL/amdgpu-features.cl (original) +++ cfe/trunk/test/CodeGenOpenCL/amdgpu-features.cl Fri Jun 21 18:30:00 2019 @@ -15,9 +15,9 @@ // GFX904: "target-features"="+16-bit-insts,+ci-insts,+dpp,+fp32-denormals,+fp64-fp16-denormals,+gfx8-insts,+gfx9-insts,+s-memrealtime" // GFX906: "target-features"="+16-bit-insts,+ci-insts,+dl-insts,+dot1-insts,+dot2-insts,+dpp,+fp32-denormals,+fp64-fp16-denormals,+gfx8-insts,+gfx9-insts,+s-memrealtime" -// GFX1010: "target-features"="+16-bit-insts,+dl-insts,+dpp,+fp32-denormals,+fp64-fp16-denormals,+gfx10-insts,+gfx9-insts,+s-memrealtime" -// GFX1011: "target-features"="+16-bit-insts,+dl-insts,+dot1-insts,+dot2-insts,+dot5-insts,+dot6-insts,+dpp,+fp32-denormals,+fp64-fp16-denormals,+gfx10-insts,+gfx9-insts,+s-memrealtime" -// GFX1012: "target-features"="+16-bit-insts,+dl-insts,+dot1-insts,+dot2-insts,+dot5-insts,+dot6-insts,+dpp,+fp32-denormals,+fp64-fp16-denormals,+gfx10-insts,+gfx9-insts,+s-memrealtime" +// GFX1010: "target-features"="+16-bit-insts,+ci-insts,+dl-insts,+dpp,+fp32-denormals,+fp64-fp16-denormals,+gfx10-insts,+gfx8-insts,+gfx9-insts,+s-memrealtime" +// GFX1011: "target-features"="+16-bit-insts,+ci-insts,+dl-insts,+dot1-insts,+dot2-insts,+dot5-insts,+dot6-insts,+dpp,+fp32-denormals,+fp64-fp16-denormals,+gfx10-insts,+gfx8-insts,+gfx9-insts,+s-memrealtime" +// GFX1012: "target-features"="+16-bit-insts,+ci-insts,+dl-insts,+dot1-insts,+dot2-insts,+dot5-insts,+dot6-insts,+dpp,+fp32-denormals,+fp64-fp16-denormals,+gfx10-insts,+gfx8-insts,+gfx9-insts,+s-memrealtime" // GFX801: "target-features"="+16-bit-insts,+ci-insts,+dpp,+fp32-denormals,+fp64-fp16-denormals,+gfx8-insts,+s-memrealtime" // GFX700: "target-features"="+ci-insts,+fp64-fp16-denormals,-fp32-denormals" // GFX600: "target-features"="+fp64-fp16-denormals,-fp32-denormals" Modified: cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-ci.cl URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-ci.cl?rev=364123&r1=364122&r2=364123&view=diff ============================================================================== --- cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-ci.cl (original) +++ cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-ci.cl Fri Jun 21 18:30:00 2019 @@ -2,6 +2,7 @@ // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu hawaii -S -emit-llvm -o - %s | FileCheck %s // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu fiji -S -emit-llvm -o - %s | FileCheck %s // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx906 -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1010 -S -emit-llvm -o - %s | FileCheck %s typedef unsigned int uint; Modified: cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err-clamp.cl URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err-clamp.cl?rev=364123&r1=364122&r2=364123&view=diff ============================================================================== --- cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err-clamp.cl (original) +++ cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err-clamp.cl Fri Jun 21 18:30:00 2019 @@ -1,6 +1,7 @@ // REQUIRES: amdgpu-registered-target // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx906 -verify -S -emit-llvm -o - %s +// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1010 -verify -S -emit-llvm -o - %s typedef unsigned int uint; typedef half __attribute__((ext_vector_type(2))) half2; Modified: cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl?rev=364123&r1=364122&r2=364123&view=diff ============================================================================== --- cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl (original) +++ cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl Fri Jun 21 18:30:00 2019 @@ -1,6 +1,7 @@ // REQUIRES: amdgpu-registered-target // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx900 -verify -S -emit-llvm -o - %s +// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1010 -verify -S -emit-llvm -o - %s typedef unsigned int uint; typedef half __attribute__((ext_vector_type(2))) half2; Modified: cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts.cl URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts.cl?rev=364123&r1=364122&r2=364123&view=diff ============================================================================== --- cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts.cl (original) +++ cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-dl-insts.cl Fri Jun 21 18:30:00 2019 @@ -1,6 +1,8 @@ // REQUIRES: amdgpu-registered-target // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx906 -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1011 -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1012 -S -emit-llvm -o - %s | FileCheck %s typedef unsigned int uint; typedef half __attribute__((ext_vector_type(2))) half2; Modified: cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-gfx9.cl URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-gfx9.cl?rev=364123&r1=364122&r2=364123&view=diff ============================================================================== --- cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-gfx9.cl (original) +++ cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-gfx9.cl Fri Jun 21 18:30:00 2019 @@ -1,5 +1,6 @@ // REQUIRES: amdgpu-registered-target // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx900 -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1010 -S -emit-llvm -o - %s | FileCheck %s #pragma OPENCL EXTENSION cl_khr_fp16 : enable Modified: cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-vi.cl URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-vi.cl?rev=364123&r1=364122&r2=364123&view=diff ============================================================================== --- cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-vi.cl (original) +++ cfe/trunk/test/CodeGenOpenCL/builtins-amdgcn-vi.cl Fri Jun 21 18:30:00 2019 @@ -1,5 +1,8 @@ // REQUIRES: amdgpu-registered-target // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu tonga -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx900 -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1010 -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1012 -S -emit-llvm -o - %s | FileCheck %s #pragma OPENCL EXTENSION cl_khr_fp16 : enable _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits