date:20190622

[PATCH] D62883: [analyzer] Track terminator conditions on which a tracked expressions depends

2019-06-22 Thread Artem Dergachev via Phabricator via cfe-commits

NoQ added a comment.

In D62883#1554514 , @Szelethus wrote:

> In D62883#1554494 , @NoQ wrote:
>
> > It should be pretty easy to implement, just add your new visitor to the 
> > list of default visitors in `findValidReport()`.
>
>
> The thinking was to preserve this patch (roughly) in the state as the 
> analyses were run.


Sure!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62883/new/

https://reviews.llvm.org/D62883



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r364147 - Revert "builtins: relax __iso_volatile_{load,store}32"

2019-06-22 Thread Saleem Abdulrasool via cfe-commits

Author: compnerd
Date: Sat Jun 22 19:53:03 2019
New Revision: 364147

URL: http://llvm.org/viewvc/llvm-project?rev=364147=rev
Log:
Revert "builtins: relax __iso_volatile_{load,store}32"

This reverts commit SVN r364137.  This seems to be cause problems with
casting in C.

Removed:
cfe/trunk/test/CodeGenCXX/ms-intrinsics.cpp
Modified:
cfe/trunk/include/clang/Basic/Builtins.def

Modified: cfe/trunk/include/clang/Basic/Builtins.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/Builtins.def?rev=364147=364146=364147=diff
==
--- cfe/trunk/include/clang/Basic/Builtins.def (original)
+++ cfe/trunk/include/clang/Basic/Builtins.def Sat Jun 22 19:53:03 2019
@@ -827,11 +827,11 @@ LANGBUILTIN(_interlockedbittestandset_nf
 LANGBUILTIN(_interlockedbittestandset_rel,   "UcNiD*Ni", "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__iso_volatile_load8,   "ccCD*", "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__iso_volatile_load16,  "ssCD*", "n", ALL_MS_LANGUAGES)
-LANGBUILTIN(__iso_volatile_load32,  "LiLiCD*",   "n", ALL_MS_LANGUAGES)
+LANGBUILTIN(__iso_volatile_load32,  "iiCD*", "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__iso_volatile_load64,  "LLiLLiCD*", "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__iso_volatile_store8,  "vcD*c", "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__iso_volatile_store16, "vsD*s", "n", ALL_MS_LANGUAGES)
-LANGBUILTIN(__iso_volatile_store32, "vLiD*Li",   "n", ALL_MS_LANGUAGES)
+LANGBUILTIN(__iso_volatile_store32, "viD*i", "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__iso_volatile_store64, "vLLiD*LLi", "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__noop,   "i.",  "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__lzcnt16, "UsUs","nc", ALL_MS_LANGUAGES)

Removed: cfe/trunk/test/CodeGenCXX/ms-intrinsics.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/ms-intrinsics.cpp?rev=364146=auto
==
--- cfe/trunk/test/CodeGenCXX/ms-intrinsics.cpp (original)
+++ cfe/trunk/test/CodeGenCXX/ms-intrinsics.cpp (removed)
@@ -1,17 +0,0 @@
-// RUN: %clang_cc1 -fms-compatibility -fsyntax-only %s -verify
-// expected-no-diagnostics
-
-struct S {
-  mutable long _Spinlock = 0;
-  void _Unlock() {
-__iso_volatile_store32(&_Spinlock, 0);
-  }
-  int _Reset() {
-long v = __iso_volatile_load32(&_Spinlock);
-__iso_volatile_store32(&_Spinlock, 0);
-return v;
-  }
-};
-
-S s;
-


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r364145 - MSVC visualizers for type aliases

2019-06-22 Thread Mike Spertus via cfe-commits

Author: mps
Date: Sat Jun 22 18:15:48 2019
New Revision: 364145

URL: http://llvm.org/viewvc/llvm-project?rev=364145=rev
Log:
MSVC visualizers for type aliases

For example, the following TypeAliasTemplateDecl now displays in the autos 
window as
template using type_identity_t = type_identity::type;

Modified:
cfe/trunk/utils/ClangVisualizers/clang.natvis

Modified: cfe/trunk/utils/ClangVisualizers/clang.natvis
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/utils/ClangVisualizers/clang.natvis?rev=364145=364144=364145=diff
==
--- cfe/trunk/utils/ClangVisualizers/clang.natvis (original)
+++ cfe/trunk/utils/ClangVisualizers/clang.natvis Sat Jun 22 18:15:48 2019
@@ -33,6 +33,8 @@ For later versions of Visual Studio, no
 {(clang::IncompleteArrayType *)this,na}
 {(clang::IncompleteArrayType 
*)this,view(left)na}
 {(clang::IncompleteArrayType 
*)this,view(right)na}
+{(clang::TypedefType *)this,na}
+{(clang::TypedefType *)this,view(cpp)na}
 {*(clang::AttributedType *)this}
 {(clang::DecayedType *)this,na}
 {(clang::DecayedType *)this,view(left)na}
@@ -48,6 +50,7 @@ For later versions of Visual Studio, no
 {*(clang::TemplateSpecializationType *)this}
 {*(clang::DeducedTemplateSpecializationType 
*)this}
 {*(clang::InjectedClassNameType *)this}
+{*(clang::DependentNameType *)this}
 {*(clang::PackExpansionType *)this}
 {*(clang::LocInfoType *)this}
 {*this,view(poly)}
@@ -93,6 +96,7 @@ For later versions of Visual Studio, no
   (clang::TemplateSpecializationType
 *)this
   (clang::DeducedTemplateSpecializationType
 *)this
   (clang::InjectedClassNameType
 *)this
+  (clang::DependentNameType
 *)this
   (clang::PackExpansionType
 *)this
   (clang::LocInfoType 
*)this
 
@@ -119,6 +123,14 @@ For later versions of Visual Studio, no
   (clang::ArrayType *)this
 
   
+  
+{Decl,view(name)nd}
+{Decl}
+
+  Decl
+  *(clang::Type *)this, view(cmn)
+
+  
   
 {PointeeType, view(poly)} *
 
@@ -192,6 +204,24 @@ For later versions of Visual Studio, no
   TemplatedDecl,na
 
   
+  
+  
+{(clang::TypeSourceInfo *)(MaybeModedTInfo.Value  
~7LL),view(cpp)na}
+{(clang::TypedefNameDecl::ModedTInfo 
*)(MaybeModedTInfo.Value  ~7LL),view(cpp)na}
+{(TypeDecl 
*)this,view(cpp)nand}
+typedef {this,view(type)na} 
{this,view(name)};
+
+  "Not yet calculated",sb
+  (bool)(MaybeModedTInfo.Value  2)
+  (clang::TypeSourceInfo *)(MaybeModedTInfo.Value  ~7LL)
+  (clang::TypedefNameDecl::ModedTInfo *)(MaybeModedTInfo.Value  
~7LL)
+  (TypeDecl *)this,nd
+
+  
+  
+using {(TypedefNameDecl *)this,view(name)nand} = 
{(TypedefNameDecl *)this,view(type)nand}
+  
+
   
 {Storage,na}
 
@@ -303,6 +333,23 @@ For later versions of Visual Studio, no
   *(clang::Type *)this, view(cmn)
 
   
+  
+{NNS}{Name,view(cpp)na}
+
+  NNS
+  Name
+  *(clang::Type *)this, view(cmn)
+
+  
+  
+
+{(IdentifierInfo*)Specifier,view(cpp)na}::
+{(NamedDecl*)Specifier,view(cpp)na}::
+{(Type*)Specifier,view(cpp)na}::
+
+  (NestedNameSpecifier::StoredSpecifierKind)((Prefix.Value1)3)
+
+  
   
 {Pattern}
 
@@ -343,7 +390,11 @@ For later versions of Visual Studio, no
 
   
   
+{Ty,view(cpp)}
 {Ty}
+
+  Ty
+
   
   
 {Argument}


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D63685: [analyzer] exploded-graph-rewriter: Add support for range constraints.

2019-06-22 Thread Csaba Dabis via Phabricator via cfe-commits

Charusso accepted this revision.
Charusso added a comment.
This revision is now accepted and ready to land.

That is a great design-decision, thanks!


Repository:
  rC Clang

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63685/new/

https://reviews.llvm.org/D63685



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D63684: [analyzer] exploded-graph-rewriter: NFC: Extract some code into functions.

2019-06-22 Thread Csaba Dabis via Phabricator via cfe-commits

Charusso accepted this revision.
Charusso added a comment.
This revision is now accepted and ready to land.

I like that abstraction!


Repository:
  rC Clang

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63684/new/

https://reviews.llvm.org/D63684



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r364140 - Fix TBAA representation for zero-sized fields and unnamed bit-fields.

2019-06-22 Thread Richard Smith via cfe-commits

Author: rsmith
Date: Sat Jun 22 14:30:43 2019
New Revision: 364140

URL: http://llvm.org/viewvc/llvm-project?rev=364140=rev
Log:
Fix TBAA representation for zero-sized fields and unnamed bit-fields.

Unnamed bit-fields should not be represented in the TBAA metadata
because they do not represent storage fields (they only affect layout).

Zero-sized fields should not be represented in the TBAA metadata
because by definition they have no associated storage (so we will never
emit a load or store through them), and they might not appear in
declaration order within the struct layout.

Fixes a verifier failure when emitting a TBAA-enabled load through a
class type containing a zero-sized field.

Modified:
cfe/trunk/lib/CodeGen/CodeGenTBAA.cpp
cfe/trunk/test/CodeGen/tbaa-struct.cpp
cfe/trunk/test/CodeGen/tbaa.cpp
cfe/trunk/test/CodeGenCXX/no-unique-address.cpp

Modified: cfe/trunk/lib/CodeGen/CodeGenTBAA.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CodeGenTBAA.cpp?rev=364140=364139=364140=diff
==
--- cfe/trunk/lib/CodeGen/CodeGenTBAA.cpp (original)
+++ cfe/trunk/lib/CodeGen/CodeGenTBAA.cpp Sat Jun 22 14:30:43 2019
@@ -257,6 +257,8 @@ CodeGenTBAA::CollectFields(uint64_t Base
 unsigned idx = 0;
 for (RecordDecl::field_iterator i = RD->field_begin(),
  e = RD->field_end(); i != e; ++i, ++idx) {
+  if ((*i)->isZeroSize(Context) || (*i)->isUnnamedBitfield())
+continue;
   uint64_t Offset = BaseOffset +
 Layout.getFieldOffset(idx) / Context.getCharWidth();
   QualType FieldQTy = i->getType();
@@ -297,6 +299,8 @@ llvm::MDNode *CodeGenTBAA::getBaseTypeIn
 const ASTRecordLayout  = Context.getASTRecordLayout(RD);
 SmallVector Fields;
 for (FieldDecl *Field : RD->fields()) {
+  if (Field->isZeroSize(Context) || Field->isUnnamedBitfield())
+continue;
   QualType FieldQTy = Field->getType();
   llvm::MDNode *TypeNode = isValidBaseType(FieldQTy) ?
   getBaseTypeInfo(FieldQTy) : getTypeInfo(FieldQTy);

Modified: cfe/trunk/test/CodeGen/tbaa-struct.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/tbaa-struct.cpp?rev=364140=364139=364140=diff
==
--- cfe/trunk/test/CodeGen/tbaa-struct.cpp (original)
+++ cfe/trunk/test/CodeGen/tbaa-struct.cpp Sat Jun 22 14:30:43 2019
@@ -111,8 +111,8 @@ void copy7(A *a1, AA *a2) {
 // CHECK-OLD: [[TS2]] = !{i64 0, i64 1, !{{.*}}, i64 4, i64 2, !{{.*}}, i64 8, 
i64 4, !{{.*}}, i64 12, i64 1, !{{.*}}, i64 16, i64 4, {{.*}}, i64 20, i64 4, 
{{.*}}}
 // (offset, size) = (0,8) char; (0,2) char; (4,8) char
 // CHECK-OLD: [[TS3]] = !{i64 0, i64 8, !{{.*}}, i64 0, i64 2, !{{.*}}, i64 4, 
i64 8, !{{.*}}}
-// CHECK-OLD: [[TS4]] = !{i64 0, i64 1, [[TAG_CHAR]], i64 1, i64 4, 
[[TAG_INT]], i64 1, i64 1, [[TAG_CHAR]], i64 2, i64 1, [[TAG_CHAR]]}
-// CHECK-OLD: [[TS5]] = !{i64 0, i64 1, [[TAG_CHAR]], i64 4, i64 4, 
[[TAG_INT]], i64 4, i64 1, [[TAG_CHAR]], i64 5, i64 1, [[TAG_CHAR]]}
+// CHECK-OLD: [[TS4]] = !{i64 0, i64 1, [[TAG_CHAR]], i64 1, i64 1, 
[[TAG_CHAR]], i64 2, i64 1, [[TAG_CHAR]]}
+// CHECK-OLD: [[TS5]] = !{i64 0, i64 1, [[TAG_CHAR]], i64 4, i64 1, 
[[TAG_CHAR]], i64 5, i64 1, [[TAG_CHAR]]}
 
 // CHECK-NEW-DAG: [[TYPE_char:!.*]] = !{{{.*}}, i64 1, !"omnipotent char"}
 // CHECK-NEW-DAG: [[TAG_char]] = !{[[TYPE_char]], [[TYPE_char]], i64 0, i64 0}
@@ -123,7 +123,7 @@ void copy7(A *a1, AA *a2) {
 // CHECK-NEW-DAG: [[TYPE_B:!.*]] = !{[[TYPE_char]], i64 24, !"_ZTS1B", 
[[TYPE_char]], i64 0, i64 1, [[TYPE_A]], i64 4, i64 16, [[TYPE_int]], i64 20, 
i64 4}
 // CHECK-NEW-DAG: [[TAG_B]] = !{[[TYPE_B]], [[TYPE_B]], i64 0, i64 24}
 // CHECK-NEW-DAG: [[TAG_U]] = !{[[TYPE_char]], [[TYPE_char]], i64 0, i64 12}
-// CHECK-NEW-DAG: [[TYPE_C:!.*]] = !{[[TYPE_char]], i64 3, !"_ZTS1C", 
[[TYPE_char]], i64 0, i64 1, [[TYPE_int]], i64 1, i64 4, [[TYPE_char]], i64 1, 
i64 1, [[TYPE_char]], i64 2, i64 1}
+// CHECK-NEW-DAG: [[TYPE_C:!.*]] = !{[[TYPE_char]], i64 3, !"_ZTS1C", 
[[TYPE_char]], i64 0, i64 1, [[TYPE_char]], i64 1, i64 1, [[TYPE_char]], i64 2, 
i64 1}
 // CHECK-NEW-DAG: [[TAG_C]] = !{[[TYPE_C]], [[TYPE_C]], i64 0, i64 3}
-// CHECK-NEW-DAG: [[TYPE_D:!.*]] = !{[[TYPE_char]], i64 6, !"_ZTS1D", 
[[TYPE_char]], i64 0, i64 1, [[TYPE_int]], i64 4, i64 4, [[TYPE_char]], i64 4, 
i64 1, [[TYPE_char]], i64 5, i64 1}
+// CHECK-NEW-DAG: [[TYPE_D:!.*]] = !{[[TYPE_char]], i64 6, !"_ZTS1D", 
[[TYPE_char]], i64 0, i64 1, [[TYPE_char]], i64 4, i64 1, [[TYPE_char]], i64 5, 
i64 1}
 // CHECK-NEW-DAG: [[TAG_D]] = !{[[TYPE_D]], [[TYPE_D]], i64 0, i64 6}

Modified: cfe/trunk/test/CodeGen/tbaa.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/tbaa.cpp?rev=364140=364139=364140=diff
==
--- cfe/trunk/test/CodeGen/tbaa.cpp (original)
+++

[PATCH] D63636: [PowerPC][Altivec] Fix offsets for vec_xl and vec_xst

2019-06-22 Thread Jinsong Ji via Phabricator via cfe-commits

jsji accepted this revision.
jsji added a comment.
This revision is now accepted and ready to land.

LGTM. Thanks for fixing.


Repository:
  rC Clang

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63636/new/

https://reviews.llvm.org/D63636



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r364139 - Remove reliance on toCharUnitsFromBits rounding down.

2019-06-22 Thread Richard Smith via cfe-commits

Author: rsmith
Date: Sat Jun 22 13:41:57 2019
New Revision: 364139

URL: http://llvm.org/viewvc/llvm-project?rev=364139=rev
Log:
Remove reliance on toCharUnitsFromBits rounding down.

Modified:
cfe/trunk/lib/CodeGen/CGExprConstant.cpp

Modified: cfe/trunk/lib/CodeGen/CGExprConstant.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGExprConstant.cpp?rev=364139=364138=364139=diff
==
--- cfe/trunk/lib/CodeGen/CGExprConstant.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGExprConstant.cpp Sat Jun 22 13:41:57 2019
@@ -187,7 +187,8 @@ bool ConstantAggregateBuilder::addBits(l
 
   // We split bit-fields up into individual bytes. Walk over the bytes and
   // update them.
-  for (CharUnits OffsetInChars = Context.toCharUnitsFromBits(OffsetInBits);
+  for (CharUnits OffsetInChars =
+   Context.toCharUnitsFromBits(OffsetInBits - OffsetWithinChar);
/**/; ++OffsetInChars) {
 // Number of bits we want to fill in this char.
 unsigned WantedBits =


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r364138 - Natural MSVC visualization of constructors

2019-06-22 Thread Mike Spertus via cfe-commits

Author: mps
Date: Sat Jun 22 11:56:40 2019
New Revision: 364138

URL: http://llvm.org/viewvc/llvm-project?rev=364138=rev
Log:
Natural MSVC visualization of constructors

E.g., Allow MSVC to visualize a CXXConstructorDecl like 
Constructor { Y(type_identity_t)}


Modified:
cfe/trunk/utils/ClangVisualizers/clang.natvis

Modified: cfe/trunk/utils/ClangVisualizers/clang.natvis
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/utils/ClangVisualizers/clang.natvis?rev=364138=364137=364138=diff
==
--- cfe/trunk/utils/ClangVisualizers/clang.natvis (original)
+++ cfe/trunk/utils/ClangVisualizers/clang.natvis Sat Jun 22 11:56:40 2019
@@ -515,7 +515,8 @@ For later versions of Visual Studio, no
 {{Identifier ({*(clang::IdentifierInfo *)(Ptr  
~PtrMask)})}}
 {{ObjC Zero Arg Selector (*{(clang::IdentifierInfo 
*)(Ptr  ~PtrMask)})}}
 {{ObjC One Arg Selector (*{(clang::IdentifierInfo 
*)(Ptr  ~PtrMask)})}}
-C++ Constructor 
{{*(clang::detail::CXXSpecialNameExtra *)(Ptr  ~PtrMask)}}
+{(clang::detail::CXXSpecialNameExtra *)(Ptr  
~PtrMask),view(cpp)na}
+C++ Constructor 
{{{(clang::detail::CXXSpecialNameExtra *)(Ptr  
~PtrMask),view(cpp)na}}}
 C++ Destructor {{*(clang::detail::CXXSpecialNameExtra 
*)(Ptr  ~PtrMask)}}
 C++ Conversion function 
{{*(clang::detail::CXXSpecialNameExtra *)(Ptr  ~PtrMask)}}
 C++ Operator {{*(clang::detail::CXXOperatorIdName *)(Ptr 
 ~PtrMask)}}
@@ -540,6 +541,10 @@ For later versions of Visual Studio, no
 C++ 
Using directive  
 
{(clang::detail::DeclarationNameExtra::ExtraKind)ExtraKindOrNumArgs,en}{"
  ",sb}{*this,view(cpp)}
   
+  
+{Type,view(cpp)}
+{Type}
+  
   
 {(clang::tok::TokenKind)Kind,en}
 {{Identifier 
({*(clang::IdentifierInfo *)(PtrData)})}}


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r364137 - builtins: relax __iso_volatile_{load,store}32

2019-06-22 Thread Saleem Abdulrasool via cfe-commits

Author: compnerd
Date: Sat Jun 22 11:55:51 2019
New Revision: 364137

URL: http://llvm.org/viewvc/llvm-project?rev=364137=rev
Log:
builtins: relax __iso_volatile_{load,store}32

This is reduced from MSVC's MSVCPRT 14.21.27702 atomic header.  Because
Windows is a LLP64 environment, `long`, `long int`, and `int` are all
synonymous.  Change the signature for `__iso_volatile_load32` and
`__iso_volatile_store32` to accept a `long int` instead.  This allows
an implicit cast of `int` to `long int` while also permitting `long`
to be accepted.

Added:
cfe/trunk/test/CodeGenCXX/ms-intrinsics.cpp
Modified:
cfe/trunk/include/clang/Basic/Builtins.def

Modified: cfe/trunk/include/clang/Basic/Builtins.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/Builtins.def?rev=364137=364136=364137=diff
==
--- cfe/trunk/include/clang/Basic/Builtins.def (original)
+++ cfe/trunk/include/clang/Basic/Builtins.def Sat Jun 22 11:55:51 2019
@@ -827,11 +827,11 @@ LANGBUILTIN(_interlockedbittestandset_nf
 LANGBUILTIN(_interlockedbittestandset_rel,   "UcNiD*Ni", "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__iso_volatile_load8,   "ccCD*", "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__iso_volatile_load16,  "ssCD*", "n", ALL_MS_LANGUAGES)
-LANGBUILTIN(__iso_volatile_load32,  "iiCD*", "n", ALL_MS_LANGUAGES)
+LANGBUILTIN(__iso_volatile_load32,  "LiLiCD*",   "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__iso_volatile_load64,  "LLiLLiCD*", "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__iso_volatile_store8,  "vcD*c", "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__iso_volatile_store16, "vsD*s", "n", ALL_MS_LANGUAGES)
-LANGBUILTIN(__iso_volatile_store32, "viD*i", "n", ALL_MS_LANGUAGES)
+LANGBUILTIN(__iso_volatile_store32, "vLiD*Li",   "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__iso_volatile_store64, "vLLiD*LLi", "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__noop,   "i.",  "n", ALL_MS_LANGUAGES)
 LANGBUILTIN(__lzcnt16, "UsUs","nc", ALL_MS_LANGUAGES)

Added: cfe/trunk/test/CodeGenCXX/ms-intrinsics.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/ms-intrinsics.cpp?rev=364137=auto
==
--- cfe/trunk/test/CodeGenCXX/ms-intrinsics.cpp (added)
+++ cfe/trunk/test/CodeGenCXX/ms-intrinsics.cpp Sat Jun 22 11:55:51 2019
@@ -0,0 +1,17 @@
+// RUN: %clang_cc1 -fms-compatibility -fsyntax-only %s -verify
+// expected-no-diagnostics
+
+struct S {
+  mutable long _Spinlock = 0;
+  void _Unlock() {
+__iso_volatile_store32(&_Spinlock, 0);
+  }
+  int _Reset() {
+long v = __iso_volatile_load32(&_Spinlock);
+__iso_volatile_store32(&_Spinlock, 0);
+return v;
+  }
+};
+
+S s;
+


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D63636: [PowerPC][Altivec] Fix offsets for vec_xl and vec_xst

2019-06-22 Thread Nemanja Ivanovic via Phabricator via cfe-commits

nemanjai updated this revision to Diff 206123.
nemanjai added a comment.

Remove the double cast. Simplify the test case. Rename the temp.


Repository:
  rC Clang

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63636/new/

https://reviews.llvm.org/D63636

Files:
  lib/Headers/altivec.h
  test/CodeGen/builtins-ppc-xl-xst.c

Index: test/CodeGen/builtins-ppc-xl-xst.c
===
--- test/CodeGen/builtins-ppc-xl-xst.c
+++ test/CodeGen/builtins-ppc-xl-xst.c
@@ -0,0 +1,490 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \
+// RUN:   -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \
+// RUN:   -target-feature +power8-vector -triple powerpc64le-unknown-unknown \
+// RUN:   -emit-llvm %s -o - | FileCheck %s -check-prefixes=CHECK,CHECK-P8
+#include 
+
+// CHECK-LABEL: @test1(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[__VEC_ADDR_I:%.*]] = alloca <8 x i16>, align 16
+// CHECK-NEXT:[[__OFFSET_ADDR_I1:%.*]] = alloca i64, align 8
+// CHECK-NEXT:[[__PTR_ADDR_I2:%.*]] = alloca i16*, align 8
+// CHECK-NEXT:[[__ADDR_I3:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[__OFFSET_ADDR_I:%.*]] = alloca i64, align 8
+// CHECK-NEXT:[[__PTR_ADDR_I:%.*]] = alloca i16*, align 8
+// CHECK-NEXT:[[__ADDR_I:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[C_ADDR:%.*]] = alloca <8 x i16>*, align 8
+// CHECK-NEXT:[[PTR_ADDR:%.*]] = alloca i16*, align 8
+// CHECK-NEXT:store <8 x i16>* [[C:%.*]], <8 x i16>** [[C_ADDR]], align 8
+// CHECK-NEXT:store i16* [[PTR:%.*]], i16** [[PTR_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i16*, i16** [[PTR_ADDR]], align 8
+// CHECK-NEXT:store i64 3, i64* [[__OFFSET_ADDR_I]], align 8
+// CHECK-NEXT:store i16* [[TMP0]], i16** [[__PTR_ADDR_I]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i16*, i16** [[__PTR_ADDR_I]], align 8
+// CHECK-NEXT:[[TMP2:%.*]] = bitcast i16* [[TMP1]] to i8*
+// CHECK-NEXT:[[TMP3:%.*]] = load i64, i64* [[__OFFSET_ADDR_I]], align 8
+// CHECK-NEXT:[[ADD_PTR_I:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 [[TMP3]]
+// CHECK-NEXT:store i8* [[ADD_PTR_I]], i8** [[__ADDR_I]], align 8
+// CHECK-NEXT:[[TMP4:%.*]] = load i8*, i8** [[__ADDR_I]], align 8
+// CHECK-NEXT:[[TMP5:%.*]] = bitcast i8* [[TMP4]] to <8 x i16>*
+// CHECK-NEXT:[[TMP6:%.*]] = load <8 x i16>, <8 x i16>* [[TMP5]], align 1
+// CHECK-NEXT:[[TMP7:%.*]] = load <8 x i16>*, <8 x i16>** [[C_ADDR]], align 8
+// CHECK-NEXT:store <8 x i16> [[TMP6]], <8 x i16>* [[TMP7]], align 16
+// CHECK-NEXT:[[TMP8:%.*]] = load <8 x i16>*, <8 x i16>** [[C_ADDR]], align 8
+// CHECK-NEXT:[[TMP9:%.*]] = load <8 x i16>, <8 x i16>* [[TMP8]], align 16
+// CHECK-NEXT:[[TMP10:%.*]] = load i16*, i16** [[PTR_ADDR]], align 8
+// CHECK-NEXT:store <8 x i16> [[TMP9]], <8 x i16>* [[__VEC_ADDR_I]], align 16
+// CHECK-NEXT:store i64 7, i64* [[__OFFSET_ADDR_I1]], align 8
+// CHECK-NEXT:store i16* [[TMP10]], i16** [[__PTR_ADDR_I2]], align 8
+// CHECK-NEXT:[[TMP11:%.*]] = load i16*, i16** [[__PTR_ADDR_I2]], align 8
+// CHECK-NEXT:[[TMP12:%.*]] = bitcast i16* [[TMP11]] to i8*
+// CHECK-NEXT:[[TMP13:%.*]] = load i64, i64* [[__OFFSET_ADDR_I1]], align 8
+// CHECK-NEXT:[[ADD_PTR_I4:%.*]] = getelementptr inbounds i8, i8* [[TMP12]], i64 [[TMP13]]
+// CHECK-NEXT:store i8* [[ADD_PTR_I4]], i8** [[__ADDR_I3]], align 8
+// CHECK-NEXT:[[TMP14:%.*]] = load <8 x i16>, <8 x i16>* [[__VEC_ADDR_I]], align 16
+// CHECK-NEXT:[[TMP15:%.*]] = load i8*, i8** [[__ADDR_I3]], align 8
+// CHECK-NEXT:[[TMP16:%.*]] = bitcast i8* [[TMP15]] to <8 x i16>*
+// CHECK-NEXT:store <8 x i16> [[TMP14]], <8 x i16>* [[TMP16]], align 1
+// CHECK-NEXT:ret void
+//
+void test1(vector signed short *c, signed short *ptr) {
+*c = vec_xl(3ll, ptr);
+vec_xst(*c, 7ll, ptr);
+}
+
+// CHECK-LABEL: @test2(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[__VEC_ADDR_I:%.*]] = alloca <8 x i16>, align 16
+// CHECK-NEXT:[[__OFFSET_ADDR_I1:%.*]] = alloca i64, align 8
+// CHECK-NEXT:[[__PTR_ADDR_I2:%.*]] = alloca i16*, align 8
+// CHECK-NEXT:[[__ADDR_I3:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[__OFFSET_ADDR_I:%.*]] = alloca i64, align 8
+// CHECK-NEXT:[[__PTR_ADDR_I:%.*]] = alloca i16*, align 8
+// CHECK-NEXT:[[__ADDR_I:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[C_ADDR:%.*]] = alloca <8 x i16>*, align 8
+// CHECK-NEXT:[[PTR_ADDR:%.*]] = alloca i16*, align 8
+// CHECK-NEXT:store <8 x i16>* [[C:%.*]], <8 x i16>** [[C_ADDR]], align 8
+// CHECK-NEXT:store i16* [[PTR:%.*]], i16** [[PTR_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i16*, i16** [[PTR_ADDR]], align 8
+// CHECK-NEXT:store i64 3, i64* [[__OFFSET_ADDR_I]], align 8
+//

[PATCH] D63636: [PowerPC][Altivec] Fix offsets for vec_xl and vec_xst

2019-06-22 Thread Nemanja Ivanovic via Phabricator via cfe-commits

nemanjai marked 3 inline comments as done.
nemanjai added inline comments.



Comment at: lib/Headers/altivec.h:16364
   signed short *__ptr) {
-  return *(unaligned_vec_sshort *)(__ptr + __offset);
+  signed char *Adjusted = (signed char *)__ptr + __offset;
+  return *(unaligned_vec_sshort *)((signed short *)Adjusted);

jsji wrote:
> Why we name it `Adjusted`?  Why not just `__addr`? 
Sure. I don't really have any preference with respect to the name at all.



Comment at: lib/Headers/altivec.h:16365
+  signed char *Adjusted = (signed char *)__ptr + __offset;
+  return *(unaligned_vec_sshort *)((signed short *)Adjusted);
 }

jsji wrote:
> Why we want to cast it to `(signed short *)` again? Looks like unnecessary 
> casting to me?
Argh, yup the double cast is silly. I initially did something different for 
this and just missed cleaning up these. I'll update.



Comment at: test/CodeGen/builtins-ppc-xl-xst.c:4
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx -triple 
powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx 
-target-feature +power8-vector -triple powerpc64le-unknown-unknown -emit-llvm 
%s -o - | FileCheck %s -check-prefix=CHECK-P8
+#include 

jsji wrote:
> Any difference for results without `power8-vector `, except for `test9` and 
> `test10`?
> 
> Why not split `test9` and `test10` to another file for simplicity?
I like running all of them both with and without power8-vector. I can simplify 
this by using `check-prefixes=CHECK,CHECK-P8` so that we only have one sequence 
of checks for each function.


Repository:
  rC Clang

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63636/new/

https://reviews.llvm.org/D63636



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D63640: [clang] Improve Serialization/Imporing of APValues

2019-06-22 Thread Tyker via Phabricator via cfe-commits

Tyker updated this revision to Diff 206121.
Tyker edited the summary of this revision.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63640/new/

https://reviews.llvm.org/D63640

Files:
  clang/include/clang/AST/APValue.h
  clang/include/clang/AST/ASTContext.h
  clang/include/clang/AST/ASTImporter.h
  clang/include/clang/AST/Expr.h
  clang/include/clang/Serialization/ASTReader.h
  clang/lib/AST/ASTContext.cpp
  clang/lib/AST/ASTImporter.cpp
  clang/lib/AST/Decl.cpp
  clang/lib/AST/Expr.cpp
  clang/lib/AST/TextNodeDumper.cpp
  clang/lib/Sema/SemaDecl.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTReaderStmt.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/PCH/APValue.cpp

Index: clang/test/PCH/APValue.cpp
===
--- /dev/null
+++ clang/test/PCH/APValue.cpp
@@ -0,0 +1,113 @@
+
+// RUN: %clang_cc1 -std=gnu++17 -emit-pch %s -o %t.pch
+// RUN: %clang_cc1 -std=gnu++17 -x c++ -include-pch %t.pch -ast-dump-all | FileCheck %s
+
+#ifndef EMIT
+#define EMIT
+
+namespace Integer {
+
+constexpr int Unique_Int = int(6789);
+//CHECK:  VarDecl {{.*}} Unique_Int
+//CHECK-NEXT: ConstantExpr {{.*}} 'int' 6789
+
+constexpr __uint128_t Unique_Int128 = ((__uint128_t)0x75f17d6b3588f843 << 64) | 0xb13dea7c9c324e51;
+//CHECK:  VarDecl {{.*}} Unique_Int128 
+//CHECK-NEXT: ConstantExpr {{.*}} 'unsigned __int128' 156773562844924187900898496343692168785
+
+}
+
+namespace FloatingPoint {
+
+constexpr double Unique_Double = double(567890.67890);
+//CHECK:  VarDecl {{.*}} Unique_Double
+//CHECK-NEXT: ConstantExpr {{.*}} 'double' 5.678907e+05
+
+}
+
+// FIXME: Add test for FixePoint, ComplexInt, ComplexFloat.
+// as they are C features they need to be treated differently.
+
+namespace Struct {
+
+struct B {
+  int i;
+  double d;
+};
+
+constexpr B Basic_Struct = B{1, 0.7};
+//CHECK:  VarDecl {{.*}} Basic_Struct
+//CHECK-NEXT: ConstantExpr {{.*}} 'const Struct::B' {1, 7.00e-01}
+
+struct C {
+  int i = 9;
+};
+
+struct A : B {
+  int i;
+  double d;
+  C c;
+};
+
+constexpr A Advanced_Struct = A{Basic_Struct, 1, 79.789, {}};
+//CHECK:  VarDecl {{.*}} Advanced_Struct
+//CHECK-NEXT: ConstantExpr {{.*}} 'const Struct::A' {{[{][{]}}1, 7.00e-01}, 1, 7.978900e+01, {9}}
+
+}
+
+namespace Vector {
+
+using v4si = int __attribute__((__vector_size__(16)));
+
+constexpr v4si Vector_Int = (v4si){8, 2, 3};
+//CHECK:  VarDecl {{.*}} Vector_Int
+//CHECK-NEXT: ConstantExpr {{.*}} 'Vector::v4si':'__attribute__((__vector_size__(4 * sizeof(int int' {8, 2, 3, 0}
+
+}
+
+namespace Array {
+
+constexpr int Array_Int[] = {1, 2, 3, 4, 5, 6};
+//CHECK:  VarDecl {{.*}} Array_Int
+//CHECK-NEXT: ConstantExpr {{.*}} 'const int [6]' {1, 2, 3, 4, 5, 6}
+
+struct A {
+  int i = 789;
+  double d = 67890.09876;
+};
+
+constexpr A Array2_Struct[][3] = {{{}, {-45678, 9.8}, {9}}, {{}}};
+//CHECK:  VarDecl {{.*}} Array2_Struct
+//CHECK-NEXT: ConstantExpr {{.*}} 'Array::A const [2][3]' {{[{][{]}}{789, 6.789010e+04}, {-45678, 9.80e+00}, {9, 6.789010e+04}}, {{[{][{]}}789, 6.789010e+04}, {789, 6.789010e+04}, {789, 6.789010e+04}}}
+
+using v4si = int __attribute__((__vector_size__(16)));
+
+constexpr v4si Array_Vector[] = {{1, 2, 3, 4}, {4, 5, 6, 7}};
+//CHECK:  VarDecl {{.*}} Array_Vector
+//CHECK-NEXT: ConstantExpr {{.*}} 'const Array::v4si [2]' {{[{][{]}}1, 2, 3, 4}, {4, 5, 6, 7}}
+
+}
+
+namespace Union {
+
+struct A {
+  int i = 6789;
+  float f = 987.9876;
+};
+
+union U {
+  int i;
+  A a{567890, 9876.5678f};
+};
+
+constexpr U Unique_Union1 = U{0};
+//CHECK:  VarDecl {{.*}} Unique_Union
+//CHECK-NEXT: ConstantExpr {{.*}} 'const Union::U' {.i = 0}
+
+constexpr U Unique_Union2 = U{};
+//CHECK:  VarDecl {{.*}} Unique_Union
+//CHECK-NEXT: ConstantExpr {{.*}} 'const Union::U' {.a = {567890, 9.876567e+03}}
+
+}
+
+#endif
\ No newline at end of file
Index: clang/lib/Serialization/ASTWriter.cpp
===
--- clang/lib/Serialization/ASTWriter.cpp
+++ clang/lib/Serialization/ASTWriter.cpp
@@ -5441,13 +5441,32 @@
 AddAPFloat(Value.getComplexFloatImag());
 return;
   }
-  case APValue::LValue:
   case APValue::Vector:
+push_back(Value.getVectorLength());
+for (unsigned Idx = 0; Idx < Value.getVectorLength(); Idx++)
+  AddAPValue(Value.getVectorElt(Idx));
+return;
   case APValue::Array:
+push_back(Value.getArrayInitializedElts());
+push_back(Value.getArraySize());
+for (unsigned Idx = 0; Idx < Value.getArrayInitializedElts(); Idx++)
+  AddAPValue(Value.getArrayInitializedElt(Idx));
+return;
   case APValue::Struct:
+push_back(Value.getStructNumBases());
+push_back(Value.getStructNumFields());
+for (unsigned Idx = 0; Idx < Value.getStructNumBases(); Idx++)
+  AddAPValue(Value.getStructBase(Idx));
+for (unsigned Idx = 0; Idx < Value.getStructNumFields(); Idx++)
+  AddAPValue(Value.getStructField(Idx));

[PATCH] D62883: [analyzer] Track terminator conditions on which a tracked expressions depends

r364147 - Revert "builtins: relax __iso_volatile_{load,store}32"

r364145 - MSVC visualizers for type aliases

[PATCH] D63685: [analyzer] exploded-graph-rewriter: Add support for range constraints.

[PATCH] D63684: [analyzer] exploded-graph-rewriter: NFC: Extract some code into functions.

r364140 - Fix TBAA representation for zero-sized fields and unnamed bit-fields.

[PATCH] D63636: [PowerPC][Altivec] Fix offsets for vec_xl and vec_xst

r364139 - Remove reliance on toCharUnitsFromBits rounding down.

r364138 - Natural MSVC visualization of constructors

r364137 - builtins: relax __iso_volatile_{load,store}32

[PATCH] D63636: [PowerPC][Altivec] Fix offsets for vec_xl and vec_xst

[PATCH] D63636: [PowerPC][Altivec] Fix offsets for vec_xl and vec_xst

[PATCH] D63640: [clang] Improve Serialization/Imporing of APValues

13 matches

Site Navigation

Mail list logo

Footer information