[PATCH] D64739: [SVE][Inline-Asm] Add support to clang for SVE inline assembly

kmclaughlin created this revision. kmclaughlin added reviewers: erichkeane, sdesmalen, cfe-commits. Herald added subscribers: psnobl, rkruppe, tschuett, javed.absar. Herald added a reviewer: rengolin. Herald added a project: clang. Adds the SVE vector and predicate registers to the list of known

[PATCH] D66302: [SVE][Inline-Asm] Support for SVE asm operands

kmclaughlin created this revision. kmclaughlin added reviewers: t.p.northover, sdesmalen, rovka, momchil.velikov. Herald added subscribers: psnobl, rkruppe, tschuett, javed.absar. Herald added a reviewer: rengolin. Herald added a project: LLVM. Adds the following inline asm constraints for SVE:

[PATCH] D66302: [SVE][Inline-Asm] Support for SVE asm operands

kmclaughlin updated this revision to Diff 216574. kmclaughlin added a comment. - Changed printAsmRegInClass in AArch64AsmPrinter.cpp to accept //unsigned AltName// instead of //bool isVector// - Added a comment to explain the test in aarch64-sve-asm-negative.ll CHANGES SINCE LAST ACTION

[PATCH] D66302: [SVE][Inline-Asm] Support for SVE asm operands

kmclaughlin updated this revision to Diff 216178. kmclaughlin added a comment. - Added a new test file, aarch64-sve-asm-negative.ll - Updated description of the 'y' constraint in LangRef.rst CHANGES SINCE LAST ACTION https://reviews.llvm.org/D66302/new/ https://reviews.llvm.org/D66302

[PATCH] D66524: [SVE][Inline-Asm] Add constraints for SVE predicate registers

kmclaughlin updated this revision to Diff 218071. kmclaughlin added a comment. - Added isPredicateConstraint function to AArch64ISelLowering.cpp, which returns Upl, Upa or Invalid. This is used to replace some repeated checks of the predicate type - Minor changes to InlineAsm.cpp CHANGES

[PATCH] D67095: [SVE][Inline-Asm] Fix -Wimplicit-fallthrough in AArch64ISelLowering.cpp

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, rovka, cameron.mcinally, greened, gribozavr, ruiu. Herald added subscribers: psnobl, rkruppe, kristof.beyls, tschuett, javed.absar. Herald added a project: LLVM. Adds break to 'x' case in getRegForInlineAsmConstraint

[PATCH] D67095: [SVE][Inline-Asm] Fix -Wimplicit-fallthrough in AArch64ISelLowering.cpp

This revision was automatically updated to reflect the committed changes. Closed by commit rL370769: [SVE][Inline-Asm] Fix -Wimplicit-fallthrough in AArch64ISelLowering.cpp (authored by kmclaughlin, committed by ). Changed prior to commit: https://reviews.llvm.org/D67095?vs=218443=218463#toc

[PATCH] D66302: [SVE][Inline-Asm] Support for SVE asm operands

kmclaughlin marked an inline comment as done. kmclaughlin added a subscriber: ruiu. kmclaughlin added a comment. Thank you to @gribozavr & @ruiu for spotting the warning caused by this patch, and the suggestions to use -Wimplicit-fallthrough! Comment at:

[PATCH] D66524: [SVE][Inline-Asm] Add constraints for SVE predicate registers

kmclaughlin created this revision. kmclaughlin added reviewers: t.p.northover, sdesmalen, rovka, momchil.velikov, cameron.mcinally, greened. Herald added subscribers: psnobl, rkruppe, tschuett, javed.absar. Herald added a reviewer: rengolin. Herald added a project: LLVM. kmclaughlin added a

[PATCH] D66302: [SVE][Inline-Asm] Support for SVE asm operands

This revision was automatically updated to reflect the committed changes. Closed by commit rL370673: [SVE][Inline-Asm] Support for SVE asm operands (authored by kmclaughlin, committed by ). Changed prior to commit: https://reviews.llvm.org/D66302?vs=216655=218376#toc Repository: rL LLVM

[PATCH] D66302: [SVE][Inline-Asm] Support for SVE asm operands

kmclaughlin updated this revision to Diff 216655. kmclaughlin added a comment. - Removed a confusing comment from AArch64AsmPrinter.cpp CHANGES SINCE LAST ACTION https://reviews.llvm.org/D66302/new/ https://reviews.llvm.org/D66302 Files: docs/LangRef.rst

[PATCH] D67550: [AArch64][SVE] Implement unpack intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, SjoerdMeijer, greened. Herald added subscribers: psnobl, rkruppe, kristof.beyls, tschuett. Herald added a reviewer: rengolin. kmclaughlin added a parent revision: D67549: [IntrinsicEmitter] Add overloaded types for SVE

[PATCH] D67549: [IntrinsicEmitter] Add overloaded types for SVE intrinsics (Subdivide2 & Subdivide4)

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, SjoerdMeijer, greened. Herald added subscribers: jdoerfert, tschuett. Herald added a project: LLVM. Both match the type of another intrinsic parameter of a vector type, but where each element is subdivided to form a

[PATCH] D67551: [AArch64][SVE] Implement sdot and udot (lane) intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, SjoerdMeijer, greened. Herald added subscribers: psnobl, rkruppe, kristof.beyls, tschuett. Herald added a reviewer: rengolin. kmclaughlin added a parent revision: D67549: [IntrinsicEmitter] Add overloaded types for SVE

[PATCH] D66524: [SVE][Inline-Asm] Add constraints for SVE predicate registers

kmclaughlin updated this revision to Diff 219526. kmclaughlin added a comment. - Renamed the //isPredicateConstraint// function to //parsePredicateConstraint// - Added more thorough checks to the tests in aarch64-sve-asm.ll CHANGES SINCE LAST ACTION https://reviews.llvm.org/D66524/new/

[PATCH] D66524: [SVE][Inline-Asm] Add constraints for SVE predicate registers

kmclaughlin marked 3 inline comments as done. kmclaughlin added inline comments. Comment at: docs/LangRef.rst:3818 +- ``Upl``: One of the low eight SVE predicate registers (P0 to P7) +- ``Upa``: Any of the SVE predicate registers (P0 to P15) greened wrote: >

[PATCH] D66524: [SVE][Inline-Asm] Add constraints for SVE predicate registers

This revision was automatically updated to reflect the committed changes. Closed by commit rL371967: [SVE][Inline-Asm] Add constraints for SVE predicate registers (authored by kmclaughlin, committed by ). Changed prior to commit: https://reviews.llvm.org/D66524?vs=219526=220299#toc

[PATCH] D64739: [SVE][Inline-Asm] Add support to specify SVE registers in the clobber list

kmclaughlin updated this revision to Diff 211264. kmclaughlin added a comment. - Removed second test in aarch64-sve-inline-asm.c which didn't use //-emit-llvm// CHANGES SINCE LAST ACTION https://reviews.llvm.org/D64739/new/ https://reviews.llvm.org/D64739 Files:

[PATCH] D64739: [SVE][Inline-Asm] Add support to specify SVE registers in the clobber list

kmclaughlin updated this revision to Diff 210821. kmclaughlin retitled this revision from "[SVE][Inline-Asm] Add support to clang for SVE inline assembly" to "[SVE][Inline-Asm] Add support to specify SVE registers in the clobber list". kmclaughlin added a comment. - Removed typo fixes from this

[PATCH] D64739: [SVE][Inline-Asm] Add support to specify SVE registers in the clobber list

kmclaughlin updated this revision to Diff 24. kmclaughlin added a comment. - Updated test to remove unused variable 't' CHANGES SINCE LAST ACTION https://reviews.llvm.org/D64739/new/ https://reviews.llvm.org/D64739 Files: clang/lib/Basic/Targets/AArch64.cpp

[PATCH] D67549: [IntrinsicEmitter] Add overloaded types for SVE intrinsics (Subdivide2 & Subdivide4)

kmclaughlin added a comment. Thanks for reviewing this patch, @rovka and @sdesmalen! Comment at: include/llvm/IR/Intrinsics.h:130 + Kind == PtrToElt || Kind == VecElementArgument || + Kind == Subdivide2Argument || Kind == Subdivide4Argument);

[PATCH] D67549: [IntrinsicEmitter] Add overloaded types for SVE intrinsics (Subdivide2 & Subdivide4)

kmclaughlin updated this revision to Diff 220845. kmclaughlin marked 5 inline comments as done. kmclaughlin added a reviewer: rovka. kmclaughlin added a comment. - Moved getNarrowerFpElementVectorType logic into getTruncatedElementVectorType - Shared code which handles Subdivide2Argument and

[PATCH] D67549: [IntrinsicEmitter] Add overloaded types for SVE intrinsics (Subdivide2 & Subdivide4)

kmclaughlin updated this revision to Diff 220886. kmclaughlin added a comment. - Some minor changes, including removing an unnecessary break - Simplified checks of D.Kind in Function.cpp to determine if it is a Subdivide2Argument or Subdivide4Argument CHANGES SINCE LAST ACTION

[PATCH] D68023: [AArch64][SVE] Implement int_aarch64_sve_cnt intrinsic

This revision was automatically updated to reflect the committed changes. Closed by commit rL373468: [AArch64][SVE] Implement int_aarch64_sve_cnt intrinsic (authored by kmclaughlin, committed by ). Changed prior to commit: https://reviews.llvm.org/D68023?vs=222780=222814#toc Repository: rL

[PATCH] D68021: [IntrinsicEmitter] Add overloaded type VecOfBitcastsToInt for SVE intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rL373437: [IntrinsicEmitter] Add overloaded type VecOfBitcastsToInt for SVE intrinsics (authored by kmclaughlin, committed by ). Changed prior to commit:

[PATCH] D68023: [AArch64][SVE] Implement int_aarch64_sve_cnt intrinsic

kmclaughlin updated this revision to Diff 222780. kmclaughlin added a comment. - Fixes alignment of last argument to //sve_int_un_pred_arit_1// in AArch64SVEInstrInfo.td CHANGES SINCE LAST ACTION https://reviews.llvm.org/D68023/new/ https://reviews.llvm.org/D68023 Files:

[PATCH] D67830: [AArch64][SVE] Implement punpk[hi|lo] intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rL373232: [AArch64][SVE] Implement punpk[hi|lo] intrinsics (authored by kmclaughlin, committed by ). Changed prior to commit: https://reviews.llvm.org/D67830?vs=221010=222458#toc Repository: rL LLVM

[PATCH] D67549: [IntrinsicEmitter] Add overloaded types for SVE intrinsics (Subdivide2 & Subdivide4)

This revision was automatically updated to reflect the committed changes. Closed by commit rL372380: [IntrinsicEmitter] Add overloaded types for SVE intrinsics (Subdivide2 … (authored by kmclaughlin, committed by ). Changed prior to commit: https://reviews.llvm.org/D67549?vs=220886=220988#toc

[PATCH] D69378: [AArch64][SVE] Implement masked store intrinsics

kmclaughlin updated this revision to Diff 227061. kmclaughlin added a comment. - Improve CHECK lines used in sve-masked-ldst-nonext.ll & sve-masked-ldst-trunc.ll CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69378/new/ https://reviews.llvm.org/D69378 Files:

[PATCH] D69707: [AArch64][SVE] Implement additional floating-point arithmetic intrinsics

kmclaughlin updated this revision to Diff 228660. kmclaughlin added a comment. - Changed target constant to MVT::i32 in complexrotateop & complexrotateopodd definitions CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69707/new/ https://reviews.llvm.org/D69707 Files:

[PATCH] D69858: [AArch64][SVE] Implement floating-point comparison & reduction intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, huntergr, dancgr, mgudim. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a project: LLVM. Adds intrinsics for the following: - fadda & faddv - fminv, fmaxv, fminnmv & fmaxnmv -

[PATCH] D69657: [AArch64][SVE] Implement several floating-point arithmetic intrinsics

kmclaughlin updated this revision to Diff 227299. kmclaughlin added a comment. - Removed duplicate //AdvSIMD_Pred2VectorArg_Intrinsic// class after rebase CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69657/new/ https://reviews.llvm.org/D69657 Files:

[PATCH] D69567: [AArch64][SVE] Implement additional integer arithmetic intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rGe128c2086489: [AArch64][SVE] Implement additional integer arithmetic intrinsics (authored by kmclaughlin). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D69378: [AArch64][SVE] Implement masked store intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rG5c2c94648e42: [AArch64][SVE] Implement masked store intrinsics (authored by kmclaughlin). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69378/new/

[PATCH] D69657: [AArch64][SVE] Implement several floating-point arithmetic intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rG5ec34dfdf733: [AArch64][SVE] Implement several floating-point arithmetic intrinsics (authored by kmclaughlin). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D69707: [AArch64][SVE] Implement additional floating-point arithmetic intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, huntergr, dancgr. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a project: LLVM. Adds intrinsics for the following: - ftssel - fcadd, fcmla - fmla, fmls, fnmla, fnmls - fmad,

[PATCH] D69707: [AArch64][SVE] Implement additional floating-point arithmetic intrinsics

kmclaughlin updated this revision to Diff 229129. kmclaughlin added a comment. - Rebased & removed unused //llvm.aarch64.sve.fcmla.lane.nxv2f64// from sve-intrinsics-fp-arith.ll CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69707/new/ https://reviews.llvm.org/D69707 Files:

[PATCH] D70180: [AArch64][SVE] Implement floating-point conversion intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: huntergr, sdesmalen, dancgr, mgudim. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a project: LLVM. Adds intrinsics for the following: - fcvt - fcvtzs & fcvtzu - scvtf & ucvtf - fcvtlt,

[PATCH] D69858: [AArch64][SVE] Implement floating-point comparison & reduction intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rGf9dd03b135d7: [AArch64][SVE] Implement floating-point comparison reduction intrinsics (authored by kmclaughlin). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D70253: [AArch64][SVE2] Implement remaining SVE2 floating-point intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: huntergr, sdesmalen, dancgr. Herald added subscribers: hiraditya, kristof.beyls, tschuett. Herald added a project: LLVM. Adds the following intrinsics: - faddp - fmaxp, fminp, fmaxnmp & fminnmp - fmlalb, fmlalt, fmlslb & fmlslt -

[PATCH] D69800: [AArch64][SVE] Implement remaining floating-point arithmetic intrinsics

kmclaughlin marked an inline comment as done. kmclaughlin added inline comments. Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith.ll:767 ; -; FSCALE +; FNEG ; sdesmalen wrote: > Why are you moving this test and changing fscale -> fneg here? The

[PATCH] D71000: [AArch64][SVE] Implement intrinsics for non-temporal loads & stores

kmclaughlin updated this revision to Diff 232072. kmclaughlin edited the summary of this revision. kmclaughlin added a comment. - Removed AArch64 specific ISDNodes for MLOAD & MSTORE CHANGES SINCE LAST ACTION https://reviews.llvm.org/D71000/new/ https://reviews.llvm.org/D71000 Files:

[PATCH] D71000: [AArch64][SVE] Implement intrinsics for non-temporal loads & stores

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, paulwalker-arm, dancgr, mgudim, efriedma. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: LLVM. Adds the following intrinsics: -

[PATCH] D70437: [AArch64][SVE] Implement shift intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rG7483eb656fd2: [AArch64][SVE] Implement shift intrinsics (authored by kmclaughlin). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70437/new/

[PATCH] D70253: [AArch64][SVE2] Implement remaining SVE2 floating-point intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rG8881ac9c3986: [AArch64][SVE2] Implement remaining SVE2 floating-point intrinsics (authored by kmclaughlin). Changed prior to commit: https://reviews.llvm.org/D70253?vs=229341=231886#toc Repository:

[PATCH] D71000: [AArch64][SVE] Implement intrinsics for non-temporal loads & stores

kmclaughlin updated this revision to Diff 232870. kmclaughlin added a comment. - Set 'Size' to MemoryLocation::UnknownSize for scalable vectors in getMemIntrinsicNode - Ensure MLOAD zeroes inactive lanes by using a zero value for the PassThru in getMaskedLoad CHANGES SINCE LAST ACTION

[PATCH] D71000: [AArch64][SVE] Implement intrinsics for non-temporal loads & stores

kmclaughlin marked 2 inline comments as done. kmclaughlin added inline comments. Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:6587 + else if (!Size) +Size = MemVT.getStoreSize().getKnownMinSize(); efriedma wrote: > In order for alias

[PATCH] D71000: [AArch64][SVE] Implement intrinsics for non-temporal loads & stores

This revision was automatically updated to reflect the committed changes. Closed by commit rG3f5bf35f868d: [AArch64][SVE] Implement intrinsics for non-temporal loads stores (authored by kmclaughlin). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D71000: [AArch64][SVE] Implement intrinsics for non-temporal loads & stores

kmclaughlin updated this revision to Diff 233298. kmclaughlin marked an inline comment as done. kmclaughlin added a comment. - Changed 'Offset' value used by getMaskedLoad & getMaskedStore to scalar type CHANGES SINCE LAST ACTION https://reviews.llvm.org/D71000/new/

[PATCH] D71556: [AArch64][SVE] Implement intrinsic for non-faulting loads

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, paulwalker-arm, efriedma, dancgr, mgudim. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: LLVM. Adds the llvm.aarch64.sve.ldnf1

[PATCH] D69378: [AArch64][SVE] Implement masked store intrinsics

kmclaughlin updated this revision to Diff 226640. kmclaughlin added a reviewer: sdesmalen. kmclaughlin added a comment. - Split functions in sve-masked-ldst-nonext.ll into separate load & store tests CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69378/new/

[PATCH] D68877: [AArch64][SVE] Implement masked load intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rGda720a38b9f2: [AArch64][SVE] Implement masked load intrinsics (authored by kmclaughlin). Changed prior to commit: https://reviews.llvm.org/D68877?vs=226123=226628#toc Repository: rG LLVM Github

[PATCH] D67550: [AArch64][SVE] Implement unpack intrinsics

This revision was automatically updated to reflect the committed changes. kmclaughlin marked an inline comment as done. Closed by commit rG0c7cc383e5b8: [AArch64][SVE] Implement unpack intrinsics (authored by kmclaughlin). Herald added a subscriber: hiraditya. Herald added a project: LLVM.

[PATCH] D68877: [AArch64][SVE] Implement masked load intrinsics

kmclaughlin updated this revision to Diff 225900. kmclaughlin edited the summary of this revision. kmclaughlin added a comment. - Rebased patch, removed extra sext & zext combine from DAGCombine which are no longer necessary - Added isVectorLoadExtDesirable to AArch64ISelLowering - Added more

[PATCH] D68877: [AArch64][SVE] Implement masked load intrinsics

kmclaughlin marked 4 inline comments as done. kmclaughlin added a comment. Thanks for reviewing this, @dmgreen! I have updated the patch to make use of the changes to DAGCombine introduced by D68337 . Comment at:

[PATCH] D69378: [AArch64][SVE] Implement masked store intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: huntergr, greened, dmgreen, rovka. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a project: LLVM. Adds support for codegen of masked stores, with non-truncating and truncating variants.

[PATCH] D69378: [AArch64][SVE] Implement masked store intrinsics

kmclaughlin updated this revision to Diff 226885. kmclaughlin added a comment. - Removed masked load tests from sve-masked-ldst-trunc.ll CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69378/new/ https://reviews.llvm.org/D69378 Files: llvm/lib/Target/AArch64/AArch64InstrInfo.td

[PATCH] D69567: [AArch64][SVE] Implement additional integer arithmetic intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: huntergr, sdesmalen. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a project: LLVM. Add intrinsics for the following: - sxt[b|h|w] & uxt[b|h|w] - cls & clz - not & cnot Repository:

[PATCH] D68877: [AArch64][SVE] Implement masked load intrinsics

kmclaughlin updated this revision to Diff 226123. kmclaughlin added a comment. - Removed unnecessary pseudo from SVEInstrFormats.td CHANGES SINCE LAST ACTION https://reviews.llvm.org/D68877/new/ https://reviews.llvm.org/D68877 Files: llvm/include/llvm/CodeGen/SelectionDAG.h

[PATCH] D68877: [AArch64][SVE] Implement masked load intrinsics

kmclaughlin marked an inline comment as done. kmclaughlin added a comment. In D68877#1717820 , @dmgreen wrote: > I'm not sure if there is support yet for vector selects in the SVE codegen? There is not yet support for vector selects, so for this patch

[PATCH] D70437: [AArch64][SVE] Implement shift intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: huntergr, sdesmalen, dancgr, mgudim. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: LLVM. Adds the following intrinsics: - asr & asrd - insr

[PATCH] D70180: [AArch64][SVE] Implement floating-point conversion intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rG4a649ad21aa2: [AArch64][SVE] Implement floating-point conversion intrinsics (authored by kmclaughlin). Changed prior to commit: https://reviews.llvm.org/D70180?vs=229085=231032#toc Repository: rG

[PATCH] D70253: [AArch64][SVE2] Implement remaining SVE2 floating-point intrinsics

kmclaughlin added inline comments. Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:898 + llvm_i32_ty], +[IntrNoMem]>; + sdesmalen wrote: > I'd expect the `llvm_i32_ty` to be an immediate for these instructions, > right? If

[PATCH] D70253: [AArch64][SVE2] Implement remaining SVE2 floating-point intrinsics

kmclaughlin added inline comments. Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:898 + llvm_i32_ty], +[IntrNoMem]>; + sdesmalen wrote: > efriedma wrote: > > kmclaughlin wrote: > > > sdesmalen wrote: > > > > I'd expect the

[PATCH] D70437: [AArch64][SVE] Implement shift intrinsics

kmclaughlin updated this revision to Diff 231663. kmclaughlin added a comment. - Rebased & enclosed additional //setOperationAction// calls within check for //Subtarget->isSVE()// CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70437/new/ https://reviews.llvm.org/D70437 Files:

[PATCH] D70437: [AArch64][SVE] Implement shift intrinsics

kmclaughlin updated this revision to Diff 231693. kmclaughlin added a comment. - Removed re-ordering of integer arithmetic & logical op intrinsic definitions in IntrinsicsAArch64.td CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70437/new/ https://reviews.llvm.org/D70437 Files:

[PATCH] D69657: [AArch64][SVE] Implement several floating-point arithmetic intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: huntergr, sdesmalen, dancgr. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a project: LLVM. Adds intrinsics for the following: - fabd, fadd, fsub & fsubr - fmul, fmulx, fdiv & fdivr -

[PATCH] D69800: [AArch64][SVE] Implement remaining floating-point arithmetic intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: huntergr, sdesmalen, dancgr, mgudim. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a project: LLVM. Adds intrinsics for the following: - fabs & fneg - fexpa - frint[a|i|m|n|p|x|z] -

[PATCH] D69707: [AArch64][SVE] Implement additional floating-point arithmetic intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rGf7848fd8f7b5: [AArch64][SVE] Implement additional floating-point arithmetic intrinsics (authored by kmclaughlin). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D69800: [AArch64][SVE] Implement remaining floating-point arithmetic intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rGcd83d9ff5c90: [AArch64][SVE] Implement remaining floating-point arithmetic intrinsics (authored by kmclaughlin). Changed prior to commit: https://reviews.llvm.org/D69800?vs=227688=229276#toc

[PATCH] D67830: [AArch64][SVE] Implement punpk[hi|lo] intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, rovka. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: LLVM. Adds the following two intrinsics: - int_aarch64_sve_punpkhi -

[PATCH] D68021: [IntrinsicEmitter] Add overloaded type VecOfBitcastsToInt for SVE intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: c-rhodes, sdesmalen, rovka. Herald added subscribers: jdoerfert, hiraditya, tschuett. Herald added a project: LLVM. This allows intrinsics such as the following to be defined: - declare @llvm.something.nxv4f32(, , ) ...where is

[PATCH] D68023: [AArch64][SVE] Implement int_aarch64_sve_cnt intrinsic

kmclaughlin created this revision. kmclaughlin added reviewers: c-rhodes, sdesmalen, rovka. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a project: LLVM. kmclaughlin added a parent revision: D68021: [IntrinsicEmitter] Add overloaded type

[PATCH] D67551: [AArch64][SVE] Implement sdot and udot (lane) intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rGee0a0a34646f: [AArch64][SVE] Implement sdot and udot (lane) intrinsics (authored by kmclaughlin). Herald added a subscriber: hiraditya. Herald added a project: LLVM. Changed prior to commit:

[PATCH] D68877: [AArch64][SVE] Implement masked load intrinsics

kmclaughlin created this revision. kmclaughlin added reviewers: huntergr, rovka, greened. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a project: LLVM. kmclaughlin added a parent revision: D47775: [AArch64][SVE] Add SPLAT_VECTOR ISD Node. Adds

[PATCH] D67550: [AArch64][SVE] Implement unpack intrinsics

kmclaughlin marked 2 inline comments as done. kmclaughlin added inline comments. Comment at: lib/Target/AArch64/SVEInstrFormats.td:836 class sve_int_perm_unpk sz16_64, bits<2> opc, string asm, -ZPRRegOp zprty1, ZPRRegOp zprty2> +

[PATCH] D67550: [AArch64][SVE] Implement unpack intrinsics

kmclaughlin updated this revision to Diff 224558. kmclaughlin added a comment. Removed unused //SDPatternOperator op// from sve_int_perm_unpk class CHANGES SINCE LAST ACTION https://reviews.llvm.org/D67550/new/ https://reviews.llvm.org/D67550 Files: include/llvm/IR/IntrinsicsAArch64.td

[PATCH] D71698: [AArch64][SVE] Add intrinsic for non-faulting loads

kmclaughlin added inline comments. Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:5333 + // We need a layer of indirection because early machine code passes balk at + // physical register (i.e. FFR) uses that have no previous definition. + let hasSideEffects = 1,

[PATCH] D71556: [AArch64][SVE] Implement intrinsic for non-faulting loads

kmclaughlin planned changes to this revision. kmclaughlin added a comment. Thanks for the feedback on this patch, @efriedma & @sdesmalen! I think there is still value in adding a NonFaulting flag to MachineMemOperand so that we can benefit from legalisation, but as this is not a requirement for

[PATCH] D71698: [AArch64][SVE] Add intrinsic for non-faulting loads

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, efriedma, andwar, dancgr, mgudim. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: LLVM. This patch adds the llvm.aarch64.sve.ldnf1

[PATCH] D73903: [AArch64][SVE] Add remaining SVE2 intrinsics for widening DSP operations

kmclaughlin updated this revision to Diff 244367. kmclaughlin added a comment. - Rebased & moved new intrinsics under the existing headers in IntrinsicsAArch64.td CHANGES SINCE LAST ACTION https://reviews.llvm.org/D73903/new/ https://reviews.llvm.org/D73903 Files:

[PATCH] D74222: [AArch64][SVE] Add mul/mla/mls lane & dup intrinsics

This revision was automatically updated to reflect the committed changes. Closed by commit rG671cbc1fbba0: [AArch64][SVE] Add mul/mla/mls lane dup intrinsics (authored by kmclaughlin). Changed prior to commit: https://reviews.llvm.org/D74222?vs=243164=244372#toc Repository: rG LLVM Github

[PATCH] D74550: [AArch64][SVE] Add SVE index intrinsic

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, andwar, efriedma, dancgr, cameron.mcinally. Herald added subscribers: psnobl, arphaman, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: LLVM. Implements the

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

kmclaughlin updated this revision to Diff 246487. kmclaughlin added a comment. Addressed review comments: - Removed SelectTableSVE2 from AArch64ISelDAGToDAG.cpp and added tablegen patterns for the tbl2 intrinsic - Updated tests to use operands that are not consecutive to ensure that the result

[PATCH] D75160: [AArch64][SVE] Add SVE2 intrinsic for xar

kmclaughlin created this revision. kmclaughlin added reviewers: andwar, c-rhodes, dancgr, efriedma. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: LLVM. Implements the @llvm.aarch64.sve.xar intrinsic

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

kmclaughlin added a comment. Thanks for reviewing this, @sdesmalen & @efriedma! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D74912/new/ https://reviews.llvm.org/D74912 ___ cfe-commits mailing list

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

This revision was automatically updated to reflect the committed changes. Closed by commit rG9c859fc54d92: [AArch64][SVE] Add SVE2 intrinsics for bit permutation table lookup (authored by kmclaughlin). Changed prior to commit: https://reviews.llvm.org/D74912?vs=246487=246661#toc Repository:

[PATCH] D73097: [AArch64][SVE] Add intrinsics for FFR manipulation

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, efriedma, dancgr. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: LLVM. Implements the following intrinsics: -

[PATCH] D73025: [AArch64][SVE] Add first-faulting load intrinsic

kmclaughlin updated this revision to Diff 239303. kmclaughlin added a comment. - Rebased patch after changes made to parent revision CHANGES SINCE LAST ACTION https://reviews.llvm.org/D73025/new/ https://reviews.llvm.org/D73025 Files: llvm/include/llvm/IR/IntrinsicsAArch64.td

[PATCH] D75160: [AArch64][SVE] Add SVE2 intrinsic for xar

This revision was automatically updated to reflect the committed changes. Closed by commit rGf5502c7035a9: [AArch64][SVE] Add SVE2 intrinsic for xar (authored by kmclaughlin). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75160/new/

[PATCH] D74833: [AArch64][SVE] Add intrinsics for SVE2 cryptographic instructions

This revision was automatically updated to reflect the committed changes. Closed by commit rGf2ff153401fa: [AArch64][SVE] Add intrinsics for SVE2 cryptographic instructions (authored by kmclaughlin). Changed prior to commit: https://reviews.llvm.org/D74833?vs=245393=246171#toc Repository:

[PATCH] D74734: [AArch64][SVE] Add the SVE dupq_lane intrinsic

This revision was automatically updated to reflect the committed changes. kmclaughlin marked an inline comment as done. Closed by commit rGf87f23c81cae: [AArch64][SVE] Add the SVE dupq_lane intrinsic (authored by kmclaughlin). Changed prior to commit:

[PATCH] D74734: [AArch64][SVE] Add the SVE dupq_lane intrinsic

kmclaughlin marked 4 inline comments as done. kmclaughlin added a comment. Thanks for taking a look at this, @sdesmalen! Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7496 + auto CIdx = dyn_cast(Idx128); + if (CIdx && (CIdx->getZExtValue() <= 3)) { +auto CI

[PATCH] D73097: [AArch64][SVE] Add intrinsics for FFR manipulation

kmclaughlin added a comment. Thanks for your input on this @efriedma, I will submit this patch for now and we will revisit the modelling of the FFR as also discussed in D71698 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D73347: [AArch64][SVE] Add SVE2 intrinsics for pairwise arithmetic

kmclaughlin created this revision. kmclaughlin added reviewers: dancgr, efriedma, sdesmalen, c-rhodes. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a project: LLVM. Implements the following intrinsics: - addp - smaxp, sminp, umaxp & uminp - sadalp &

[PATCH] D73097: [AArch64][SVE] Add intrinsics for FFR manipulation

This revision was automatically updated to reflect the committed changes. Closed by commit rG4c4861b577cb: [AArch64][SVE] Add intrinsics for FFR manipulation (authored by kmclaughlin). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D73097/new/

[PATCH] D73025: [AArch64][SVE] Add first-faulting load intrinsic

This revision was automatically updated to reflect the committed changes. Closed by commit rGaa0f37e14a87: [AArch64][SVE] Add first-faulting load intrinsic (authored by kmclaughlin). Changed prior to commit: https://reviews.llvm.org/D73025?vs=239303=239849#toc Repository: rG LLVM Github

[PATCH] D73493: [AArch64][SVE] Add SVE2 intrinsics for uniform DSP operations

This revision was automatically updated to reflect the committed changes. Closed by commit rG3cf80822a906: [AArch64][SVE] Add SVE2 intrinsics for uniform DSP operations (authored by kmclaughlin). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D73493: [AArch64][SVE] Add SVE2 intrinsics for uniform DSP operations

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, efriedma, dancgr, cameron.mcinally. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a project: LLVM. Implements the following intrinsics: - sqrdmlah, sqrdmlsh, sqrdmulh &

[PATCH] D73636: [AArch64][SVE] SVE2 intrinsics for complex integer arithmetic

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, dancgr, efriedma, cameron.mcinally, c-rhodes. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: LLVM. Adds the following SVE2

  1   2   3   >