[PATCH] D48044: [Power9] Update fp128 as a valid homogenous aggregate base type

lei created this revision. lei added reviewers: hfinkel, kbarton, nemanjai, power-llvm-team. Update clang to treat fp128 as a valid base type for homogeneous aggregate passing and returning. https://reviews.llvm.org/D48044 Files: include/clang/AST/Type.h lib/CodeGen/TargetInfo.cpp

[PATCH] D48044: [Power9] Update fp128 as a valid homogenous aggregate base type

lei updated this revision to Diff 150821. https://reviews.llvm.org/D48044 Files: include/clang/AST/Type.h lib/CodeGen/TargetInfo.cpp test/CodeGen/ppc64le-f128Aggregates.c Index: test/CodeGen/ppc64le-f128Aggregates.c === ---

[PATCH] D48044: [Power9] Update fp128 as a valid homogenous aggregate base type

This revision was automatically updated to reflect the committed changes. Closed by commit rL336308: [Power9] Update fp128 as a valid homogenous aggregate base type (authored by lei, committed by ). Herald added a subscriber: llvm-commits. Changed prior to commit:

[PATCH] D78308: [NFC][PowerPC] Refactor ppcUserFeaturesCheck()

lei marked an inline comment as done. lei added inline comments. Comment at: clang/lib/Basic/Targets/PPC.cpp:243 + bool Passed = CheckVSXSubfeature("+power8-vector", "-mpower8-vector"); + Passed |= CheckVSXSubfeature("+direct-move", "-mdirect-move"); + Passed |=

[PATCH] D78308: [NFC][PowerPC] Refactor ppcUserFeaturesCheck()

lei updated this revision to Diff 258375. lei added a comment. Address review comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D78308/new/ https://reviews.llvm.org/D78308 Files: clang/lib/Basic/Targets/PPC.cpp

[PATCH] D78308: [NFC][PowerPC] Refactor ppcUserFeaturesCheck()

lei updated this revision to Diff 258121. lei added a comment. update Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D78308/new/ https://reviews.llvm.org/D78308 Files: clang/lib/Basic/Targets/PPC.cpp Index: clang/lib/Basic/Targets/PPC.cpp

[PATCH] D78308: [NFC][PowerPC] Refactor ppcUserFeaturesCheck()

lei created this revision. lei added reviewers: nemanjai, stefanp. Herald added subscribers: shchenz, kbarton. Herald added a project: clang. This function keeps growing, refactor to use lambda. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D78308 Files:

[PATCH] D78308: [NFC][PowerPC] Refactor ppcUserFeaturesCheck()

lei updated this revision to Diff 258119. lei added a comment. Fix mistake in code Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D78308/new/ https://reviews.llvm.org/D78308 Files: clang/lib/Basic/Targets/PPC.cpp Index:

[PATCH] D78308: [NFC][PowerPC] Refactor ppcUserFeaturesCheck()

This revision was automatically updated to reflect the committed changes. lei marked an inline comment as done. Closed by commit rG10b60dde7670: [PowerPC] Refactor ppcUserFeaturesCheck() (authored by lei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D78308: [NFC][PowerPC] Refactor ppcUserFeaturesCheck()

lei updated this revision to Diff 258175. lei added a comment. updated. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D78308/new/ https://reviews.llvm.org/D78308 Files: clang/lib/Basic/Targets/PPC.cpp Index: clang/lib/Basic/Targets/PPC.cpp

[PATCH] D77542: [PowerPC] Treat 'Z' inline asm constraint as a true memory constraint

lei accepted this revision as: lei. lei added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77542/new/ https://reviews.llvm.org/D77542

[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in the front end

lei created this revision. lei added reviewers: stefanp, nemanjai, amyk, hfinkel, power-llvm-team. Herald added subscribers: shchenz, wuzish. Herald added a project: clang. jsji added a reviewer: PowerPC. jsji added a project: PowerPC. This patch simply adds support for the new CPU in

[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

lei updated this revision to Diff 264301. lei added a comment. Herald added subscribers: llvm-commits, hiraditya. Herald added a project: LLVM. Add support in llvm. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80020/new/

[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

lei updated this revision to Diff 264303. lei retitled this revision from " [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm" to "[PowerPC] Add support for -mcpu=pwr10 in both clang and llvm". lei added a comment. missed a file Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D82609: [PowerPC] Implement Vector Multiply High/Divide Extended Builtins in LLVM/Clang

lei accepted this revision as: lei. lei added a comment. This revision is now accepted and ready to land. LGTM Thx! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82609/new/ https://reviews.llvm.org/D82609

[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

lei updated this revision to Diff 266533. lei added a comment. rebased Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80020/new/ https://reviews.llvm.org/D80020 Files: clang/lib/Basic/Targets/PPC.cpp clang/lib/Basic/Targets/PPC.h Index:

[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

lei updated this revision to Diff 266548. lei added a comment. fix up rebase issue after revert Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80020/new/ https://reviews.llvm.org/D80020 Files: clang/lib/Basic/Targets/PPC.cpp

[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

This revision was automatically updated to reflect the committed changes. Closed by commit rG2368bf52cd77: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm (authored by lei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80020/new/

[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

lei added inline comments. Comment at: clang/lib/Basic/Targets/PPC.cpp:339 if (!(ArchDefs & ArchDefinePwr9) && (ArchDefs & ArchDefinePpcgr) && llvm::find(FeaturesVec, "+float128") != FeaturesVec.end()) { NeHuang wrote: > I think we also need to check

[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

lei updated this revision to Diff 266073. lei marked 7 inline comments as done. lei added a comment. address review comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80020/new/ https://reviews.llvm.org/D80020 Files:

[PATCH] D80757: [PowerPC] Add clang option -m[no-]pcrel

lei created this revision. lei added reviewers: stefanp, nemanjai, hfinkel, power-llvm-team. Herald added subscribers: shchenz, wuzish. Herald added a project: clang. Add user-facing front end option to turn off pc-relative memops. This will be compatible with gcc. Repository: rG LLVM Github

[PATCH] D80757: [PowerPC] Add clang option -m[no-]pcrel

lei marked an inline comment as done. lei added inline comments. Comment at: clang/test/Driver/ppc-pcrel.cpp:1 +// RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -mcpu=pwr10 -mpcrel -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-PCREL %s +// RUN: %clang -target

[PATCH] D80758: [PowerPC] Add -m[no-]power10-vector clang and llvm option

lei added inline comments. Comment at: clang/lib/Basic/Targets/PPC.cpp:414 +if (Name == "power9-vector") + Features["power10-vector"] = false; Features[Name] = false; I think it would be good to change this into a switch-stmt as there are enough

[PATCH] D80757: [PowerPC] Add clang option -m[no-]pcrel

This revision was automatically updated to reflect the committed changes. Closed by commit rG7cfded350a7e: [PowerPC] Add clang option -m[no-]pcrel (authored by lei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80757/new/

[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

This revision was automatically updated to reflect the committed changes. Closed by commit rG7eb666b1556b: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm (authored by lei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80020/new/

[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

lei updated this revision to Diff 266283. lei added a comment. update as per reviewers comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80020/new/ https://reviews.llvm.org/D80020 Files: clang/lib/Basic/Targets/PPC.cpp

[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

lei updated this revision to Diff 266321. lei added a comment. change how we generate p10 feature list. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80020/new/ https://reviews.llvm.org/D80020 Files: clang/lib/Basic/Targets/PPC.cpp

[PATCH] D80758: [PowerPC] Add -m[no-]power10-vector clang and llvm option

lei accepted this revision. lei added a comment. LGTM. Minor nit can be addressed during commit. Comment at: clang/lib/Basic/Targets/PPC.cpp:413 + Features["power9-vector"] = Features["power10-vector"] = false; +if (Name == "power9-vector") +

[PATCH] D84968: [PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types

lei accepted this revision. lei added a comment. This revision is now accepted and ready to land. Just some minor comments. Please address them prior to commit. Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10519 + // 2 or 4 vsx registers. + if (VT == MVT::v256i1

[PATCH] D87804: [PowerPC][Power10] Implement Vector signed/unsigned __int128 overloads for the comparison builtins

lei added a comment. please fix the clang format issues. Comment at: llvm/include/llvm/IR/IntrinsicsPowerPC.td:365 + def int_ppc_altivec_vcmpequq : GCCBuiltin<"__builtin_altivec_vcmpequq">, + Intrinsic<[llvm_v1i128_ty], [llvm_v1i128_ty, llvm_v1i128_ty], +

[PATCH] D83722: [PowerPC] Add options to control paired vector memops support

This revision was automatically updated to reflect the committed changes. Closed by commit rG7aaa85627b59: [PowerPC] Add options to control paired vector memops support (authored by bsaleil, committed by lei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D82467: [PowerPC][Power10] Implement Truncate and Store VSX Vector Builtins

lei added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:108 + signed char *__c) { + // CHECK-BE: store i8 %{{.+}}, i8* %{{.+}}, align 1 + // CHECK-LE: store i8 %{{.+}}, i8* %{{.+}}, align 1 amyk wrote: > lei

[PATCH] D82502: [PowerPC][Power10] Implement Load VSX Vector and Sign Extend and Zero Extend

lei added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.h:487 +/// Allows utilization of the Load VSX Vector Rightmost Instructions. +LXVRZX + missing `,`? Comment at:

[PATCH] D82431: [PowerPC][Power10] Implement Test LSB by Byte Builtins in LLVM/Clang

lei added a comment. encoding tests need to be placed in corresponding `ppc64-encoding-ISA31*` files Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82431/new/ https://reviews.llvm.org/D82431 ___

[PATCH] D82774: [Power10] Implement Vector Blend Builtins in LLVM/Clang

This revision was automatically updated to reflect the committed changes. Closed by commit rGca464639a1c9: [PowerPC] Implement Vector Blend Builtins in LLVM/Clang (authored by biplmish, committed by lei). Herald added a project: clang. Herald added a subscriber: cfe-commits. Changed prior to

[PATCH] D82869: [Power10] Implement Vector Permute Extended Builtins in LLVM/Clang

This revision was automatically updated to reflect the committed changes. Closed by commit rG286073484f7d: [PowerPC]Implement Vector Permute Extended Builtin (authored by biplmish, committed by lei). Herald added a project: clang. Herald added a subscriber: cfe-commits. Changed prior to commit:

[PATCH] D83364: [PowerPC][Power10] Implement Instruction definition and MC Tests for Load and Store VSX Vector with Zero or Sign Extend

lei added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:431 +let mayLoad = 1, mayStore = 0, Predicates = [IsISA3_1] in { + // The XFormMemOp flag is set on the instruction format. Instead of creating a new section like this, why not

[PATCH] D82609: [PowerPC][Power10] Implement Vector Multiply High/Divide Extended Builtins in LLVM/Clang

lei added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:79 +vector signed int test_vec_dive_si(void) { + // CHECK: @llvm.ppc.altivec.vdivesw(<4 x i32> + // CHECK-NEXT: ret <4 x i32> why does the ck stops matching at the first param?

[PATCH] D83364: [PowerPC][Power10] Implement Instruction definition and MC Tests for Load and Store VSX Vector with Zero or Sign Extend

lei accepted this revision. lei added a comment. LGTM thx. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83364/new/ https://reviews.llvm.org/D83364 ___ cfe-commits mailing list

[PATCH] D83500: [PowerPC][Power10] Implement custom codegen for the vec_replace_elt and vec_replace_unaligned builtins.

lei added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:14273 +// The third argument to vec_replace_elt will be emitted to either +// the vinsw or vinsd instruction. It must be a compile time constant. +ConstantInt *ArgCI = dyn_cast(Ops[2]);

[PATCH] D82365: [Power10] Implement Vector Insert Builtins in LLVM/Clang

lei added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:12 +// RUN: -target-cpu pwr10 -triple powerpc64le-unknown-unknown -emit-llvm %s \ +// RUN: -o - | FileCheck %s -check-prefix=CHECK-LE + I just noticed this. There is no need

[PATCH] D82365: [Power10] Implement Vector Insert Builtins in LLVM/Clang

This revision was automatically updated to reflect the committed changes. Closed by commit rG0939e04e4176: [PowerPC] Implement Vector Insert Builtins in LLVM/Clang (authored by biplmish, committed by lei). Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG

[PATCH] D82520: [Power10] Implement Vector Splat Immediate Builtins in LLVM/Clang

This revision was not accepted when it landed; it landed in state "Needs Revision". This revision was automatically updated to reflect the committed changes. Closed by commit rG0c6b6e28e70c: [PowerPC] Implement Vector Splat Immediate Builtins in Clang (authored by biplmish, committed by lei).

[PATCH] D82502: [PowerPC][Power10] Implement Load VSX Vector and Sign Extend and Zero Extend

lei added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:13791 + // Ensure that the load from the narrow width is being zero extended to i128. + if ((!ValidLDType) || (LD->getValueType(0) != MVT::i128) || + (LD->getExtensionType() !=

[PATCH] D83516: [PowerPC][Power10] 128-bit Binary Integer Operation instruction definitions and MC Tests

lei accepted this revision. lei added a comment. This revision is now accepted and ready to land. LGTM Please address the nits on commit. Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:1022 + def XSCVUQQP : X_VT5_XO5_VB5<63, 3, 836, "xscvuqqp", []>; + def XSCVSQQP:

[PATCH] D82502: [PowerPC][Power10] Implement Load VSX Vector and Sign Extend and Zero Extend

lei added a comment. Please move encoding tests to `ppc64-encoding-ISA31.[txt|s]`. Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:13792 + if ((LD->getValueType(0) != MVT::i128) || + (LD->getExtensionType() != ISD::ZEXTLOAD) || (!ValidLDType)) +return

[PATCH] D82440: [Power10] Implement Vector Shift Double Bit Immediate Builtins in LLVM/Clang

This revision was automatically updated to reflect the committed changes. Closed by commit rG88874f074644: [PowerPC]Implement Vector Shift Double Bit Immediate Builtins (authored by biplmish, committed by lei). Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository:

[PATCH] D82467: [PowerPC][Power10] Implement Truncate and Store VSX Vector Builtins

lei requested changes to this revision. lei added a comment. This revision now requires changes to proceed. Please move encoding tests to ppc64-encoding-ISA31.[txt|s]. Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:108 + signed char *__c) { +

[PATCH] D82431: [PowerPC][Power10] Implement Test LSB by Byte Builtins in LLVM/Clang

lei accepted this revision. lei added a comment. LGTM thx! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82431/new/ https://reviews.llvm.org/D82431 ___ cfe-commits mailing list

[PATCH] D82365: [Power10] Implement Vector Insert Builtins in LLVM/Clang

lei added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:12 +// RUN: -target-cpu pwr10 -triple powerpc64le-unknown-unknown -emit-llvm %s \ +// RUN: -o - | FileCheck %s -check-prefix=CHECK-LE + biplmish wrote: > lei wrote: > > I just

[PATCH] D81774: [PowerPC][Power10] Implement VSX PCV Generate Operations in LLVM/Clang

lei accepted this revision as: lei. lei added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81774/new/ https://reviews.llvm.org/D81774

[PATCH] D80970: [PowerPC][Power10] Implement centrifuge, vector gather every nth bit, vector evaluate Builtins in LLVM/Clang

lei accepted this revision as: lei. lei added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80970/new/ https://reviews.llvm.org/D80970

[PATCH] D80935: [PowerPC][Power10] Implement Parallel Bits Deposit/Extract Builtins in LLVM/Clang

lei accepted this revision as: lei. lei added a comment. This revision is now accepted and ready to land. LGTM, just 1 minor comment/question. Comment at: llvm/lib/Target/PowerPC/PPCScheduleP9.td:47 + let UnsupportedFeatures = [HasQPX, HasSPE, PrefixInstrs, PCRelativeMemops,

[PATCH] D81707: [PowerPC][Power10] Implement Vector Clear Left/Rightmost Bytes Builtins in LLVM/Clang

lei accepted this revision as: lei. lei added a comment. This revision is now accepted and ready to land. LGTM Minor nit to be addressed during commit. Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:522 + [(set v16i8:$vD, +

[PATCH] D81816: [PowerPC] Add support for vector bool __int128 for Power10

lei added inline comments. Comment at: clang/test/Parser/p10-vector-bool-128.c:2 +// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu -target-feature +altivec -target-feature +vsx -fsyntax-only -verify %s +// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu

[PATCH] D81816: [PowerPC] Add support for vector bool __int128 for Power10

lei accepted this revision as: lei. lei added a comment. LGTM, please address the 1 comment I have on commit. Comment at: clang/test/Parser/altivec-bool-128.c:6 +// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu -target-cpu pwr10 \ +// RUN:-target-feature

[PATCH] D81836: [PowerPC][Power10] Implement Vector Permute Builtins in LLVM/Clang

lei added a comment. This is PR still valid? I see dup def in https://reviews.llvm.org/D82365. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81836/new/ https://reviews.llvm.org/D81836 ___ cfe-commits

[PATCH] D82431: [PowerPC][Power10] Implement Test LSB by Byte Builtins in LLVM/Clang

lei accepted this revision as: lei. lei added a comment. This revision is now accepted and ready to land. LGTM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82431/new/ https://reviews.llvm.org/D82431 ___ cfe-commits mailing list

[PATCH] D81816: [PowerPC] Add support for vector bool __int128 for Power10

lei requested changes to this revision. lei added inline comments. This revision now requires changes to proceed. Comment at: clang/lib/Sema/DeclSpec.cpp:1155 + // TODO: Update comment with correct Programming Interface Manual + // version once it is available.

[PATCH] D81816: [PowerPC] Add support for vector bool __int128 for Power10

lei added inline comments. Comment at: clang/lib/Sema/DeclSpec.cpp:1170 // Only 'short' and 'long long' are valid with vector bool. (PIM 2.1) if ((TypeSpecWidth != TSW_unspecified) && (TypeSpecWidth != TSW_short) && Do we not need to add a check

[PATCH] D81816: [PowerPC] Add support for vector bool __int128 for Power10

lei added inline comments. Comment at: clang/lib/Sema/DeclSpec.cpp:1155 + // TODO: Update comment with correct Programming Interface Manual + // version once it is available. __int128 has also been added + // to vector bool for Power10. saghir

[PATCH] D81816: [PowerPC] Add support for vector bool __int128 for Power10

lei added inline comments. Comment at: clang/test/Parser/altivec-bool-128.c:2 +// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu -target-feature +altivec -fsyntax-only -verify %s +// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu -target-feature +altivec

[PATCH] D82467: [PowerPC][Power10] Implement Truncate and Store VSX Vector Builtins

lei accepted this revision. lei added a comment. This revision is now accepted and ready to land. LGTM, Please add tests for BE in llvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll prior to committing. Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll:2 +; NOTE:

[PATCH] D82502: [PowerPC][Power10] Implement Load VSX Vector and Sign Extend and Zero Extend

lei added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:14166 + + SDValue LoadOps[] = {LD->getChain(), LD->getBasePtr(), DAG.getIntPtrConstant(MemoryType.getScalarSizeInBits(), dl)}; + nit: indentation. Comment at:

[PATCH] D84197: [PowerPC][Power10] 128-bit Vector String Isolate instruction definitions and MC Tests

lei added a comment. Why are you removing MC tests for here? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D84197/new/ https://reviews.llvm.org/D84197 ___ cfe-commits mailing list

[PATCH] D84382: [PowerPC][Power10] Cleanup p10vector clang test

lei accepted this revision. lei added a comment. This revision is now accepted and ready to land. LGTM thx! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D84382/new/ https://reviews.llvm.org/D84382 ___

[PATCH] D82502: [PowerPC] Implement Load VSX Vector and Sign Extend and Zero Extend

lei added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:14156 + + // This transformation is only valid if the we are loading either a byte, + // halfword, word, or doubleword. Conanap wrote: > NeHuang wrote: > > nit: if we are

[PATCH] D83338: [PowerPC][Power10] Implemented Vector Shift Builtins

lei added a comment. Please address the auto generated clang-format issues for the added code in this patch. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83338/new/ https://reviews.llvm.org/D83338

[PATCH] D82520: [Power10] Implement Vector Splat Immediate Builtins in LLVM/Clang

This revision was automatically updated to reflect the committed changes. Closed by commit rG0c6b6e28e70c: [PowerPC] Implement Vector Splat Immediate Builtins in Clang (authored by biplmish, committed by lei). Herald added a project: clang. Herald added a subscriber: cfe-commits. Changed prior

[PATCH] D90799: [PowerPC] Add paired vector load and store builtins and intrinsics

lei added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:2658 + return false; +} + There's alot of nested `if`s, would it be possible to refactor to have some early exits instead? Comment at:

[PATCH] D95634: [PowerPC][Power10] Fix XXSPLI32DX not correctly exploiting specific cases

lei accepted this revision. lei added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95634/new/ https://reviews.llvm.org/D95634 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D104125: [PowerPC] Moving defineXLCompatMacros() definition

lei accepted this revision. lei added a comment. This revision is now accepted and ready to land. LGTM Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D104125/new/ https://reviews.llvm.org/D104125

[PATCH] D102875: [PowerPC] Add PowerPC compare and multiply related builtins and instrinsics for XL compatibility

lei added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-compare-64bit-only.c:8 +// RUN: not %clang_cc1 -triple powerpc-unknown-aix \ +// RUN: -emit-llvm %s -o - -target-cpu pwr9 2>&1 | FileCheck %s -check-prefix=CHECK-32 +

[PATCH] D102875: [PowerPC] Add PowerPC compare and multiply related builtins and instrinsics for XL compatibility

lei added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-compare-64bit-only.c:6 +// RUN: %clang_cc1 -triple powerpc64-unknown-aix \ +// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s --check-prefix=CHECK-64 +// RUN: not %clang_cc1 -triple

[PATCH] D102875: [PowerPC] Add PowerPC compare and multiply related builtins and instrinsics for XL compatibility

lei added inline comments. Comment at: clang/lib/Basic/Targets/PPC.h:354 - void defineXLCompatMacros(MacroBuilder ) const { -Builder.defineMacro("__popcntb", "__builtin_ppc_popcntb"); Can you pleases rebase your patch again? The removal of this function

[PATCH] D104664: [PowerPC][NFC] Clean up builtin sema checks

This revision was automatically updated to reflect the committed changes. Closed by commit rGb259740801d3: [PowerPC][NFC] Clean up builtin sema checks (authored by lei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D104664/new/

[PATCH] D104664: [PowerPC][NFC] Clean up builtin sema checks

lei updated this revision to Diff 353515. lei added a comment. remove extra ";" Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D104664/new/ https://reviews.llvm.org/D104664 Files: clang/lib/Sema/SemaChecking.cpp Index:

[PATCH] D102191: [PowerPC] Add clang option -m[no-]prefixed

lei created this revision. lei added reviewers: stefanp, nemanjai, power-llvm-team. Herald added subscribers: dang, shchenz. lei requested review of this revision. Herald added a project: clang. Add user-facing front end option to turn off power10 prefixed instructions. Repository: rG LLVM

[PATCH] D102191: [PowerPC] Add clang option -m[no-]prefixed

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG9469ff15b779: [PowerPC] Add clang option -m[no-]prefixed (authored by lei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D105501: [PowerPC] Power ISA features for Semachecking

lei added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:3278 + StringRef DiagArg = "") { + if (!S.Context.getTargetInfo().hasFeature(FeatureToCheck)) { +if (!DiagArg.empty()) { may I suggest early exit instead?

[PATCH] D99193: [PowerPC] Add mprivileged option

lei accepted this revision. lei added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D99193/new/ https://reviews.llvm.org/D99193 ___

[PATCH] D99185: [PowerPC] Change option to mrop-protect

lei accepted this revision as: lei. lei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D99185/new/ https://reviews.llvm.org/D99185

[PATCH] D89986: [AIX] do not emit visibility attribute into IR when there is -mignore-xcoff-visibility

lei added a comment. Instead of waiting a day or two, can you please directly ping reviewers who had concerns related to the round-trip-args behaviour to get feedback? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D89986/new/

[PATCH] D108702: [PowerPC][NFC] Rename P10 builtins vec_clrl, vec_clrr to vec_clr_first and vec_clr_last

lei accepted this revision as: lei. lei added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108702/new/ https://reviews.llvm.org/D108702

[PATCH] D108302: [PowerPC] Fixed the crash due to early if conversion with fixed CR fields.

lei requested changes to this revision. lei added a comment. This revision now requires changes to proceed. I think there is something wrong with this diff cause there is no context available for `PPCInstrInfo.cpp`. Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1548 +

[PATCH] D107647: [PowerPC] MMA - Add __builtin_vsx_build_pair and __builtin_mma_build_acc builtins

lei added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:15833 + // without the need for the programmer to swap operands. + if (IsLE) { +SmallVector RevOps; doesn't look like we need the interm var `IsLE`. Just use the call

[PATCH] D109126: [PowerPC] [NFC] Add Big-Endian checks for existing MMA tests

lei added a comment. Is it really necessary to add the BE checks in this patch if they are the same as LE checks? Why not just add it later when there is a diff seen? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109126/new/

[PATCH] D109178: [PowerPC] Disable vector types when not supported by subtarget features

lei updated this revision to Diff 370349. lei added a comment. fix spelling in commit message. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109178/new/ https://reviews.llvm.org/D109178 Files: clang/include/clang/Basic/DiagnosticSemaKinds.td

[PATCH] D109178: [PowerPC] Disable vector types when not supported by subtarget features

lei created this revision. lei added reviewers: hubert.reinterpretcast, nemanjai, power-llvm-team. Herald added a subscriber: shchenz. lei requested review of this revision. Herald added a project: clang. Update clang to treat vector unsigned long long and friends as invalid for AlttiVec without

[PATCH] D108302: [PowerPC] Fixed the crash due to early if conversion with fixed CR fields.

lei accepted this revision. lei added a comment. This revision is now accepted and ready to land. LGTM Thx! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108302/new/ https://reviews.llvm.org/D108302 ___

[PATCH] D109178: [PowerPC] Disable vector types when not supported by subtarget features

lei added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-int128.c:4 +// RUN: -triple powerpc64-unknown-unknown -target-cpu pwr8 \ +// RUN: -emit-llvm %s -o - -U__XL_COMPAT_ALTIVEC__ | FileCheck %s +// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx

[PATCH] D105946: [PowerPC] Store, load, move from and to registers related builtins

lei added a comment. please add sema checking for pwr8 builtins. Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll:80 +declare i32 @llvm.ppc.lharx(i8*) +define dso_local signext i16 @test_lharx(i16* %a) local_unnamed_addr #0 { +;

[PATCH] D105930: [PowerPC] Implement XL compact math builtins

lei updated this revision to Diff 358665. lei added a comment. cleanup tests Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105930/new/ https://reviews.llvm.org/D105930 Files: clang/include/clang/Basic/BuiltinsPPC.def

[PATCH] D105930: [PowerPC] Implement XL compact math builtins

lei updated this revision to Diff 358409. lei added a comment. update tc to only check for pwr7 and up Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105930/new/ https://reviews.llvm.org/D105930 Files: clang/include/clang/Basic/BuiltinsPPC.def

[PATCH] D105930: [PowerPC] Implement XL compact math builtins

lei created this revision. lei added reviewers: stefanp, nemanjai, power-llvm-team. Herald added subscribers: shchenz, hiraditya. lei requested review of this revision. Herald added projects: clang, LLVM. Implement a subset of builtins required for compatiblilty with AIX XL compiler.

[PATCH] D105946: [PowerPC] Store, load, move from and to registers related builtins

lei added inline comments. Comment at: llvm/include/llvm/IR/IntrinsicsPowerPC.td:1569 + def int_ppc_sthcx : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrWriteMem]>; + def int_ppc_lharx : GCCBuiltin<"__builtin_ppc_lharx">, +

[PATCH] D105946: [PowerPC] Store, load, move from and to registers related builtins

lei added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:3371 +return SemaFeatureCheck(*this, TheCall, "extdiv", +diag::err_ppc_builtin_only_on_arch, "8"); #define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \ need tests

[PATCH] D107647: [PowerPC] MMA - Remove deprecated built-ins and add new built-ins

lei requested changes to this revision. lei added a comment. This revision now requires changes to proceed. Actually we should not be removing the deprecated bultins. Just need to add the new ones. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D107647: [PowerPC] MMA - Remove deprecated built-ins and add new built-ins

lei added a comment. LGTM Can we update the title and description to be more specific though? [PowerPC] MMA - Rename deprecated builtins mma_assemble_acc, vsx_assemble_pair Rename deprecated builtins : __builtin_mma_assemble_acc __builtin_vsx_assemble_pair To:

[PATCH] D107002: [PowerPC] Implement XL compatibility builtin __addex

lei updated this revision to Diff 366062. lei added a comment. Update diag id Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D107002/new/ https://reviews.llvm.org/D107002 Files: clang/include/clang/Basic/BuiltinsPPC.def

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