[PATCH] D50246: [RISCV] Add support for computing sysroot for riscv32-unknown-elf

lewis-revill updated this revision to Diff 158994. lewis-revill added a comment. Modified test which assumed the path to C++ includes was determined without use of the sysroot path. Repository: rC Clang https://reviews.llvm.org/D50246 Files: lib/Driver/ToolChains/RISCV.cpp

[PATCH] D50246: [RISCV] Add support for computing sysroot for riscv32-unknown-elf

lewis-revill created this revision. lewis-revill added reviewers: asb, simoncook, edward-jones. Herald added subscribers: cfe-commits, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, mgrang, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, apazos, johnrusso, rbar. Extends r338385

[PATCH] D46822: [RISCV] Add driver for riscv32-unknown-elf baremetal target

lewis-revill added a comment. I've submitted a patch to address Simon's issues in https://reviews.llvm.org/D50246 Repository: rC Clang https://reviews.llvm.org/D46822 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D50246: [RISCV] Add support for computing sysroot for riscv32-unknown-elf

lewis-revill added a comment. @xbolva00 In my opinion this is an issue for another revision. Personally I would choose to rename/move the other RISCV driver file to something along the lines of RISCVLinux, however I think it is best for @asb to decide since he is the code owner for the RISC-V

[PATCH] D50246: [RISCV] Add support for computing sysroot for riscv32-unknown-elf

lewis-revill updated this revision to Diff 160602. lewis-revill added a comment. Fixed this issue by adding -nostdsysteminc to the Clang target options, preventing the frontend from generating additional include paths. Repository: rC Clang https://reviews.llvm.org/D50246 Files:

[PATCH] D50246: [RISCV] Add support for computing sysroot for riscv32-unknown-elf

lewis-revill updated this revision to Diff 162179. lewis-revill added a comment. Added tests for the case where `--sysroot` is not provided. Repository: rC Clang https://reviews.llvm.org/D50246 Files: lib/Driver/ToolChains/RISCV.cpp lib/Driver/ToolChains/RISCV.h

[PATCH] D50246: [RISCV] Add support for computing sysroot for riscv32-unknown-elf

lewis-revill updated this revision to Diff 163339. lewis-revill added a comment. Rebased and ensured that -fuse-init-array is always used (as intended in https://reviews.llvm.org/D50043), since addClangTargetOptions is overidden for this patch. Repository: rC Clang

[PATCH] D50246: [RISCV] Add support for computing sysroot for riscv32-unknown-elf

lewis-revill added a comment. @asb can we get this committed? Repository: rC Clang https://reviews.llvm.org/D50246 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D54091: [RISCV] Add inline asm constraints I, J & K for RISC-V

lewis-revill created this revision. lewis-revill added a reviewer: asb. Herald added subscribers: cfe-commits, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, mgrang, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar,

[PATCH] D54091: [RISCV] Add inline asm constraints I, J & K for RISC-V

lewis-revill updated this revision to Diff 174360. lewis-revill edited the summary of this revision. lewis-revill added a comment. Updated to reflect desired changes (and fix an incorrect boundary). I didn't add r & m to riscv-inline-asm.c as I wasn't clear what exactly was desired.

[PATCH] D54295: [WIP, RISCV] Add inline asm constraint A for RISC-V

lewis-revill created this revision. lewis-revill added a reviewer: asb. Herald added subscribers: cfe-commits, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, mgrang, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar,

[PATCH] D51972: [RISCV] Explicitly set an empty --sysroot in the test

lewis-revill added a comment. Great, go ahead. https://reviews.llvm.org/D51972 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D51972: [RISCV] Explicitly set an empty --sysroot in the test

lewis-revill added a comment. @asb @kristina can we get this committed? https://reviews.llvm.org/D51972 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D51972: [RISCV] Explicitly set an empty --sysroot in the test

lewis-revill accepted this revision. lewis-revill added a comment. This revision is now accepted and ready to land. The reasoning seems sound for this testcase change. I think the behaviour of `computeSysRoot()` makes sense under this condition since it follows what the user specified, it's

[PATCH] D57055: [RISCV] Mark TLS as supported

lewis-revill updated this revision to Diff 182920. lewis-revill added a comment. Rely on default value rather than explicitly marking `TLSSupported` as true. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57055/new/ https://reviews.llvm.org/D57055 Files:

[PATCH] D57055: [RISCV] Mark TLS as supported

lewis-revill created this revision. lewis-revill added a reviewer: asb. Herald added subscribers: cfe-commits, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar. Inform

[PATCH] D54295: [WIP, RISCV] Add inline asm constraint A for RISC-V

lewis-revill updated this revision to Diff 187335. lewis-revill added a comment. Herald added subscribers: llvm-commits, jdoerfert. Herald added a project: LLVM. Correct test. Repository: rL LLVM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D54295/new/

[PATCH] D57242: [RISCV] Specify MaxAtomicInlineWidth for RISC-V

lewis-revill created this revision. lewis-revill added a reviewer: asb. Herald added subscribers: cfe-commits, jocewei, PkmX, jfb, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar. This

[PATCH] D57242: [RISCV] Specify MaxAtomicInlineWidth for RISC-V

lewis-revill abandoned this revision. lewis-revill added a comment. Herald added a project: clang. Abandoned in favour of D57450 Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57242/new/ https://reviews.llvm.org/D57242

[PATCH] D57055: [RISCV] Mark TLS as supported

lewis-revill updated this revision to Diff 185283. lewis-revill added a comment. Herald added a project: clang. Added RISC-V to thread specifier test as a means of checking TLS is supported. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57055/new/

[PATCH] D54091: [RISCV] Add inline asm constraints I, J & K for RISC-V

lewis-revill updated this revision to Diff 203367. lewis-revill edited the summary of this revision. lewis-revill added a comment. Herald added a project: LLVM. Herald added a subscriber: llvm-commits. - Rebased and fixed test run line Repository: rL LLVM CHANGES SINCE LAST ACTION

[PATCH] D54295: [RISCV] Add inline asm constraint A for RISC-V

lewis-revill updated this revision to Diff 204512. lewis-revill retitled this revision from "[WIP, RISCV] Add inline asm constraint A for RISC-V" to "[RISCV] Add inline asm constraint A for RISC-V". Herald added subscribers: Jim, benna, psnobl. Repository: rC Clang CHANGES SINCE LAST ACTION

[PATCH] D54091: [RISCV] Add inline asm constraints I, J & K for RISC-V

This revision was automatically updated to reflect the committed changes. Closed by commit rL363055: [RISCV] Add inline asm constraints I, J K for RISC-V (authored by lewis-revill, committed by ). Changed prior to commit: https://reviews.llvm.org/D54091?vs=203367=204043#toc Repository: rL

[PATCH] D57055: [RISCV] Mark TLS as supported

This revision was not accepted when it landed; it landed in state "Needs Review". This revision was automatically updated to reflect the committed changes. Closed by commit rL363776: [RISCV] Mark TLS as supported (authored by lewis-revill, committed by ). Herald added a project: LLVM. Herald

[PATCH] D54295: [RISCV] Add inline asm constraint A for RISC-V

lewis-revill updated this revision to Diff 215414. lewis-revill edited the summary of this revision. lewis-revill added a comment. Herald added subscribers: s.egerton, lenary, MaskRay. Rebased prior to commit. Repository: rC Clang CHANGES SINCE LAST ACTION

[PATCH] D54295: [RISCV] Add inline asm constraint A for RISC-V

This revision was not accepted when it landed; it landed in state "Needs Review". This revision was automatically updated to reflect the committed changes. Closed by commit rL369093: [RISCV] Add inline asm constraint A for RISC-V (authored by lewis-revill, committed by ). Changed prior to

[PATCH] D67065: [RISCV] Define __riscv_cmodel_medlow and __riscv_cmodel_medany correctly

lewis-revill accepted this revision. lewis-revill added a comment. This revision is now accepted and ready to land. Thanks Kito. This looks good to me. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D67065/new/ https://reviews.llvm.org/D67065

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill updated this revision to Diff 220677. lewis-revill added a comment. Herald added a project: clang. Herald added a subscriber: cfe-commits. Replace internal -mllvm option with target feature enabled through the clang frontend using -msave-restore. Repository: rG LLVM Github

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill marked 2 inline comments as done. lewis-revill added inline comments. Comment at: llvm/lib/Target/RISCV/RISCV.td:72 +def FeatureSaveRestore : SubtargetFeature<"save-restore", "EnableSaveRestore", + "true", "Enable

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill marked an inline comment as done. lewis-revill added a comment. In D62686#1675347 , @lenary wrote: > We discussed this in the RISC-V meeting on 19 Sept 2019. @apazos says there > are some SPEC failures in both 2006 and 2017, which would be

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill updated this revision to Diff 222612. lewis-revill added a comment. Rewrote logic to calculate stack sizes, frame indexes and frame pointer offsets. This was necessary to take into account the fact that the save/restore lib calls are essentially an opaque section of the stack that

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill planned changes to this revision. lewis-revill added a comment. It seems like the regressions I'm seeing are due to the fact that calculating offsets for fixed objects at the top of the frame didn't account for extra stack size adjustment from the libcalls. I'm trying to find a

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill updated this revision to Diff 227512. lewis-revill added a comment. Herald added a subscriber: sameer.abuasal. Rebased and merged D68644 into this patch - this patch already assumes shrink wrapping support anyway. Repository: rG LLVM Github

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill updated this revision to Diff 229485. lewis-revill added a comment. Rebased Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62686/new/ https://reviews.llvm.org/D62686 Files: clang/lib/Driver/ToolChains/Arch/RISCV.cpp

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:278 // Add CFI directives for callee-saved registers. - const std::vector = MFI.getCalleeSavedInfo(); - // Iterate over list of callee-saved registers and emit .cfi_restore - //

[PATCH] D67661: [RISCV] Headers: Add Bitmanip extension Clang header files and rvintrin.h

lewis-revill added inline comments. Comment at: clang/lib/Headers/rv32bintrin-builtins.h:27 +_rv32_clz(const uint_xlen_t rs1) { + // Calling these builtins with 0 results in undefined behaviour. + if (rs1 == 0) { Does GCC perform this check before calling the

[PATCH] D67661: [RISCV] Headers: Add Bitmanip extension Clang header files and rvintrin.h

lewis-revill added a comment. So I have a quick comment about this patch, perhaps it might help to get things moving again. I'd like to see the actual frontend changes, IE separate from the header implementations, to be split into a separate patch. So we can have things like the

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill updated this revision to Diff 232702. lewis-revill added a comment. Rebased. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62686/new/ https://reviews.llvm.org/D62686 Files: clang/lib/Driver/ToolChains/Arch/RISCV.cpp

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill marked an inline comment as done. lewis-revill added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:667 +.addExternalSymbol(SpillLibCall, RISCVII::MO_CALL) +.setMIFlag(MachineInstr::FrameSetup); + shiva0217

[PATCH] D71553: [RISCV] Add Clang frontend support for Bitmanip extension

lewis-revill added a comment. Thanks Scott, it should be relatively easy to add tests for this in 'clang/test/Preprocessor/riscv-target-features.c' if you could. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D71553/new/

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill updated this revision to Diff 234091. lewis-revill added a comment. Rebased and addressed StackSize vs RealStackSize error. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62686/new/ https://reviews.llvm.org/D62686 Files:

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill marked an inline comment as done. lewis-revill added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:289 unsigned CFIIndex = MF.addFrameInst( MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize)); BuildMI(MBB, MBBI, DL,

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill added a comment. In D62686#1708792 , @apazos wrote: > Yes Eli thanks for pointing out there are more scenarios that can fail. > It looks like the best solution is to permit both flags on, but then bail > out from doing this transformation

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill added inline comments. Comment at: llvm/test/CodeGen/RISCV/saverestore.ll:348 + +; Check that functions with varargs do not use save/restore code + luismarques wrote: > Maybe for these tests just put a -NOT check that __riscv_save_ isn't called?

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill updated this revision to Diff 226166. lewis-revill added a comment. Rebase on top of shrink wrapping patch. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62686/new/ https://reviews.llvm.org/D62686 Files:

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill updated this revision to Diff 225230. lewis-revill added a comment. Disable the save/restore optimization when a function contains tail calls. Address various miscellaneous concerns with the patch. Update tests to include less redundant code when checking cases where save/restore

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill updated this revision to Diff 223855. lewis-revill added a comment. Rebased to fix conflicts with recent split SP adjustments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62686/new/ https://reviews.llvm.org/D62686 Files:

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill updated this revision to Diff 234842. lewis-revill added a comment. Fixed existing .cfi_offset offsets. Since these are frame-pointer based they also need to account for the libcall stack adjustment. Currently working on adding .cfi_offset instructions for the registers saved by

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill updated this revision to Diff 234853. lewis-revill added a comment. Added .cfi_offset directives for registers saved by libcalls. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62686/new/ https://reviews.llvm.org/D62686 Files:

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill updated this revision to Diff 242723. lewis-revill added a comment. Rebased Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62686/new/ https://reviews.llvm.org/D62686 Files: clang/lib/Driver/ToolChains/Arch/RISCV.cpp

[PATCH] D73891: [RISCV] Support experimental/unratified extensions

lewis-revill added inline comments. Comment at: clang/lib/Driver/ToolChains/Arch/RISCV.cpp:93 + // If experimental extension, require use of current version number number + if (auto ExperimentalExtension = isExperimentalExtension(Ext)) { +if

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill added a comment. Since the DebugInfo fix has been accepted, I'm looking to get this patch and that fix committed shortly if there are no problems caused by rebasing. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62686/new/

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

This revision was not accepted when it landed; it landed in state "Needs Review". This revision was automatically updated to reflect the committed changes. Closed by commit rG07f7c00208b3: [RISCV] Add support for save/restore of callee-saved registers via libcalls (authored by lewis-revill).

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill updated this revision to Diff 237620. lewis-revill added a comment. Fix .cfi_offset signedness error. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62686/new/ https://reviews.llvm.org/D62686 Files:

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill added a comment. In D62686#1815158 , @pzheng wrote: > I see the following .cfi_offset directives generated using @shiva0217's test > case. Any idea why the offset for ra is 536870908? > > callt0, __riscv_save_0 > .cfi_def_cfa_offset

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill added a comment. In D62686#1808041 , @apazos wrote: > Lewis, is the patch final? It would be good to merge it before the 10.0 > release branch creation on Jan 15th I would say so now. Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill added a comment. In D62686#1820816 , @apazos wrote: > Lewis, your latest patch looks good, we just had another run with no new > failures. But we know it will have issues with -g. So I think we should not > merge it yet. Do you have a

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

lewis-revill added a comment. Should I wait for the comments to be resolved on D71593 before I commit this patch? Ideally if this patch makes it into a release then that bug fix should be there too. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D73891: [RISCV] Support experimental/unratified extensions

lewis-revill accepted this revision. lewis-revill added a comment. This revision is now accepted and ready to land. Thanks, this is looking in good shape now. As long as everyone agrees on this scheme I think the implementation is good to go (pending the bitmanip extension support).

[PATCH] D71387: pass -mabi to LTO linker only in RISC-V targets, enable RISC-V LTO

lewis-revill added a comment. Herald added subscribers: sunshaoce, pcwang-thead, VincentWu, luke957, StephenFan, arichardson. Herald added a project: All. I believe this patch is still relevant/necessary when using LTO for RISCV, so can I ask if @khchen is able to update it to rebase/address

[PATCH] D132843: [RISCV] Ensure target features get passed to the LTO linker for RISC-V

lewis-revill created this revision. lewis-revill added reviewers: efriedma, lenary, jrtc27, asb. Herald added subscribers: sunshaoce, VincentWu, luke957, ormris, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, simoncook, s.egerton, Jim, benna, psnobl, jocewei, PkmX,