[clang] b02d88d - [HLSL] Add shader attribute

Author: Xiang Li Date: 2022-04-20T23:46:43-07:00 New Revision: b02d88d5afb58f53b30cde31990cd2d355d6c597 URL: https://github.com/llvm/llvm-project/commit/b02d88d5afb58f53b30cde31990cd2d355d6c597 DIFF: https://github.com/llvm/llvm-project/commit/b02d88d5afb58f53b30cde31990cd2d355d6c597.diff

[clang] e576280 - [HLSL] Enable vector types for hlsl.

Author: Xiang Li Date: 2022-05-30T09:05:29-07:00 New Revision: e576280380d3f5221cfcc14e9fabeacc8506a43c URL: https://github.com/llvm/llvm-project/commit/e576280380d3f5221cfcc14e9fabeacc8506a43c DIFF: https://github.com/llvm/llvm-project/commit/e576280380d3f5221cfcc14e9fabeacc8506a43c.diff

[clang] 13e1a65 - [HLSL] Enable vector types for hlsl.

Author: Xiang Li Date: 2022-05-31T13:54:17-07:00 New Revision: 13e1a653278ba4a9805f0247c5bc92dad720aab3 URL: https://github.com/llvm/llvm-project/commit/13e1a653278ba4a9805f0247c5bc92dad720aab3 DIFF: https://github.com/llvm/llvm-project/commit/13e1a653278ba4a9805f0247c5bc92dad720aab3.diff

[clang] fde240c - [HLSL][clang][Driver] Parse target profile early to update Driver::TargetTriple.

Author: Xiang Li Date: 2022-05-31T13:23:30-07:00 New Revision: fde240c9c328b8a824a064c8ccd91252516e6d41 URL: https://github.com/llvm/llvm-project/commit/fde240c9c328b8a824a064c8ccd91252516e6d41 DIFF: https://github.com/llvm/llvm-project/commit/fde240c9c328b8a824a064c8ccd91252516e6d41.diff

[clang] d3e4727 - [HLSL] add -D option for dxc mode.

Author: Xiang Li Date: 2022-05-31T17:50:36-07:00 New Revision: d3e4727907e533a088fdb42963b6efcd1f26ec88 URL: https://github.com/llvm/llvm-project/commit/d3e4727907e533a088fdb42963b6efcd1f26ec88 DIFF: https://github.com/llvm/llvm-project/commit/d3e4727907e533a088fdb42963b6efcd1f26ec88.diff

[clang] 6bea9ff - [HLSL] Add WaveActiveCountBits as Langugage builtin function for HLSL

Author: Xiang Li Date: 2022-06-02T13:06:01-07:00 New Revision: 6bea9ff91378571b3bedcdc12fac7bb916371871 URL: https://github.com/llvm/llvm-project/commit/6bea9ff91378571b3bedcdc12fac7bb916371871 DIFF: https://github.com/llvm/llvm-project/commit/6bea9ff91378571b3bedcdc12fac7bb916371871.diff

[clang] 77f72ac - [HLSL] Enable half type for hlsl.

Author: Xiang Li Date: 2022-06-23T12:56:26-07:00 New Revision: 77f72ac15bcac8923c6bd104f303feaa1e964692 URL: https://github.com/llvm/llvm-project/commit/77f72ac15bcac8923c6bd104f303feaa1e964692 DIFF: https://github.com/llvm/llvm-project/commit/77f72ac15bcac8923c6bd104f303feaa1e964692.diff

[clang] a591c7c - [HLSL] Change WaveActiveCountBits to wrapper of __builtin_hlsl_wave_active_count_bits

Author: Xiang Li Date: 2022-06-30T06:16:51-07:00 New Revision: a591c7ca0d9fe47223127ee13df60689f36ba112 URL: https://github.com/llvm/llvm-project/commit/a591c7ca0d9fe47223127ee13df60689f36ba112 DIFF: https://github.com/llvm/llvm-project/commit/a591c7ca0d9fe47223127ee13df60689f36ba112.diff

[clang] a73a84c - [HLSL] add -I option for dxc mode.

Author: Xiang Li Date: 2022-07-20T11:03:22-07:00 New Revision: a73a84c44753402b33d619035d2c5acec3b04859 URL: https://github.com/llvm/llvm-project/commit/a73a84c44753402b33d619035d2c5acec3b04859 DIFF: https://github.com/llvm/llvm-project/commit/a73a84c44753402b33d619035d2c5acec3b04859.diff

[clang] 4dae38e - [HLSL] add -D option for dxc mode.

Author: Xiang Li Date: 2022-05-11T11:26:31-07:00 New Revision: 4dae38ebfba0d8583e52c3ded8f62f5f9fa77fda URL: https://github.com/llvm/llvm-project/commit/4dae38ebfba0d8583e52c3ded8f62f5f9fa77fda DIFF: https://github.com/llvm/llvm-project/commit/4dae38ebfba0d8583e52c3ded8f62f5f9fa77fda.diff

[clang] 6055837 - Revert "[HLSL] add -D option for dxc mode."

Author: Xiang Li Date: 2022-05-11T13:57:47-07:00 New Revision: 6055837f6d2941bbc09e44dc88b6a39b934a7453 URL: https://github.com/llvm/llvm-project/commit/6055837f6d2941bbc09e44dc88b6a39b934a7453 DIFF: https://github.com/llvm/llvm-project/commit/6055837f6d2941bbc09e44dc88b6a39b934a7453.diff

[clang] a0ecb4a - [HLSL] Move DXIL validation version out of ModuleFlags

Author: Xiang Li Date: 2022-08-26T09:20:45-07:00 New Revision: a0ecb4a2991d6163c16c29bee8cd63720ee7d3d7 URL: https://github.com/llvm/llvm-project/commit/a0ecb4a2991d6163c16c29bee8cd63720ee7d3d7 DIFF: https://github.com/llvm/llvm-project/commit/a0ecb4a2991d6163c16c29bee8cd63720ee7d3d7.diff

[clang] 140b0bf - [HLSL] Set main as default entry.

Author: Xiang Li Date: 2022-08-18T11:57:36-07:00 New Revision: 140b0bf89902845be14a4a710289bee49e0d1fc5 URL: https://github.com/llvm/llvm-project/commit/140b0bf89902845be14a4a710289bee49e0d1fc5 DIFF: https://github.com/llvm/llvm-project/commit/140b0bf89902845be14a4a710289bee49e0d1fc5.diff

[clang] 3a671c8 - [NFC] use llvm_unreachable instead of return on switch which all cases are covered.

Author: Xiang Li Date: 2022-10-17T17:47:48-07:00 New Revision: 3a671c8e91c04a3288357f088adcd364a6cd6b22 URL: https://github.com/llvm/llvm-project/commit/3a671c8e91c04a3288357f088adcd364a6cd6b22 DIFF: https://github.com/llvm/llvm-project/commit/3a671c8e91c04a3288357f088adcd364a6cd6b22.diff

[clang] 14ae5d2 - [HLSL] Add SV_DispatchThreadID

Author: Xiang Li Date: 2022-10-18T16:17:19-07:00 New Revision: 14ae5d2b745f76018a963b395fc9d7ad987f1c5c URL: https://github.com/llvm/llvm-project/commit/14ae5d2b745f76018a963b395fc9d7ad987f1c5c DIFF: https://github.com/llvm/llvm-project/commit/14ae5d2b745f76018a963b395fc9d7ad987f1c5c.diff

[clang] a7183a1 - [NFC] [DirectX backend] move ResourceClass into llvm.

Author: Xiang Li Date: 2022-10-20T13:26:56-07:00 New Revision: a7183a158d68d97902aeb2015a5cac5e36ae84c5 URL: https://github.com/llvm/llvm-project/commit/a7183a158d68d97902aeb2015a5cac5e36ae84c5 DIFF: https://github.com/llvm/llvm-project/commit/a7183a158d68d97902aeb2015a5cac5e36ae84c5.diff

[clang] 7e04c0a - [HLSL] Add groupshare address space.

Author: Xiang Li Date: 2022-10-20T09:29:09-07:00 New Revision: 7e04c0ad632527df0a4c4d34a6ac6ec6a3888dfe URL: https://github.com/llvm/llvm-project/commit/7e04c0ad632527df0a4c4d34a6ac6ec6a3888dfe DIFF: https://github.com/llvm/llvm-project/commit/7e04c0ad632527df0a4c4d34a6ac6ec6a3888dfe.diff

[clang] 464926e - [HLSL] Disable integer promotion to avoid int16_t being promoted to int for HLSL.

Author: Xiang Li Date: 2022-10-20T16:06:25-07:00 New Revision: 464926ef4484e4cb2d410fd2e959a296d7b8d58e URL: https://github.com/llvm/llvm-project/commit/464926ef4484e4cb2d410fd2e959a296d7b8d58e DIFF: https://github.com/llvm/llvm-project/commit/464926ef4484e4cb2d410fd2e959a296d7b8d58e.diff

[clang] 0674f2e - [NFC] Fix warning on no return after switch.

Author: Xiang Li Date: 2022-10-17T15:52:23-07:00 New Revision: 0674f2ec96422131abde0c042fbf2c11267db210 URL: https://github.com/llvm/llvm-project/commit/0674f2ec96422131abde0c042fbf2c11267db210 DIFF: https://github.com/llvm/llvm-project/commit/0674f2ec96422131abde0c042fbf2c11267db210.diff

[clang] 13163dd - [HLSL] CodeGen hlsl resource binding.

Author: Xiang Li Date: 2022-10-17T14:29:19-07:00 New Revision: 13163dd8abc57443bd0e931650a3c64fead5235e URL: https://github.com/llvm/llvm-project/commit/13163dd8abc57443bd0e931650a3c64fead5235e DIFF: https://github.com/llvm/llvm-project/commit/13163dd8abc57443bd0e931650a3c64fead5235e.diff

[clang] 649a597 - [clang] Allow vector of BitInt

Author: Xiang Li Date: 2022-09-19T09:26:56-07:00 New Revision: 649a59712ffbc937174268d04ee9a8885f572e2a URL: https://github.com/llvm/llvm-project/commit/649a59712ffbc937174268d04ee9a8885f572e2a DIFF: https://github.com/llvm/llvm-project/commit/649a59712ffbc937174268d04ee9a8885f572e2a.diff

[clang] 079a5ff - [HLSL] Support PCH for cc1 mode

Author: Xiang Li Date: 2022-09-20T15:13:43-07:00 New Revision: 079a5ffb0a3f862bee3076f785d5c71c03e14f00 URL: https://github.com/llvm/llvm-project/commit/079a5ffb0a3f862bee3076f785d5c71c03e14f00 DIFF: https://github.com/llvm/llvm-project/commit/079a5ffb0a3f862bee3076f785d5c71c03e14f00.diff

[clang] 782ac21 - [HLSL] Support cbuffer/tbuffer for hlsl.

Author: Xiang Li Date: 2022-09-21T10:07:43-07:00 New Revision: 782ac2182c2b02de775c0f5a3d935613f2b748f5 URL: https://github.com/llvm/llvm-project/commit/782ac2182c2b02de775c0f5a3d935613f2b748f5 DIFF: https://github.com/llvm/llvm-project/commit/782ac2182c2b02de775c0f5a3d935613f2b748f5.diff

[clang] 52d7ce0 - [HLSL] Allow SV_GroupIndex for lib profile.

Author: Xiang Li Date: 2022-09-21T12:29:58-07:00 New Revision: 52d7ce0cc1a57123ee27a0bff0530f89cab99ab7 URL: https://github.com/llvm/llvm-project/commit/52d7ce0cc1a57123ee27a0bff0530f89cab99ab7 DIFF: https://github.com/llvm/llvm-project/commit/52d7ce0cc1a57123ee27a0bff0530f89cab99ab7.diff

[clang] a7e3de2 - [NFC] Fix build error ignored by MSVC.

Author: Xiang Li Date: 2022-09-21T10:57:43-07:00 New Revision: a7e3de2450f5b62e7dfe8999443f15be5dfec0b0 URL: https://github.com/llvm/llvm-project/commit/a7e3de2450f5b62e7dfe8999443f15be5dfec0b0 DIFF: https://github.com/llvm/llvm-project/commit/a7e3de2450f5b62e7dfe8999443f15be5dfec0b0.diff

[clang] f712c01 - [HLSL]Add -O and -Od option for dxc mode.

Author: Xiang Li Date: 2022-09-13T21:26:18-07:00 New Revision: f712c0131f3b2d7b95ff4e21e8050943c01565d6 URL: https://github.com/llvm/llvm-project/commit/f712c0131f3b2d7b95ff4e21e8050943c01565d6 DIFF: https://github.com/llvm/llvm-project/commit/f712c0131f3b2d7b95ff4e21e8050943c01565d6.diff

[clang] 71fae33 - [NFC] Cleanup test for D132913 Preserve vec3 for HLSL

Author: Xiang Li Date: 2022-09-09T15:04:59-07:00 New Revision: 71fae33f5e7c1b11e32db695fd24dd50aead737c URL: https://github.com/llvm/llvm-project/commit/71fae33f5e7c1b11e32db695fd24dd50aead737c DIFF: https://github.com/llvm/llvm-project/commit/71fae33f5e7c1b11e32db695fd24dd50aead737c.diff

[clang] c9d2b6b - [HLSL] Preserve vec3 for HLSL.

Author: Xiang Li Date: 2022-09-09T10:55:45-07:00 New Revision: c9d2b6b92d6c29d00f6adc0527cf2331dbaae31a URL: https://github.com/llvm/llvm-project/commit/c9d2b6b92d6c29d00f6adc0527cf2331dbaae31a DIFF: https://github.com/llvm/llvm-project/commit/c9d2b6b92d6c29d00f6adc0527cf2331dbaae31a.diff

[clang] 8b2f8b3 - [NFC} update CodeGenHLSL tests to use cc1 instead of driver-mode

Author: Xiang Li Date: 2022-09-17T00:11:44-07:00 New Revision: 8b2f8b309885e872ad98af381ee5459716955877 URL: https://github.com/llvm/llvm-project/commit/8b2f8b309885e872ad98af381ee5459716955877 DIFF: https://github.com/llvm/llvm-project/commit/8b2f8b309885e872ad98af381ee5459716955877.diff

[clang] edbf36c - [HLSL] [clang] Add vector version of abs for HLSL

Author: Xiang Li Date: 2022-09-18T14:59:30-07:00 New Revision: edbf36c5e9e84bb0e70ddbcacc20b14217688cba URL: https://github.com/llvm/llvm-project/commit/edbf36c5e9e84bb0e70ddbcacc20b14217688cba DIFF: https://github.com/llvm/llvm-project/commit/edbf36c5e9e84bb0e70ddbcacc20b14217688cba.diff

[clang] e3fd0b2 - [HLSL] Add resource binding attribute for HLSL.

Author: Xiang Li Date: 2022-09-22T11:51:21-07:00 New Revision: e3fd0b20731f559ba90a9a32f6489499a63cf2b5 URL: https://github.com/llvm/llvm-project/commit/e3fd0b20731f559ba90a9a32f6489499a63cf2b5 DIFF: https://github.com/llvm/llvm-project/commit/e3fd0b20731f559ba90a9a32f6489499a63cf2b5.diff

[clang] bad2e6c - [HLSL] clang codeGen for HLSLNumThreadsAttr

Author: Xiang Li Date: 2022-09-22T15:30:52-07:00 New Revision: bad2e6c830de8c6ddc72f7ba3ace068fb62448ff URL: https://github.com/llvm/llvm-project/commit/bad2e6c830de8c6ddc72f7ba3ace068fb62448ff DIFF: https://github.com/llvm/llvm-project/commit/bad2e6c830de8c6ddc72f7ba3ace068fb62448ff.diff

[clang] e09a6f3 - [NFC] Move cc1 test out of Driver test

Author: Xiang Li Date: 2022-09-29T14:19:12-07:00 New Revision: e09a6f37d5ec0dea47fe0feb32556e77450cd6c4 URL: https://github.com/llvm/llvm-project/commit/e09a6f37d5ec0dea47fe0feb32556e77450cd6c4 DIFF: https://github.com/llvm/llvm-project/commit/e09a6f37d5ec0dea47fe0feb32556e77450cd6c4.diff

[clang] 10d6a34 - [NFC] Use %clang_cc1

Author: Xiang Li Date: 2022-09-29T14:26:01-07:00 New Revision: 10d6a34ef6e9792cace5f3ce769908d1ee04193a URL: https://github.com/llvm/llvm-project/commit/10d6a34ef6e9792cace5f3ce769908d1ee04193a DIFF: https://github.com/llvm/llvm-project/commit/10d6a34ef6e9792cace5f3ce769908d1ee04193a.diff

[clang] be07c80 - [HLSL] add ceil library function

Author: Joshua Batista Date: 2022-09-29T14:03:30-07:00 New Revision: be07c80cf7774e8ada84ddc29ae7ab5efa4d1ec9 URL: https://github.com/llvm/llvm-project/commit/be07c80cf7774e8ada84ddc29ae7ab5efa4d1ec9 DIFF:

[clang] 15aa643 - [HLSL] Support register binding attribute on global variable

Author: Xiang Li Date: 2022-10-05T09:23:35-07:00 New Revision: 15aa64301ab146dec7c6ffcd0418ed834bf099e2 URL: https://github.com/llvm/llvm-project/commit/15aa64301ab146dec7c6ffcd0418ed834bf099e2 DIFF: https://github.com/llvm/llvm-project/commit/15aa64301ab146dec7c6ffcd0418ed834bf099e2.diff

[clang] ebe9c7f - [HLSL] CodeGen hlsl cbuffer/tbuffer.

Author: Xiang Li Date: 2022-10-12T21:17:38-07:00 New Revision: ebe9c7f3e2da779b984b336dadf37cc4ec2ae260 URL: https://github.com/llvm/llvm-project/commit/ebe9c7f3e2da779b984b336dadf37cc4ec2ae260 DIFF: https://github.com/llvm/llvm-project/commit/ebe9c7f3e2da779b984b336dadf37cc4ec2ae260.diff

[clang] 6a6f10f - [Docs] [HLSL] Add note about PCH support

Author: Xiang Li Date: 2022-10-07T10:49:21-07:00 New Revision: 6a6f10fd23b2730e2c01051541c5a83f5df9131b URL: https://github.com/llvm/llvm-project/commit/6a6f10fd23b2730e2c01051541c5a83f5df9131b DIFF: https://github.com/llvm/llvm-project/commit/6a6f10fd23b2730e2c01051541c5a83f5df9131b.diff

[clang] 2bdfece - [HLSL] Remove global ctor/dtor variable for non-lib profile.

Author: Xiang Li Date: 2022-10-06T15:00:50-07:00 New Revision: 2bdfececef4330b3a6489cdb67c57eb771d5f9e4 URL: https://github.com/llvm/llvm-project/commit/2bdfececef4330b3a6489cdb67c57eb771d5f9e4 DIFF: https://github.com/llvm/llvm-project/commit/2bdfececef4330b3a6489cdb67c57eb771d5f9e4.diff

[clang] b267ac4 - [HLSL] Add Resource kind for HLSLResourceAttr.

Author: Xiang Li Date: 2022-10-11T09:41:14-07:00 New Revision: b267ac49e764c65322cf772647ff26d6732e5134 URL: https://github.com/llvm/llvm-project/commit/b267ac49e764c65322cf772647ff26d6732e5134 DIFF: https://github.com/llvm/llvm-project/commit/b267ac49e764c65322cf772647ff26d6732e5134.diff

[clang] 906e41f - [HLSL] clang codeGen for HLSLShaderAttr.

Author: Xiang Li Date: 2022-08-04T21:23:57-07:00 New Revision: 906e41f4e34d32c257e0c0c9ce1b56070ba11960 URL: https://github.com/llvm/llvm-project/commit/906e41f4e34d32c257e0c0c9ce1b56070ba11960 DIFF: https://github.com/llvm/llvm-project/commit/906e41f4e34d32c257e0c0c9ce1b56070ba11960.diff

[clang] 6134629 - [NFC][HLSL] Fix typo in CGHLSLRuntime.

Author: Xiang Li Date: 2022-08-04T23:08:40-07:00 New Revision: 6134629af08705e1f495171221deb46f6ba3d65d URL: https://github.com/llvm/llvm-project/commit/6134629af08705e1f495171221deb46f6ba3d65d DIFF: https://github.com/llvm/llvm-project/commit/6134629af08705e1f495171221deb46f6ba3d65d.diff

[clang] b2c9ff7 - [NFC][HLSL] Fix build error caused missing typo update.

Author: Xiang Li Date: 2022-08-04T23:20:25-07:00 New Revision: b2c9ff727379992ef472e32620635b7e5d561d60 URL: https://github.com/llvm/llvm-project/commit/b2c9ff727379992ef472e32620635b7e5d561d60 DIFF: https://github.com/llvm/llvm-project/commit/b2c9ff727379992ef472e32620635b7e5d561d60.diff

[clang] 8a27a2f - [HLSL] Support -E option for HLSL.

Author: Xiang Li Date: 2022-08-04T16:54:19-07:00 New Revision: 8a27a2f89f83c55d352c001b3b308c35900cbdfc URL: https://github.com/llvm/llvm-project/commit/8a27a2f89f83c55d352c001b3b308c35900cbdfc DIFF: https://github.com/llvm/llvm-project/commit/8a27a2f89f83c55d352c001b3b308c35900cbdfc.diff

[clang] 549542b - [HLSL] emit-obj when set output.

Author: Xiang Li Date: 2022-08-05T16:27:17-07:00 New Revision: 549542b494f4c84bead744ed91ea81236e4aaa63 URL: https://github.com/llvm/llvm-project/commit/549542b494f4c84bead744ed91ea81236e4aaa63 DIFF: https://github.com/llvm/llvm-project/commit/549542b494f4c84bead744ed91ea81236e4aaa63.diff

[clang] ad48e96 - [NFC] [Doc] Fix example for AnnotateTypeDocs

Author: Xiang Li Date: 2023-01-05T16:32:02-05:00 New Revision: ad48e9669a80e05c55e35970461b34f04dc0f117 URL: https://github.com/llvm/llvm-project/commit/ad48e9669a80e05c55e35970461b34f04dc0f117 DIFF: https://github.com/llvm/llvm-project/commit/ad48e9669a80e05c55e35970461b34f04dc0f117.diff

[clang] 9777e98 - [HLSL] add cos library function

Author: Joshua Batista Date: 2022-11-16T12:54:11-08:00 New Revision: 9777e98a610f3128f8a79c13211ca5f05b26f9eb URL: https://github.com/llvm/llvm-project/commit/9777e98a610f3128f8a79c13211ca5f05b26f9eb DIFF:

[clang] 083d949 - [HLSL] add sin library function

Author: Joshua Batista Date: 2022-11-16T18:29:50-08:00 New Revision: 083d949f3800978c07260a0b8d6711c353d69e45 URL: https://github.com/llvm/llvm-project/commit/083d949f3800978c07260a0b8d6711c353d69e45 DIFF:

[clang] a5d14f7 - Add builtin_elementwise_sin and builtin_elementwise_cos

Author: Joshua Batista Date: 2022-11-10T23:30:27-08:00 New Revision: a5d14f757bb1afa47925d7d77bea6bf73bbe0434 URL: https://github.com/llvm/llvm-project/commit/a5d14f757bb1afa47925d7d77bea6bf73bbe0434 DIFF:

[clang] 86674f6 - [HLSL] Added HLSL this as a reference

Author: Grace Jennings Date: 2022-11-07T13:50:08-08:00 New Revision: 86674f66cc78a1a121d43fe51f076cbfa8710b1a URL: https://github.com/llvm/llvm-project/commit/86674f66cc78a1a121d43fe51f076cbfa8710b1a DIFF:

[clang] d5a7439 - [HLSL] [Dirver] add dxv as a VerifyDebug Job

Author: Xiang Li Date: 2023-02-01T20:07:25-05:00 New Revision: d5a7439e220c79ca9aad323f38cd115a1a34a13f URL: https://github.com/llvm/llvm-project/commit/d5a7439e220c79ca9aad323f38cd115a1a34a13f DIFF: https://github.com/llvm/llvm-project/commit/d5a7439e220c79ca9aad323f38cd115a1a34a13f.diff

[clang] c530232 - [clang:diagnostics] Turning off warn_self_assignment_overloaded for user-defined compound assignments

Author: Xiang Li Date: 2023-04-07T18:33:47-04:00 New Revision: c5302325b2a62d77cf13dd16cd5c19141862fed0 URL: https://github.com/llvm/llvm-project/commit/c5302325b2a62d77cf13dd16cd5c19141862fed0 DIFF: https://github.com/llvm/llvm-project/commit/c5302325b2a62d77cf13dd16cd5c19141862fed0.diff

[clang] [DirectX] Fix HLSL bitshifts to leverage the OpenCL pipeline for bitshifting (PR #81030)

python3kgae wrote: What is the output before this change? It would be nice to add more information to the PR description. https://github.com/llvm/llvm-project/pull/81030 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[clang] [DirectX] Fix HLSL bitshifts to leverage the OpenCL pipeline for bitshifting (PR #81030)

https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/81030 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)

https://github.com/python3kgae edited https://github.com/llvm/llvm-project/pull/81190 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)

https://github.com/python3kgae edited https://github.com/llvm/llvm-project/pull/81190 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)

@@ -4518,6 +4518,12 @@ def HLSLCreateHandle : LangBuiltin<"HLSL_LANG"> { let Prototype = "void*(unsigned char)"; } +def HLSLDotProduct : LangBuiltin<"HLSL_LANG"> { + let Spellings = ["__builtin_hlsl_dot"]; + let Attributes = [NoThrow, Const, CustomTypeChecking]; + let

[clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)

https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/81190 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL][Doc] Add doc about expected differences (PR #82395)

https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/82395 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)

@@ -19,4 +19,9 @@ def int_dx_flattened_thread_id_in_group : Intrinsic<[llvm_i32_ty], [], [IntrNoMe def int_dx_create_handle : ClangBuiltin<"__builtin_hlsl_create_handle">, Intrinsic<[ llvm_ptr_ty ], [llvm_i8_ty], [IntrWillReturn]>; -} + +def int_dx_dot : +

[clang] [llvm] [HLSL][DirectX] Move handling of resource element types into the frontend (PR #75674)

https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/75674 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL] Parameter modifier parsing and AST (PR #72139)

https://github.com/python3kgae approved this pull request. Maybe a verify test for use rvalue for inout parameter. https://github.com/llvm/llvm-project/pull/72139 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[clang] [llvm] [HLSL] move rcp to cgbuiltins (PR #88401)

https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/88401 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] move rcp to cgbuiltins (PR #88401)

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[clang] [llvm] [HLSL] move rcp to cgbuiltins (PR #88401)

@@ -0,0 +1,126 @@ + ; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s + +; CHECK-DAG: %[[#float_64:]] = OpTypeFloat 64 +; CHECK-DAG: %[[#float_32:]] = OpTypeFloat 32 +; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 16 +; CHECK-DAG: %[[#vec2_float_16:]] =

[clang] [llvm] [HLSL] move rcp to cgbuiltins (PR #88401)

@@ -0,0 +1,126 @@ + ; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s + +; CHECK-DAG: %[[#float_64:]] = OpTypeFloat 64 +; CHECK-DAG: %[[#float_32:]] = OpTypeFloat 32 +; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 16 +; CHECK-DAG: %[[#vec2_float_16:]] =

[clang] [NFC] Rename hlsl semantics to hlsl annotations (PR #89309)

https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/89309 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] Implement resource binding type prefix mismatch errors (PR #87578)

@@ -9,7 +9,7 @@ cbuffer A : register(b0, space2) { } // CHECK: @[[TB:.+]] = external constant { float, double } -tbuffer A : register(t2, space1) { +tbuffer A : register(b2, space1) { python3kgae wrote: This is tbuffer, it should use 't' instead of 'b'.

[clang] [HLSL] Support packoffset attribute in AST (PR #89836)

https://github.com/python3kgae created https://github.com/llvm/llvm-project/pull/89836 Add HLSLPackOffsetAttr to save packoffset in AST. Since we have to parse the attribute manually in ParseHLSLAnnotations, we could create the ParsedAttribute with a integer offset parameter instead of

[clang] [Doc][HLSL] Add documentation for root signature (PR #88781)

https://github.com/python3kgae created https://github.com/llvm/llvm-project/pull/88781 This patch adds documentation for the root signature in HLSL. For issue #55116 >From 0065f8eade1fc00bce560ceeba9431a4616615b9 Mon Sep 17 00:00:00 2001 From: Xiang Li Date: Mon, 15 Apr 2024 12:23:46 -0700

[clang] [Doc][HLSL] Add documentation for root signature (PR #88781)

https://github.com/python3kgae updated https://github.com/llvm/llvm-project/pull/88781 >From 0065f8eade1fc00bce560ceeba9431a4616615b9 Mon Sep 17 00:00:00 2001 From: Xiang Li Date: Mon, 15 Apr 2024 12:23:46 -0700 Subject: [PATCH 1/2] [Doc][HLSL] Add documentation for root signature This patch

[clang] [Doc][HLSL] Add documentation for root signature (PR #88781)

https://github.com/python3kgae updated https://github.com/llvm/llvm-project/pull/88781 >From 0065f8eade1fc00bce560ceeba9431a4616615b9 Mon Sep 17 00:00:00 2001 From: Xiang Li Date: Mon, 15 Apr 2024 12:23:46 -0700 Subject: [PATCH 1/3] [Doc][HLSL] Add documentation for root signature This patch

[clang] [Doc][HLSL] Add documentation for root signature (PR #88781)

https://github.com/python3kgae updated https://github.com/llvm/llvm-project/pull/88781 >From 0065f8eade1fc00bce560ceeba9431a4616615b9 Mon Sep 17 00:00:00 2001 From: Xiang Li Date: Mon, 15 Apr 2024 12:23:46 -0700 Subject: [PATCH 1/4] [Doc][HLSL] Add documentation for root signature This patch

[clang] [Doc][HLSL] Add documentation for root signature (PR #88781)

@@ -0,0 +1,291 @@ + +HLSL Root Signatures + + +.. contents:: + :local: + +Usage += + +In HLSL, the `root signature +`_ +defines what types of resources are

[clang] [Doc][HLSL] Add documentation for root signature (PR #88781)

@@ -0,0 +1,291 @@ + +HLSL Root Signatures + + +.. contents:: + :local: + +Usage += + +In HLSL, the `root signature +`_ +defines what types of resources are

[clang] [Doc][HLSL] Add documentation for root signature (PR #88781)

https://github.com/python3kgae edited https://github.com/llvm/llvm-project/pull/88781 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Doc][HLSL] Add documentation for root signature (PR #88781)

@@ -0,0 +1,291 @@ + +HLSL Root Signatures + + +.. contents:: + :local: + +Usage += + +In HLSL, the `root signature +`_ +defines what types of resources are

[clang] [Doc][HLSL] Add documentation for root signature (PR #88781)

@@ -0,0 +1,291 @@ + +HLSL Root Signatures + + +.. contents:: + :local: + +Usage += + +In HLSL, the `root signature +`_ +defines what types of resources are

[clang] [Doc][HLSL] Add documentation for root signature (PR #88781)

@@ -0,0 +1,291 @@ + +HLSL Root Signatures + + +.. contents:: + :local: + +Usage += + +In HLSL, the `root signature +`_ +defines what types of resources are

[clang] [Doc][HLSL] Add documentation for root signature (PR #88781)

@@ -0,0 +1,291 @@ + +HLSL Root Signatures + + +.. contents:: + :local: + +Usage += + +In HLSL, the `root signature +`_ +defines what types of resources are

[clang] [HLSL] Support packoffset attribute in AST (PR #89836)

https://github.com/python3kgae updated https://github.com/llvm/llvm-project/pull/89836 >From 4d8c72688656fe3b2ce8817087d8cf7352b5876b Mon Sep 17 00:00:00 2001 From: Xiang Li Date: Tue, 23 Apr 2024 17:49:02 -0400 Subject: [PATCH 1/2] [HLSL] Support packoffset attribute in AST Add

[clang] [Clang][HLSL] Add environment parameter to availability attribute (PR #89809)

@@ -1016,7 +1016,34 @@ static llvm::StringRef canonicalizePlatformName(llvm::StringRef Platform) { .Case("visionos_app_extension", "xros_app_extension") .Case("ShaderModel", "shadermodel") .Default(Platform); -} }]; +} +static

[clang] [llvm] [DirectX] Set DXIL Version using shader model version in compilation target profile (PR #89823)

@@ -2,39 +2,45 @@ // Supported targets // -// RUN: %clang -target dxil--shadermodel6.2-pixel %s -S -o /dev/null 2>&1 | FileCheck --check-prefix=CHECK-VALID %s -// RUN: %clang -target dxil-unknown-shadermodel6.2-pixel %s -S -o /dev/null 2>&1 | FileCheck

[clang] [llvm] [DirectX] Set DXIL Version using shader model version in compilation target profile (PR #89823)

https://github.com/python3kgae edited https://github.com/llvm/llvm-project/pull/89823 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Implement resource binding type prefix mismatch errors (PR #87578)

@@ -12154,6 +12154,8 @@ def err_hlsl_missing_semantic_annotation : Error< def err_hlsl_init_priority_unsupported : Error< "initializer priorities are not supported in HLSL">; +def err_hlsl_mismatching_register_resource_type_and_name: Error<"invalid register name prefix

[clang] [llvm] Implement resource binding type prefix mismatch errors (PR #87578)

@@ -25,6 +25,7 @@ enum class ResourceClass : uint8_t { SRV = 0, UAV, CBuffer, + TBuffer, python3kgae wrote: TBuffer should be a resource kind, not resource class. https://github.com/llvm/llvm-project/pull/87578

[clang] [HLSL] Support packoffset attribute in AST (PR #89836)

https://github.com/python3kgae updated https://github.com/llvm/llvm-project/pull/89836 >From 4d8c72688656fe3b2ce8817087d8cf7352b5876b Mon Sep 17 00:00:00 2001 From: Xiang Li Date: Tue, 23 Apr 2024 17:49:02 -0400 Subject: [PATCH 1/3] [HLSL] Support packoffset attribute in AST Add

[clang] [llvm] Implement resource binding type prefix mismatch errors (PR #87578)

@@ -44,7 +44,7 @@ void foo2() { // expected-warning@+1 {{'register' attribute only applies to cbuffer/tbuffer and external global variables}} extern RWBuffer U2 : register(u5); } -// FIXME: expect-error once fix https://github.com/llvm/llvm-project/issues/57886. +//

[clang] [llvm] Implement resource binding type prefix mismatch errors (PR #87578)

@@ -44,7 +44,7 @@ void foo2() { // expected-warning@+1 {{'register' attribute only applies to cbuffer/tbuffer and external global variables}} extern RWBuffer U2 : register(u5); } -// FIXME: expect-error once fix https://github.com/llvm/llvm-project/issues/57886. +//

[clang] [llvm] [DirectX] Start documenting DXIL Resource handling (PR #90553)

@@ -0,0 +1,799 @@ +== +DXIL Resource Handling +== + +.. contents:: + :local: + +.. toctree:: + :hidden: + +Introduction + + +Resources in DXIL are represented via ``TargetExtType`` in LLVM IR and +eventually lowered by the

[clang] [llvm] [DirectX] Start documenting DXIL Resource handling (PR #90553)

@@ -0,0 +1,794 @@ +== +DXIL Resource Handling +== + +.. contents:: + :local: + +.. toctree:: + :hidden: + +Introduction + + +Resources in DXIL are represented via ``TargetExtType`` in LLVM IR and +eventually lowered by the

[clang] [HLSL] reenable add packoffset in AST (PR #91474)

https://github.com/python3kgae edited https://github.com/llvm/llvm-project/pull/91474 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL] reenable add packoffset in AST (PR #91474)

python3kgae wrote: > When reapplying a change that was reverted, please include enough information > in the description so that it can be understood without having to dig up the > old change. Something like: > > > [HLSL] reenable add packoffset in AST > > This reapplies > >

[clang] [HLSL] reenable add packoffset in AST (PR #91474)

https://github.com/python3kgae updated https://github.com/llvm/llvm-project/pull/91474 >From 251bbfbd77f9fa968a3fe76156e216f27eeb973f Mon Sep 17 00:00:00 2001 From: Xiang Li Date: Wed, 8 May 2024 09:48:30 -0400 Subject: [PATCH 1/2] Revert "Revert "[HLSL] Support packoffset attribute in AST

[clang] [llvm] [DirectX] Start documenting DXIL Resource handling (PR #90553)

@@ -0,0 +1,794 @@ +== +DXIL Resource Handling +== + +.. contents:: + :local: + +.. toctree:: + :hidden: + +Introduction + + +Resources in DXIL are represented via ``TargetExtType`` in LLVM IR and +eventually lowered by the

[clang] [HLSL] reenable add packoffset in AST (PR #91474)

https://github.com/python3kgae closed https://github.com/llvm/llvm-project/pull/91474 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL] Support packoffset attribute in AST (PR #89836)

@@ -0,0 +1,55 @@ +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.3-library -verify %s + +// expected-error@+1{{cannot mix packoffset elements with nonpackoffset elements in a cbuffer}} +cbuffer Mix +{ +float4 M1 : packoffset(c0); +float M2; +

[clang] [HLSL] Support packoffset attribute in AST (PR #89836)

@@ -183,6 +183,86 @@ void Parser::ParseHLSLAnnotations(ParsedAttributes , return; } } break; + case ParsedAttr::AT_HLSLPackOffset: { +// Parse 'packoffset( c[Subcomponent][.component] )'. +// Check '('. +if (ExpectAndConsume(tok::l_paren,

[clang] [HLSL] Support packoffset attribute in AST (PR #89836)

@@ -0,0 +1,16 @@ +// RUN: %clang_cc1 -triple dxil-unknown-shadermodel6.3-library -S -finclude-default-header -ast-dump -x hlsl %s | FileCheck %s + + +// CHECK: HLSLBufferDecl {{.*}} cbuffer A +cbuffer A +{ +// CHECK-NEXT: VarDecl {{.*}} C1 'float4'

[clang] [HLSL] Support packoffset attribute in AST (PR #89836)

@@ -0,0 +1,16 @@ +// RUN: %clang_cc1 -triple dxil-unknown-shadermodel6.3-library -S -finclude-default-header -ast-dump -x hlsl %s | FileCheck %s + + +// CHECK: HLSLBufferDecl {{.*}} cbuffer A +cbuffer A +{ +// CHECK-NEXT: VarDecl {{.*}} C1 'float4' +// CHECK-NEXT:

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