I updated N32 patch for clang.
Simon Atanasyan via Phabricator
于2018年9月27日周四 下午8:23写道:
>
> atanasyan added a comment.
>
> Could you please update the patch against the current trunk?
>
>
> Repository:
> rC Clang
>
> https://reviews.llvm.org/D50850
>
>
>
--
YunQiang Su
https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/71157
On most hardware, FCSR.ABS2008 is set the value same with FCSR.NAN2008. Let's
use this behaivor by default.
With this commit, `clang -target mips -mnan=2008 -c fabs.c` will imply
`-mabs=2008`.
And of course,
https://github.com/wzssyqa updated
https://github.com/llvm/llvm-project/pull/68521
>From 6053822322fd1594b46bf77c8b168ad802a7c534 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sun, 8 Oct 2023 07:12:45 -0400
Subject: [PATCH] MIPS/libunwind: Use -mfp64 if compiler is FPXX
Libunwind supports
https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/68521
Libunwind supports FP64 and FP32 modes, but not FPXX. The reason is that, FP64
and FP32 have different way to save/restore FPRs. If libunwind is built as
FPXX, we have no idea which one should we use.
If
wzssyqa wrote:
@brad0 can you have a look at this?
https://github.com/llvm/llvm-project/pull/71157
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wzssyqa wrote:
@brad0 can you have a look at this PR?
https://github.com/llvm/llvm-project/pull/68521
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https://github.com/llvm/llvm-project/pull/79116
>From 838394878054831066e563fa243665ba6d68d824 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Tue, 23 Jan 2024 18:14:48 +0800
Subject: [PATCH] MIPS/clang: Fix asm constraint for softfloat
This include 2
@@ -0,0 +1,25 @@
+; RUN: llc -march=mips < %s | FileCheck %s --check-prefix=MIPS32
+; RUN: llc -march=mips64 < %s | FileCheck %s --check-prefix=MIPS64
+
+define dso_local void @read_double(double* nocapture noundef readonly %0)
local_unnamed_addr #0 {
wzssyqa
@@ -0,0 +1,8 @@
+// RUN: %clang_cc1 -triple mips -target-feature +soft-float
-DSOFT_FLOAT_NO_CONSTRAINT_F -fsyntax-only -verify %s
+
+#ifdef SOFT_FLOAT_NO_CONSTRAINT_F
+void read_float(float* p) {
wzssyqa wrote:
Oh, yes. we can use `float p` here.
https://github.com/wzssyqa updated
https://github.com/llvm/llvm-project/pull/79116
>From 0ea3b2be9d364a042c7e7114b0f72fc3c144d2a0 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Tue, 23 Jan 2024 18:14:48 +0800
Subject: [PATCH] MIPS/clang: Fix asm constraint for softfloat
This include 2
@@ -132,6 +132,7 @@ class LLVM_LIBRARY_VISIBILITY LoongArch64TargetInfo
: LoongArchTargetInfo(Triple, Opts) {
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
IntMaxType = Int64Type = SignedLong;
+HasCheapUnalignedBitfieldAccess = true;
@@ -132,6 +132,7 @@ class LLVM_LIBRARY_VISIBILITY LoongArch64TargetInfo
: LoongArchTargetInfo(Triple, Opts) {
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
IntMaxType = Int64Type = SignedLong;
+HasCheapUnalignedBitfieldAccess = true;
wzssyqa wrote:
> `-mno-unalgined-access` has been added since clang17:
> https://reviews.llvm.org/D149946
This option is for LoongArch instead of MIPSr6.
https://github.com/llvm/llvm-project/pull/65742
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>From 0da681135e785b01d67b0cef02581e0bba028ef3 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Tue, 23 Jan 2024 18:14:48 +0800
Subject: [PATCH] MIPS/clang: Fix asm constraint for softfloat
This include 2
wzssyqa wrote:
For MIPSr6, it is just like AARCH64, since some microarchitecture doesn't
support mis-unaligned well in hardware level, so we need an options to disable
it: kernel may need it.
For GCC, we have `-mno-unalgined-access`. We need also add this option to clang.
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@@ -132,6 +132,7 @@ class LLVM_LIBRARY_VISIBILITY LoongArch64TargetInfo
: LoongArchTargetInfo(Triple, Opts) {
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
IntMaxType = Int64Type = SignedLong;
+HasCheapUnalignedBitfieldAccess = true;
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>From 4e1b075a26db2831d981bad61ae883ede890bd58 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Fri, 3 Nov 2023 03:30:52 -0400
Subject: [PATCH] Clang/MIPS: Use -mnan value for -mabs if not specified
On most
https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/76894
On MIPS pre-R6, instruction b can only work within 64KiB,
which is not enough now.
We need the help of GOT.
For __mips64, we can get GOT by:
lui $t8, %hi(%neg(%gp_rel(SANITIZER_STRINGIFY(TRAMPOLINE(func)
wzssyqa wrote:
@brad0
https://github.com/llvm/llvm-project/pull/76894
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>From 009bd230a51a1790e6691ae3f104f57af311272f Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Tue, 23 Jan 2024 18:14:48 +0800
Subject: [PATCH] MIPS/clang: Fix asm constraint for softfloat
This include 2
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>From afacadad3f6654c60609a8d024ab9b6c0123195d Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Tue, 23 Jan 2024 18:14:48 +0800
Subject: [PATCH] MIPS/clang: Fix asm constraint for softfloat
This include 2
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>From afacadad3f6654c60609a8d024ab9b6c0123195d Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Tue, 23 Jan 2024 18:14:48 +0800
Subject: [PATCH] MIPS/clang: Fix asm constraint for softfloat
This include 2
https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/79116
Currently, clang accpets contraint f for softfloat, then LLVM meet an internal
error.
See: #64241
>From f01ce8f18a8cfaed41b4cfdd8b039abfc76aefd4 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Tue, 23 Jan
wzssyqa wrote:
@MaskRay
https://github.com/llvm/llvm-project/pull/79116
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wzssyqa wrote:
Fangrui Song ***@***.***> 于2024年2月6日周二 13:36写道:
> Libunwind supports FP64 and FP32 modes, but not FPXX. The reason is that,
> FP64 and FP32 have different way to save/restore FPRs. If libunwind is
> built as FPXX, we have no idea which one should we use.
>
> Can you edit the
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>From 65db5951e3c30b6c2a112b590839fad6b8ec2944 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sun, 8 Oct 2023 07:12:45 -0400
Subject: [PATCH] MIPS/libunwind: Use -mfp64 if compiler is FPXX
Libunwind supports
https://github.com/wzssyqa updated
https://github.com/llvm/llvm-project/pull/79116
>From af69ccc8182f8a1e86637b75a8fb1e717b157354 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Tue, 23 Jan 2024 18:14:48 +0800
Subject: [PATCH] MIPS/clang: Fix asm constraint for softfloat
This include 2
wzssyqa wrote:
> For MIPSr6, it is just like AARCH64, since some microarchitecture doesn't
> support mis-unaligned well in hardware level, so we need an options to
> disable it: kernel may need it.
>
> For GCC, we have `-mno-unalgined-access`. We need also add this option to
> clang.
@@ -321,9 +321,11 @@ void aarch64::getAArch64TargetFeatures(const Driver ,
}
}
- if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
- options::OPT_munaligned_access)) {
-if
@@ -321,9 +321,11 @@ void aarch64::getAArch64TargetFeatures(const Driver ,
}
}
- if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
- options::OPT_munaligned_access)) {
-if
https://github.com/wzssyqa updated
https://github.com/llvm/llvm-project/pull/85174
>From e75523f5ab1bb58a495afdd30203a0c7c93c7ec4 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Thu, 14 Mar 2024 11:48:36 +0800
Subject: [PATCH] MIPS: Support -m(no-)strict-align for r6
MIPSr6 ISA requires
https://github.com/wzssyqa updated
https://github.com/llvm/llvm-project/pull/85174
>From 7e1cf74f4fc9271e88b62462ea9a38826fd3ee38 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Thu, 14 Mar 2024 11:48:36 +0800
Subject: [PATCH] MIPS: Support -m(no-)strict-align for r6
MIPSr6 ISA requires
https://github.com/wzssyqa edited
https://github.com/llvm/llvm-project/pull/85174
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https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/85174
MIPSr6 ISA requires normal load/store instructions support misunaligned memory
access, while it is not always do so by hardware. On some microarchitectures or
some corner cases it may need support by OS.
Don't
@@ -330,6 +331,8 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public
TargetInfo {
IsMicromips = true;
else if (Feature == "+mips32r6" || Feature == "+mips64r6")
HasUnalignedAccess = true;
+ else if (Feature == "+strict-align")
+
https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/87319
In ToolChain::getCompilerRT:
If none is found, use a file name from the new layout, which may get
printed in an error message, aiding users in knowing what Clang is
looking for.
But in current code, the
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https://github.com/llvm/llvm-project/pull/87257
TargetInfo has HasUnalignedAccess support now. For MIPSr6, we should set it
according strict-align.
For pre-R6, we always set strict-align and HasUnalignedAccess to false.
>From
https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/87256
TargetInfo has HasUnalignedAccess support now. For MIPSr6, we should set it
according strict-align.
For pre-R6, we always set strict-align and HasUnalignedAccess to false.
>From
https://github.com/wzssyqa approved this pull request.
https://github.com/llvm/llvm-project/pull/87866
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wzssyqa wrote:
Replaced by: https://github.com/llvm/llvm-project/issues/87150
https://github.com/llvm/llvm-project/pull/87319
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wzssyqa wrote:
[xx.patch](https://github.com/llvm/llvm-project/files/14948921/xx.patch)
@aeubanks can you help to test this patch?
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wzssyqa wrote:
For me, I think that it is a good idea to always warn/hint the full/normalized
path.
For compatible reason, we can still try to find libraries in old-style or
non-full/normalized paths, while should not hint them.
https://github.com/llvm/llvm-project/pull/87866
https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/88334
Currently, clang looks for compiler-rt only from the normalized triple subdir.
While if we are configured with a non-normalized triple with
-DLLVM_DEFAULT_TARGET_TRIPLE, such as triples without vendor section,
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@@ -28,6 +28,19 @@ if (CMAKE_SOURCE_DIR STREQUAL CMAKE_CURRENT_SOURCE_DIR)
if (NOT LLVM_RUNTIMES_BUILD)
load_llvm_config()
endif()
+ if(LLVM_ENABLE_PER_TARGET_RUNTIME_DIR AND NOT APPLE)
+set(print_target_triple ${CMAKE_CXX_COMPILER}
wzssyqa wrote:
Does it really needed?
https://github.com/llvm/llvm-project/pull/89425
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@@ -142,7 +142,7 @@ if(WIN32 OR LLVM_WINSYSROOT)
set(RUNTIMES_${target}_CMAKE_MODULE_LINKER_FLAGS ${WINDOWS_LINK_FLAGS} CACHE
STRING "")
endif()
-foreach(target
@@ -28,6 +28,19 @@ if (CMAKE_SOURCE_DIR STREQUAL CMAKE_CURRENT_SOURCE_DIR)
if (NOT LLVM_RUNTIMES_BUILD)
load_llvm_config()
endif()
+ if(LLVM_ENABLE_PER_TARGET_RUNTIME_DIR AND NOT APPLE)
wzssyqa wrote:
With my patch, `libclang_rt.builtin` has been
@@ -181,6 +181,20 @@ message(STATUS "LLVM default target triple:
${LLVM_DEFAULT_TARGET_TRIPLE}")
set(LLVM_TARGET_TRIPLE "${LLVM_DEFAULT_TARGET_TRIPLE}")
+if(LLVM_ENABLE_PER_TARGET_RUNTIME_DIR AND NOT APPLE)
+ set(print_target_triple ${CMAKE_CXX_COMPILER}
@@ -656,19 +656,29 @@ std::string ToolChain::getCompilerRT(const ArgList ,
StringRef Component,
// Check for runtime files in the new layout without the architecture first.
std::string CRTBasename =
buildCompilerRTBasename(Args, Component, Type, /*AddArch=*/false);
@@ -1149,6 +1149,13 @@ std::string Triple::normalize(StringRef Str) {
}
}
+ // For 3-component triples, the middle component is used to set Vendor;
+ // while if it is "none", we'd prefer to set OS.
+ // This is for some baremetal cases, such as "arm-none-elf".
+ if
wzssyqa wrote:
> I've just posted an RFC to discourse about how to handle triple
> normalization:
> https://discourse.llvm.org/t/rfc-baremetal-target-triple-normalization/78524
We don't need to revert https://github.com/llvm/llvm-project/pull/89234
It is easy to fix `Triple::normalize` once
wzssyqa wrote:
Will the contents of `empty.asm` correct if `lib//clang_rt.profile.lib`
doesn't exist?
I mean, will `empty.asm` contains `/DEFAULTLIB:clang_rt.profile-x86_64.lib`
then?
https://github.com/llvm/llvm-project/pull/87866
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>From a40bf92dcdaa64c2ca73d9276972c8cd47750210 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Tue, 23 Apr 2024 01:36:17 +0800
Subject: [PATCH] Triple::normalize: Set OS for 3-component triple with none as
https://github.com/wzssyqa edited
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wzssyqa wrote:
@llvm/pr-subscribers-backend-arm @llvm/pr-subscribers-backend-aarch64
https://github.com/llvm/llvm-project/pull/89638
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wzssyqa wrote:
@peterwaller-arm Ohh, there is so many `-none-unknown-` in current code. I
guess it may be widely used.
Do we really want to change all of them?
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>From 11ae27aeb512b661a3423a8b92642a9ec08ca6a1 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Tue, 23 Apr 2024 01:36:17 +0800
Subject: [PATCH] Triple::normalize: Set OS for 3-component triple with none as
wzssyqa wrote:
>
> Sure. The motivation on our side is a distributed compile service where the
> library doesn't exist on the remote end. This patch means we'll have to add
> knowledge about path layouts at link time to the remote setup at compile
> time. That's certainly doable, but kind of
wzssyqa wrote:
9f43a41db37253685c5ed428c215528eb92bbd43
1693009679313282afbed38778dd3fad62641e1b
Landed as the above commits.
https://github.com/llvm/llvm-project/pull/88661
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https://github.com/llvm/llvm-project/pull/88661
Follow-up to #81037.
ToolChain::LibraryPaths holds the new compiler-rt library directory (e.g.
`/tmp/Debug/lib/clang/19/lib/x86_64-unknown-linux-gnu`). However, it might be
empty when the directory does not
wzssyqa wrote:
New PR with my resource-dir patch:
https://github.com/llvm/llvm-project/pull/88661
https://github.com/llvm/llvm-project/pull/87866
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wzssyqa wrote:
See: https://github.com/llvm/llvm-project/pull/87866
Can you have a try to add an extra option
```
-resource-dir=%S/Inputs/resource_dir
```
https://github.com/llvm/llvm-project/pull/87866
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wzssyqa wrote:
@aeubanks The problem is that in your configure, the libclang_rt is please in
`/lib/clang/19/lib/linux/libclang_rt.builtins-arm-android.a`, instead
of
`/lib/clang/19/lib/arm-unknown-linux-android/libclang_rt.builtins.a`.
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wzssyqa wrote:
Blocked by https://github.com/llvm/llvm-project/pull/89638
https://github.com/llvm/llvm-project/pull/90313
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>From aafa018b3d7657483738fa91812e3e8bbdd8205a Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024 10:55:38 +0800
Subject: [PATCH] Triple::normalize: Use none as OS for XX-none-ABI
When we parse
https://github.com/wzssyqa ready_for_review
https://github.com/llvm/llvm-project/pull/89638
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https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/90313
https://discourse.llvm.org/t/rfc-baremetal-target-triple-normalization/78524
See: PR#89638.
>From 28b918f8a67381cd568c85bae77af517091a32b4 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024
https://github.com/wzssyqa edited
https://github.com/llvm/llvm-project/pull/89638
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wzssyqa wrote:
Configure cmd
```
cmake ../llvm -G Ninja -DLLVM_DEFAULT_TARGET_TRIPLE=aarch64-linux-gnu
-DLLVM_USE_LINKER=lld -DLLVM_ENABLE_RUNTIMES="compiler-rt;libunwind"
-DLLVM_ENABLE_PROJECTS="mlir;clang;clang-tools-extra;lld"
-DCMAKE_C_COMPILER=clang -DCMAKE_CXX_COMPILER=clang++
wzssyqa wrote:
> > @aeubanks The problem is that in your configure, the libclang_rt is placed
> > in `/lib/clang/19/lib/linux/libclang_rt.builtins-arm-android.a`,
> > instead of
> > `/lib/clang/19/lib/arm-unknown-linux-android/libclang_rt.builtins.a`.
>
> The point is that both locations
wzssyqa wrote:
> It's better to do some normalization in CMake.
I will try to work in CMake, then.
https://github.com/llvm/llvm-project/pull/88334
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https://github.com/wzssyqa updated
https://github.com/llvm/llvm-project/pull/89638
>From aafa018b3d7657483738fa91812e3e8bbdd8205a Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024 10:55:38 +0800
Subject: [PATCH 1/2] Triple::normalize: Use none as OS for XX-none-ABI
When we
wzssyqa wrote:
@peterwaller-arm half-done. Do *NOT* merge it now. It has still some problem.
See `clang/test/Driver/baremetal-multilib.yaml`.
There is still some `none-unknown`.
https://github.com/llvm/llvm-project/pull/89638
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wzssyqa wrote:
LGTM.
https://github.com/llvm/llvm-project/pull/89638
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wzssyqa wrote:
LGTM.
https://github.com/llvm/llvm-project/pull/90734
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https://github.com/wzssyqa closed
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https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/91949
MSA requires -mfp64. If FP64 is supported by CPU (mips32r2+), and no
-mfp32/-mfpxx is explicitly given, let's add +fp64. Otherwise some cmd like
clang --target=mips -mips32r5 -mmsa
will issue LLVM backend
https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/91968
The option pairs include:
-mfpxx -mips1
-msoft-float -mmsa
-mmsa -mabi=32 with 32bit pre-R2 CPUs
-mfpxx -mmsa
-mfp32 -mmsa
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