[PATCH] D136239: [testcase] [OpenMP] Fix the testcase error of check-all when DCLANG_DEFAULT_OPENMP_RUNTIME is not libomp

2022-10-19 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu created this revision. zixuan-wu added reviewers: jdoerfert, MaskRay. Herald added subscribers: StephenFan, arphaman, guansong, yaxunl. Herald added a project: All. zixuan-wu requested review of this revision. Herald added subscribers: cfe-commits, sstefan1. Herald added a project:

[PATCH] D136239: [testcase] [OpenMP] Fix the testcase error of check-all when DCLANG_DEFAULT_OPENMP_RUNTIME is not libomp

2022-10-19 Thread Zixuan Wu via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG55c2137939d8: [testcase][OpenMP] Fix the testcase error of check-all when… (authored by zixuan-wu). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D70401: [RISCV] Complete RV32E/ilp32e implementation

2022-10-17 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:411 // implemented such that the stack will always be 16 byte aligned. unsigned LibCallFrameSize = alignTo((STI.getXLen() / 8) * LibCallRegs, 16);

[PATCH] D129824: [RISCV] Set triple based on -march flag which can be deduced in more generic way

2022-09-15 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. AFAIK, --target is clang-specific and transparent for compiler user in RV side. -m is also undefined or less used by RV user. It just uses -march to specify 32 or 64 mode and extensions. Is the convention specified in RV Spec? CHANGES SINCE LAST ACTION

[PATCH] D121445: [Clang][CSKY] Add the CSKY target and compiler driver

2022-10-07 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D121445#3824657 , @MaskRay wrote: > mips computed sysroot from GCCInstallation very early in 2013 > rG08450bd55ccdc4aee4f5f73cde97e25b3c4ce5b9 > and >

[PATCH] D134454: [Driver][Distro] Fix ArchLinux sysroot detection

2022-10-07 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. It's fine for CSKY to use config file. I only have 2 points. 1. I agree sysroot should be separated from GCC because sysroot is not dependent to GCC and there is even not gcc when we use llvm runtime. This rule should also apply to multilib logic. Sysroot can detect

[PATCH] D70401: [RISCV] Complete RV32E/ilp32e implementation

2022-10-10 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:106 +for (size_t Reg = RISCV::X16; Reg <= RISCV::X31; Reg++) + markSuperRegs(Reserved, Reg); + I am wondering whether we need construct another new RegisterClass

[PATCH] D116735: [RISCV] Adjust RISCV data layout by using n32:64 in layout string

2022-10-13 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D116735#3429850 , @craig.topper wrote: > I'm seeing a regression on 401.bzip2 and possibly 471.astar. And I'm not > seeing large improvements on 471.omnetpp or 483.xalancbmk. LGTM. But do you still get regression on spec?

[PATCH] D63329: Allow static linking of libc++ on Linux, just like -static-libstdc++

2022-08-03 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Herald added a subscriber: MaskRay. Herald added a project: All. Is this going to continue? And also if we use libunwind to handle EH, then it uses dladdr function which need link libdl. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D129824: [RISCV] Set triple based on -march flag which can be deduced in more generic way

2022-08-07 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D129824#3699911 , @kito-cheng wrote: > Just realized the problem is trying to fixed the default value of `-mabi=`, > currently `clang -target riscv32-elf -march=rv64gc > -mabi=lp64d`/`riscv32-elf-clang -march=rv64gc

[PATCH] D93138: Add initial support for multilibs in Baremetal toolchain.

2022-07-31 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/lib/Driver/ToolChains/BareMetal.cpp:177 if (!getDriver().SysRoot.empty()) -return getDriver().SysRoot; +return getDriver().SysRoot + SelectedMultilib.osSuffix(); abidh wrote: > zixuan-wu wrote: > >

[PATCH] D129824: [RISCV] Set triple based on -march flag which can be deduced in more generic way

2022-08-08 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D129824#3706654 , @asb wrote: > @zixuan-wu we discussed this a bit in the last community sync call > . > One aspect that makes this patch a

[PATCH] D129824: [RISCV] Set triple based on -march flag which can be deduced in more generic way

2022-08-08 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/test/Driver/riscv-arch.c:410 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64-TARGET %s +// RUN: %clang --target=riscv32-unknown-elf -mcpu=sifive-s21 -### %s \ +// RUN: -fsyntax-only 2>&1 | FileCheck

[PATCH] D137838: [Support] Move TargetParsers to new component

2022-12-28 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: llvm/include/llvm/Support/RISCVISAInfo.h:10 +/// \file +/// This header is deprecated in favour of `llvm/Support/RISCVISAInfo.h`. +/// I think there is a typo that should be 'in favour of

[PATCH] D129824: [RISCV] Set triple based on -march flag which can be deduced in more generic way

2022-11-22 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Ping.. Do we still prefer to specify target triple explicitly to make a check? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D129824/new/ https://reviews.llvm.org/D129824 ___ cfe-commits mailing list

[PATCH] D141899: [IR][X86] Remove X86AMX type in LLVM IR instead of target extension

2023-01-17 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D141899#4058173 , @LuoYuanke wrote: > @zixuan-wu, changing x86_amx would break our internal code. May I know the > motivation to change the type? The background is at https://reviews.llvm.org/D135202. No more motivation,

[PATCH] D141899: [IR][X86] Remove X86AMX type in LLVM IR instead of target extension

2023-01-17 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. With considering https://llvm.org/docs/DeveloperPolicy.html#ir-backwards-compatibility I think we need make consensus to choose one option from following 2 options. 1. Remove X86amx type in IR totally. (what I am doing now) 2. Without removing X86amx type in IR, just

[PATCH] D141899: [IR][X86] Remove X86AMX type in LLVM IR instead of target extension

2023-02-21 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D141899#4065375 , @nikic wrote: > In D141899#4061237 , @zixuan-wu > wrote: > >> With considering >> https://llvm.org/docs/DeveloperPolicy.html#ir-backwards-compatibility I >>

[PATCH] D70401: [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs

2023-07-07 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:908 static const MCPhysReg CSRegs[] = { RISCV::X1, /* ra */ RISCV::X5, RISCV::X6, RISCV::X7, /* t0-t2 */ Hi, @wangpc it's hidden bug

[PATCH] D70401: [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs

2023-07-07 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:66 return CSR_XLEN_F32_Interrupt_SaveList; return CSR_Interrupt_SaveList; } Here also need adjust for rve. Repository: rG LLVM Github Monorepo CHANGES

[PATCH] D142388: [clang] Add builtin_nondeterministic_value

2023-06-04 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/test/CodeGen/builtins-nondeterministic-value.c:26 +// CHECK-LABEL: entry +// CHECK: [[A:%.*]] = alloca double, align 8 +// CHECK: store double [[X:%.*]], ptr [[A]], align 8 hi, @ManuelJBrito , because double is

[PATCH] D148206: [clang] Do not crash after suggesting typo correction to constexpr if condition

2023-05-22 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/test/SemaCXX/invalid-if-constexpr.cpp:7 +} +void a() { if constexpr (__adl_swap<>) {}} // expected-error{{use of undeclared identifier '__adl_swap'; did you mean '__sync_swap'?}} \ + //

[PATCH] D142388: [clang] Add builtin_nondeterministic_value

2023-06-11 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/test/CodeGen/builtins-nondeterministic-value.c:26 +// CHECK-LABEL: entry +// CHECK: [[A:%.*]] = alloca double, align 8 +// CHECK: store double [[X:%.*]], ptr [[A]], align 8 ManuelJBrito wrote: > zixuan-wu wrote:

[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'

2023-08-01 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: llvm/test/CodeGen/CSKY/intrinsic.ll:21 +entry: + %ntz = call i32 @llvm.cttz.i32(i32 %x, i1 1) + ret i32 %ntz I think we can also test the condition that the second argument is zero. CHANGES SINCE LAST ACTION

[PATCH] D149017: [RISCV] Rewrite all found class-based subroutines to functions

2023-08-11 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Is it going to commit? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D149017/new/ https://reviews.llvm.org/D149017 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D156363: [Driver] -###: exit with code 1 if hasErrorOccurred

2023-08-09 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/test/Driver/debug-options.c:245 // // RUN: %clang -### -c -gsplit-dwarf -g -gno-pubnames %s 2>&1 | FileCheck -check-prefix=NOPUB %s // Here should add not or specify the target with x86 because it fails when

[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'

2023-07-28 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/test/CodeGen/CSKY/csky-builtins.c:1 +// RUN: %clang_cc1 -triple csky -emit-llvm -o - %s | FileCheck %s + benshi001 wrote: > This file is pure test, has nothing to do with `llvm.cttz`, just to avoid > another

[PATCH] D153111: [clang][Serialization][RISCV] Increase the number of reserved predefined type IDs

2023-06-19 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. I also caught this issue. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D153111/new/ https://reviews.llvm.org/D153111 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D152570: [clang] Apply -fmacro-prefix-map to anonymous tags in template arguments

2023-06-19 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Hi, Comment at: clang/test/CodeGenCXX/macro-prefix-map-lambda.cpp:11 + auto *s = lambdatest([](){}); +// CHECK: @"__PRETTY_FUNCTION__._Z10lambdatestIZ4mainE3$_0EDaOT_" = private unnamed_addr constant [{{[0-9]+}} x i8] c"auto lambdatest(f &&) [f =

[PATCH] D153674: [dataflow] Disallow implicit copy of Environment, use fork() instead

2023-06-29 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D153674#4461195 , @sammccall wrote: > Sorry about the delay, and thanks for the `.i`. > > It took me a while to work out what was going on, but it looks like it's just > a bug where GCC forgets to automatic-move. > Fixed in

[PATCH] D153674: [dataflow] Disallow implicit copy of Environment, use fork() instead

2023-06-27 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Hi, there is a compiling error introduced recently as like following when files under clang/lib/Analysis/FlowSensitive/ are being compiled such as TypeErasedDataflowAnalysis.cpp and Transfer.cpp. Does anybody meet also? > from /usr/include/c++/7/functional:60, >

[PATCH] D151397: [3/3][RISCV][POC] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd, vasub

2023-06-27 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/include/clang/Basic/riscv_vector.td:1734 + __RISCV_VXRM_RDN = 2, + __RISCV_VXRM_ROD = 3, +}; I am wondering if we need a dynamic mode enum which representing using current vxrm value? Repository: rG LLVM

[PATCH] D153674: [dataflow] Disallow implicit copy of Environment, use fork() instead

2023-06-28 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D153674#4455357 , @sammccall wrote: > Hi, sorry about that - are you able to provide a full log, or link to a > failing bot? > That error message doesn't show where in the LLVM code the error occurs. It can pass with gcc 8.

[PATCH] D129824: [RISCV] Set triple based on -march flag which can be deduced in more generic way

2023-05-17 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu abandoned this revision. zixuan-wu added a comment. Herald added subscribers: jobnoorman, luke. As this issue is solved at https://reviews.llvm.org/D148124, abandon this revision. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D129824/new/ https://reviews.llvm.org/D129824

[PATCH] D148124: [RISCV][Driver] Allow the use of CPUs with a different XLEN than the triple.

2023-05-17 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Thx. It has solved the issue D129824 . Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D148124/new/ https://reviews.llvm.org/D148124 ___

<    1   2