[PATCH] D150867: [AArch64][FMV] Prevent target attribute using for multiversioning.

2023-09-06 Thread Allen zhong via Phabricator via cfe-commits
Allen added inline comments. Comment at: clang/lib/Sema/SemaDecl.cpp:11544 + // Target attribute on AArch64 is not used for multiversioning + if (NewTA && S.getASTContext().getTargetInfo().getTriple().isAArch64()) +return false; I find the attribute

[PATCH] D72820: [FPEnv] Add pragma FP_CONTRACT support under strict FP.

2023-02-27 Thread Allen zhong via Phabricator via cfe-commits
Allen added inline comments. Herald added a project: All. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:3386 +FMulAdd = Builder.CreateConstrainedFPCall( +CGF.CGM.getIntrinsic(llvm::Intrinsic::experimental_constrained_fmuladd, +

[PATCH] D144704: [SVE] Add intrinsics for uniform dsp operations that explicitly undefine the result for inactive lanes.

2023-02-27 Thread Allen zhong via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGec67d703cfb0: [SVE] Add intrinsics for uniform dsp operations that explicitly undefine theā€¦ (authored by dewen, committed by Allen). Herald added a

[PATCH] D70253: [AArch64][SVE2] Implement remaining SVE2 floating-point intrinsics

2022-12-07 Thread Allen zhong via Phabricator via cfe-commits
Allen added inline comments. Herald added a project: All. Comment at: llvm/test/CodeGen/AArch64/sve2-intrinsics-fp-int-binary-logarithm.ll:31 +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.flogb.nxv2f64( %a, +

[PATCH] D136311: [CUDA,NVPTX] Implement __bf16 support for NVPTX.

2022-10-25 Thread Allen zhong via Phabricator via cfe-commits
Allen added inline comments. Comment at: llvm/lib/Target/NVPTX/NVPTXInstrInfo.td:186 + !eq(name, "v2f16"): Float16x2Regs, + !eq(name, "bf16"): Float16Regs, + !eq(name, "v2bf16"): Float16x2Regs, tra wrote: > tra wrote: > > Allen wrote: > > > sorry for

[PATCH] D136311: [CUDA,NVPTX] Implement __bf16 support for NVPTX.

2022-10-25 Thread Allen zhong via Phabricator via cfe-commits
Allen added inline comments. Comment at: llvm/lib/Target/NVPTX/NVPTXInstrInfo.td:186 + !eq(name, "v2f16"): Float16x2Regs, + !eq(name, "bf16"): Float16Regs, + !eq(name, "v2bf16"): Float16x2Regs, sorry for a basic question: what's the different between

[PATCH] D93793: [IR] Let IRBuilder's CreateVectorSplat/CreateShuffleVector use poison as placeholder

2022-01-05 Thread Allen zhong via Phabricator via cfe-commits
Allen added a comment. I have a babyism question, why poison is preferred to the undef in the pattern ConstantVector::getSplat ? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D93793/new/ https://reviews.llvm.org/D93793