[PATCH] D85917: [MSP430] Fix passing C structs and unions as function arguments

2023-07-21 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl added a comment.

In D85917#4523503 , @arsenm wrote:

> Is there a reason this never landed?

Good question. @atrosinenko ?


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[PATCH] D116351: Update Bug report URL to Github Issues

2021-12-29 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl requested changes to this revision.
asl added a comment.
This revision now requires changes to proceed.

Will you please check the comments and reword everything using proper 
terminology and new things we're having on GitHub?




Comment at: clang/www/c_status.html:76
+The https://bugs.llvm.org/";>LLVM bug tracker and 
+https://github.com/llvm/llvm-project/issues/";>LLVM Issues contain
+a Clang C component that tracks known bugs with Clang's language

asl wrote:
> The component got mapped to dedicated label in GitHub. So, it will be great 
> to get rid of bugzilla-centric definition and switch to GitHub terms
As I said – there is no "Clang C component" in github. We need to reword 
everything in terms of labels and mention correct label here.



Comment at: clang/www/cxx_status.html:81
+https://github.com/llvm/llvm-project/issues/";>LLVM Issues contain
+Clang C++ components that track known bugs with Clang's language conformance in
 each language mode.

asl wrote:
> Ditto. Also, there are separate labels for C++11 / 14 / 20 / 23. It might 
> make sense to mention them here
See above


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[PATCH] D116351: Update Bug report URL to Github Issues

2021-12-29 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl requested changes to this revision.
asl added a subscriber: tstellar.
asl added a comment.
This revision now requires changes to proceed.

Thanks for doing this! I added few notes on the way.




Comment at: clang/www/c_status.html:76
+The https://bugs.llvm.org/";>LLVM bug tracker and 
+https://github.com/llvm/llvm-project/issues/";>LLVM Issues contain
+a Clang C component that tracks known bugs with Clang's language

The component got mapped to dedicated label in GitHub. So, it will be great to 
get rid of bugzilla-centric definition and switch to GitHub terms



Comment at: clang/www/cxx_status.html:81
+https://github.com/llvm/llvm-project/issues/";>LLVM Issues contain
+Clang C++ components that track known bugs with Clang's language conformance in
 each language mode.

Ditto. Also, there are separate labels for C++11 / 14 / 20 / 23. It might make 
sense to mention them here



Comment at: clang/www/get_involved.html:69
+href="https://bugs.llvm.org/";>Bugzilla bug database or https://github.com/llvm/llvm-project/issues/";>LLVM Issues.
 

I think it would make sense to get rid of bz here. For new contributors 
everything should be GitHub-centric



Comment at: libcxx/docs/index.rst:220
 * `libc++abi Homepage `_
 * `LLVM Bugzilla `_
+* `LLVM Issues `_

I'd remove bugzilla here



Comment at: libunwind/docs/index.rst:101
 * `LLVM Homepage `_
 * `LLVM Bugzilla `_
+* `LLVM Issues `_

And here



Comment at: llvm/docs/HowToReleaseLLVM.rst:280
 
+.. FIXME: Edit for LLVM Issues in Github.
 .. _bug: https://bugs.llvm.org/

This is for @tstellar :)


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[PATCH] D108301: [MSP430][Clang] Update hard-coded MCU data

2021-09-28 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl requested changes to this revision.
asl added a comment.
This revision now requires changes to proceed.

Please see comments inline




Comment at: clang/lib/Driver/ToolChains/MSP430.cpp:43
+/// std::lower_bound is used to perform an efficient binary search on the data.
+static MCUData loadMCUData(const StringRef MCU) {
+  const MCUData MSP430MCUData[612] = {

maybe it would be better to use `get` instead of `load` here?



Comment at: clang/lib/Driver/ToolChains/MSP430.cpp:77
+static void processHWMultFeatures(const Driver &D, const ArgList &Args,
+  std::vector &Features,
+  StringRef SupportedHWMult) {

`Features` is effectively an output argument here. Can it be last argument? 
Maybe it would be better to name `addHWMultFeatures`, overall the function just 
adds them and do not touch existing things in the `Features` vector?



Comment at: clang/lib/Driver/ToolChains/MSP430.cpp:110
 
-  if (MCU && SupportedHWMult == "none")
-D.Diag(clang::diag::warn_drv_msp430_hwmult_unsupported) << HWMult;
-  if (MCU && HWMult != SupportedHWMult)
-D.Diag(clang::diag::warn_drv_msp430_hwmult_mismatch)
-<< SupportedHWMult << HWMult;
-
-  if (HWMult == "16bit") {
-// '16bit' - for 16-bit only hw multiplier.
+  if (HWMult == "16bit")
 Features.push_back("+hwmult16");

StringSwitch?



Comment at: clang/lib/Driver/ToolChains/MSP430.cpp:44
+static MCUData loadMCUData(const StringRef MCU) {
+  const MCUData MSP430MCUData[612] = {
+#define MSP430_MCU(NAME, CPU, HWMULT) {(NAME), (CPU), (HWMULT)},

Can we simply use `MSP430MCUData[]` here in order not to fix multiple places 
when new MCU is added?



Comment at: clang/lib/Driver/ToolChains/MSP430.cpp:47
 #include "clang/Basic/MSP430Target.def"
-  .Default("none");
-}
+  };
 

I'd also #undef here for the sake of not polluting everything with extra macros


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[PATCH] D108299: [MSP430][Clang] Remove support for -mmcu=msp430

2021-09-28 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGbe610932fa06: [MSP430][Clang] Remove support for 
-mmcu=msp430 (authored by jozefl, committed by asl).

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Files:
  clang/include/clang/Basic/MSP430Target.def
  clang/test/Driver/msp430-mmcu.c


Index: clang/test/Driver/msp430-mmcu.c
===
--- clang/test/Driver/msp430-mmcu.c
+++ clang/test/Driver/msp430-mmcu.c
@@ -14,3 +14,9 @@
 // RUN:   | FileCheck -check-prefix=MSP430-UNSUP %s
 
 // MSP430-UNSUP: error: the clang compiler does not support 'not-a-mcu'
+
+// The generic MCU name "msp430" is not supported.
+// RUN: %clang %s -### -no-canonical-prefixes -target msp430 -mmcu=msp430 2>&1 
\
+// RUN:   | FileCheck -check-prefix=MSP430 %s
+
+// MSP430: error: the clang compiler does not support 'msp430'
Index: clang/include/clang/Basic/MSP430Target.def
===
--- clang/include/clang/Basic/MSP430Target.def
+++ clang/include/clang/Basic/MSP430Target.def
@@ -238,8 +238,7 @@
 MSP430_MCU_FEAT("msp430f4784", "32bit")
 MSP430_MCU_FEAT("msp430f4794", "32bit")
 
-// Generic MSUs
-MSP430_MCU("msp430")
+// Generic MCUs
 MSP430_MCU("msp430i2xxgeneric")
 
 #undef MSP430_MCU


Index: clang/test/Driver/msp430-mmcu.c
===
--- clang/test/Driver/msp430-mmcu.c
+++ clang/test/Driver/msp430-mmcu.c
@@ -14,3 +14,9 @@
 // RUN:   | FileCheck -check-prefix=MSP430-UNSUP %s
 
 // MSP430-UNSUP: error: the clang compiler does not support 'not-a-mcu'
+
+// The generic MCU name "msp430" is not supported.
+// RUN: %clang %s -### -no-canonical-prefixes -target msp430 -mmcu=msp430 2>&1 \
+// RUN:   | FileCheck -check-prefix=MSP430 %s
+
+// MSP430: error: the clang compiler does not support 'msp430'
Index: clang/include/clang/Basic/MSP430Target.def
===
--- clang/include/clang/Basic/MSP430Target.def
+++ clang/include/clang/Basic/MSP430Target.def
@@ -238,8 +238,7 @@
 MSP430_MCU_FEAT("msp430f4784", "32bit")
 MSP430_MCU_FEAT("msp430f4794", "32bit")
 
-// Generic MSUs
-MSP430_MCU("msp430")
+// Generic MCUs
 MSP430_MCU("msp430i2xxgeneric")
 
 #undef MSP430_MCU
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[PATCH] D108299: [MSP430][Clang] Remove support for -mmcu=msp430

2021-09-28 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl accepted this revision.
asl added a comment.
This revision is now accepted and ready to land.

LGTM, thanks!


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[PATCH] D98494: [NFC] Minor cleanup to use default setting of getLastArg()

2021-03-18 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl added a comment.

Indeed! And even worse, there is another 'A' shadowing definition below :)


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[PATCH] D98493: [WoA][MSVC] Use default linker setting in MSVC-compatible driver

2021-03-17 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl accepted this revision.
asl added a comment.
This revision is now accepted and ready to land.

LGTM, thanks!


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[PATCH] D98493: [WoA][MSVC] Use default linker setting in MSVC-compatible driver

2021-03-17 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl added inline comments.



Comment at: clang/lib/Driver/ToolChains/MSVC.cpp:582
+  StringRef Linker = Args.getLastArgValue(options::OPT_fuse_ld_EQ,
+ CLANG_DEFAULT_LINKER);
+  if (Linker.empty())

How is CLANG_DEFAULT_LINKER initialized by default? Is it just empty?


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[PATCH] D98494: [NFC] Minor cleanup to use default setting of getLastArg()

2021-03-17 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl accepted this revision.
asl added a comment.
This revision is now accepted and ready to land.

Looks trivial enough for post-commit review :)


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[PATCH] D82646: [MSP430] Align the _Complex ABI with current msp430-gcc

2020-07-08 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl accepted this revision.
asl added a comment.
This revision is now accepted and ready to land.

LGTM, thanks!


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[PATCH] D82646: [MSP430] Align the _Complex ABI with current msp430-gcc

2020-07-08 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl added inline comments.



Comment at: clang/test/CodeGen/msp430-abi-complex.c:8
+
+void complex_float_arg_first(float _Complex x, int n) {
+// CHECK-LABEL: @complex_float_arg_first

What's about Complex Int?


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[PATCH] D81285: [builtins] Change si_int to int in some helper declarations

2020-06-30 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rG0ee439b705e8: [builtins] Change si_int to int in some helper 
declarations (authored by atrosinenko, committed by asl).

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Files:
  compiler-rt/lib/builtins/README.txt
  compiler-rt/lib/builtins/clzdi2.c
  compiler-rt/lib/builtins/clzsi2.c
  compiler-rt/lib/builtins/clzti2.c
  compiler-rt/lib/builtins/ctzdi2.c
  compiler-rt/lib/builtins/ctzsi2.c
  compiler-rt/lib/builtins/ctzti2.c
  compiler-rt/lib/builtins/ffsti2.c
  compiler-rt/lib/builtins/int_lib.h
  compiler-rt/lib/builtins/paritydi2.c
  compiler-rt/lib/builtins/paritysi2.c
  compiler-rt/lib/builtins/parityti2.c
  compiler-rt/lib/builtins/popcountsi2.c
  compiler-rt/lib/builtins/popcountti2.c
  compiler-rt/lib/builtins/powidf2.c
  compiler-rt/lib/builtins/powisf2.c
  compiler-rt/lib/builtins/powitf2.c
  compiler-rt/lib/builtins/powixf2.c
  compiler-rt/test/builtins/Unit/clzdi2_test.c
  compiler-rt/test/builtins/Unit/clzsi2_test.c
  compiler-rt/test/builtins/Unit/clzti2_test.c
  compiler-rt/test/builtins/Unit/ctzsi2_test.c
  compiler-rt/test/builtins/Unit/ctzti2_test.c
  compiler-rt/test/builtins/Unit/ffsti2_test.c
  compiler-rt/test/builtins/Unit/paritydi2_test.c
  compiler-rt/test/builtins/Unit/paritysi2_test.c
  compiler-rt/test/builtins/Unit/parityti2_test.c
  compiler-rt/test/builtins/Unit/popcountsi2_test.c
  compiler-rt/test/builtins/Unit/popcountti2_test.c
  compiler-rt/test/builtins/Unit/powidf2_test.c
  compiler-rt/test/builtins/Unit/powisf2_test.c
  compiler-rt/test/builtins/Unit/powitf2_test.c
  compiler-rt/test/builtins/Unit/powixf2_test.c

Index: compiler-rt/test/builtins/Unit/powixf2_test.c
===
--- compiler-rt/test/builtins/Unit/powixf2_test.c
+++ compiler-rt/test/builtins/Unit/powixf2_test.c
@@ -11,9 +11,9 @@
 
 // Returns: a ^ b
 
-COMPILER_RT_ABI long double __powixf2(long double a, si_int b);
+COMPILER_RT_ABI long double __powixf2(long double a, int b);
 
-int test__powixf2(long double a, si_int b, long double expected)
+int test__powixf2(long double a, int b, long double expected)
 {
 long double x = __powixf2(a, b);
 int correct = (x == expected) && (signbit(x) == signbit(expected));
@@ -58,9 +58,9 @@
 return 1;
 if (test__powixf2(0, 4, 0))
 return 1;
-if (test__powixf2(0, 0x7FFE, 0))
+if (test__powixf2(0, INT_MAX - 1, 0))
 return 1;
-if (test__powixf2(0, 0x7FFF, 0))
+if (test__powixf2(0, INT_MAX, 0))
 return 1;
 
 if (test__powixf2(-0., 1, -0.))
@@ -71,9 +71,9 @@
 return 1;
 if (test__powixf2(-0., 4, 0))
 return 1;
-if (test__powixf2(-0., 0x7FFE, 0))
+if (test__powixf2(-0., INT_MAX - 1, 0))
 return 1;
-if (test__powixf2(-0., 0x7FFF, -0.))
+if (test__powixf2(-0., INT_MAX, -0.))
 return 1;
 
 if (test__powixf2(1, 1, 1))
@@ -84,9 +84,9 @@
 return 1;
 if (test__powixf2(1, 4, 1))
 return 1;
-if (test__powixf2(1, 0x7FFE, 1))
+if (test__powixf2(1, INT_MAX - 1, 1))
 return 1;
-if (test__powixf2(1, 0x7FFF, 1))
+if (test__powixf2(1, INT_MAX, 1))
 return 1;
 
 if (test__powixf2(INFINITY, 1, INFINITY))
@@ -97,9 +97,9 @@
 return 1;
 if (test__powixf2(INFINITY, 4, INFINITY))
 return 1;
-if (test__powixf2(INFINITY, 0x7FFE, INFINITY))
+if (test__powixf2(INFINITY, INT_MAX - 1, INFINITY))
 return 1;
-if (test__powixf2(INFINITY, 0x7FFF, INFINITY))
+if (test__powixf2(INFINITY, INT_MAX, INFINITY))
 return 1;
 
 if (test__powixf2(-INFINITY, 1, -INFINITY))
@@ -110,9 +110,9 @@
 return 1;
 if (test__powixf2(-INFINITY, 4, INFINITY))
 return 1;
-if (test__powixf2(-INFINITY, 0x7FFE, INFINITY))
+if (test__powixf2(-INFINITY, INT_MAX - 1, INFINITY))
 return 1;
-if (test__powixf2(-INFINITY, 0x7FFF, -INFINITY))
+if (test__powixf2(-INFINITY, INT_MAX, -INFINITY))
 return 1;
 
 if (test__powixf2(0, -1, INFINITY))
@@ -123,11 +123,11 @@
 return 1;
 if (test__powixf2(0, -4, INFINITY))
 return 1;
-if (test__powixf2(0, 0x8002, INFINITY))
+if (test__powixf2(0, INT_MIN + 2, INFINITY))
 return 1;
-if (test__powixf2(0, 0x8001, INFINITY))
+if (test__powixf2(0, INT_MIN + 1, INFINITY))
 return 1;
-if (test__powixf2(0, 0x8000, INFINITY))
+if (test__powixf2(0, INT_MIN, INFINITY))
 return 1;
 
 if (test__powixf2(-0., -1, -INFINITY))
@@ -138,11 +138,11 @@
 return 1;
 if (test__powixf2(-0., -4, INFINITY))
 return 1;
-if (test__powixf2(-0., 0x8002, INFINITY))
+if (test__powixf2(-0., INT_MIN + 2, INFINITY))
 return 1;
-if (test__powixf2(-0., 0x80

[PATCH] D81408: [builtins] Improve compatibility with 16 bit targets

2020-06-26 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGa4e8f7fe3f38: [builtins] Improve compatibility with 16 bit 
targets (authored by atrosinenko, committed by asl).

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Files:
  compiler-rt/lib/builtins/floatdidf.c
  compiler-rt/lib/builtins/floatundidf.c
  compiler-rt/lib/builtins/fp_lib.h


Index: compiler-rt/lib/builtins/fp_lib.h
===
--- compiler-rt/lib/builtins/fp_lib.h
+++ compiler-rt/lib/builtins/fp_lib.h
@@ -46,7 +46,7 @@
 #define REP_C UINT32_C
 #define significandBits 23
 
-static __inline int rep_clz(rep_t a) { return __builtin_clz(a); }
+static __inline int rep_clz(rep_t a) { return clzsi(a); }
 
 // 32x32 --> 64 bit multiply
 static __inline void wideMultiply(rep_t a, rep_t b, rep_t *hi, rep_t *lo) {
Index: compiler-rt/lib/builtins/floatundidf.c
===
--- compiler-rt/lib/builtins/floatundidf.c
+++ compiler-rt/lib/builtins/floatundidf.c
@@ -90,7 +90,7 @@
 // a is now rounded to DBL_MANT_DIG bits
   }
   double_bits fb;
-  fb.u.s.high = ((e + 1023) << 20) |  // exponent
+  fb.u.s.high = ((su_int)(e + 1023) << 20) |  // exponent
 ((su_int)(a >> 32) & 0x000F); // mantissa-high
   fb.u.s.low = (su_int)a; // mantissa-low
   return fb.f;
Index: compiler-rt/lib/builtins/floatdidf.c
===
--- compiler-rt/lib/builtins/floatdidf.c
+++ compiler-rt/lib/builtins/floatdidf.c
@@ -87,7 +87,7 @@
   }
   double_bits fb;
   fb.u.s.high = ((su_int)s & 0x8000) |// sign
-((e + 1023) << 20) |  // exponent
+((su_int)(e + 1023) << 20) |  // exponent
 ((su_int)(a >> 32) & 0x000F); // mantissa-high
   fb.u.s.low = (su_int)a; // mantissa-low
   return fb.f;


Index: compiler-rt/lib/builtins/fp_lib.h
===
--- compiler-rt/lib/builtins/fp_lib.h
+++ compiler-rt/lib/builtins/fp_lib.h
@@ -46,7 +46,7 @@
 #define REP_C UINT32_C
 #define significandBits 23
 
-static __inline int rep_clz(rep_t a) { return __builtin_clz(a); }
+static __inline int rep_clz(rep_t a) { return clzsi(a); }
 
 // 32x32 --> 64 bit multiply
 static __inline void wideMultiply(rep_t a, rep_t b, rep_t *hi, rep_t *lo) {
Index: compiler-rt/lib/builtins/floatundidf.c
===
--- compiler-rt/lib/builtins/floatundidf.c
+++ compiler-rt/lib/builtins/floatundidf.c
@@ -90,7 +90,7 @@
 // a is now rounded to DBL_MANT_DIG bits
   }
   double_bits fb;
-  fb.u.s.high = ((e + 1023) << 20) |  // exponent
+  fb.u.s.high = ((su_int)(e + 1023) << 20) |  // exponent
 ((su_int)(a >> 32) & 0x000F); // mantissa-high
   fb.u.s.low = (su_int)a; // mantissa-low
   return fb.f;
Index: compiler-rt/lib/builtins/floatdidf.c
===
--- compiler-rt/lib/builtins/floatdidf.c
+++ compiler-rt/lib/builtins/floatdidf.c
@@ -87,7 +87,7 @@
   }
   double_bits fb;
   fb.u.s.high = ((su_int)s & 0x8000) |// sign
-((e + 1023) << 20) |  // exponent
+((su_int)(e + 1023) << 20) |  // exponent
 ((su_int)(a >> 32) & 0x000F); // mantissa-high
   fb.u.s.low = (su_int)a; // mantissa-low
   return fb.f;
___
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[PATCH] D82184: [MSP430] Update register names

2020-06-26 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGcb56fa2196c5: [MSP430] Update register names (authored by 
atrosinenko, committed by asl).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82184/new/

https://reviews.llvm.org/D82184

Files:
  clang/lib/Basic/Targets/MSP430.h
  clang/test/CodeGen/msp430-register-names.c
  llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
  llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
  llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
  llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
  llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
  llvm/lib/Target/MSP430/MSP430RegisterInfo.td
  llvm/test/CodeGen/MSP430/asm-clobbers.ll
  llvm/test/CodeGen/MSP430/inline-asm-register-names.ll

Index: llvm/test/CodeGen/MSP430/inline-asm-register-names.ll
===
--- /dev/null
+++ llvm/test/CodeGen/MSP430/inline-asm-register-names.ll
@@ -0,0 +1,59 @@
+; RUN: llc < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+
+; Test that correct register names are accepted *inside* inline asm listings.
+; Tested with PUSH instruction since it does not support memory operands.
+
+define void @accepted_rN() nounwind {
+; CHECK-LABEL: accepted_rN
+  call void asm sideeffect "push r0", ""() nounwind
+; CHECK: push r0
+  call void asm sideeffect "push r1", ""() nounwind
+; CHECK: push r1
+  call void asm sideeffect "push r2", ""() nounwind
+; CHECK: push r2
+  call void asm sideeffect "push r3", ""() nounwind
+; CHECK: push r3
+  call void asm sideeffect "push r4", ""() nounwind
+; CHECK: push r4
+  call void asm sideeffect "push r5", ""() nounwind
+; CHECK: push r5
+  call void asm sideeffect "push r6", ""() nounwind
+; CHECK: push r6
+  call void asm sideeffect "push r7", ""() nounwind
+; CHECK: push r7
+  call void asm sideeffect "push r8", ""() nounwind
+; CHECK: push r8
+  call void asm sideeffect "push r9", ""() nounwind
+; CHECK: push r9
+  call void asm sideeffect "push r10", ""() nounwind
+; CHECK: push r10
+  call void asm sideeffect "push r11", ""() nounwind
+; CHECK: push r11
+  call void asm sideeffect "push r12", ""() nounwind
+; CHECK: push r12
+  call void asm sideeffect "push r13", ""() nounwind
+; CHECK: push r13
+  call void asm sideeffect "push r14", ""() nounwind
+; CHECK: push r14
+  call void asm sideeffect "push r15", ""() nounwind
+; CHECK: push r15
+  ret void
+}
+
+define void @accepted_reg_aliases() nounwind {
+; CHECK-LABEL: accepted_reg_aliases
+; Ensure register aliases are renamed as expected
+call void asm sideeffect "push pc", ""() nounwind
+; CHECK: push r0
+call void asm sideeffect "push sp", ""() nounwind
+; CHECK: push r1
+call void asm sideeffect "push sr", ""() nounwind
+; CHECK: push r2
+call void asm sideeffect "push cg", ""() nounwind
+; CHECK: push r3
+call void asm sideeffect "push fp", ""() nounwind
+; CHECK: push r4
+ret void
+}
Index: llvm/test/CodeGen/MSP430/asm-clobbers.ll
===
--- llvm/test/CodeGen/MSP430/asm-clobbers.ll
+++ llvm/test/CodeGen/MSP430/asm-clobbers.ll
@@ -3,9 +3,52 @@
 target datalayout = "e-m:e-p:16:16-i32:16:32-a:16-n8:16"
 target triple = "msp430---elf"
 
-define void @test() {
+define void @test_no_clobber() {
 entry:
-; CHECK-LABEL: test:
+; CHECK-LABEL: test_no_clobber
+; CHECK-NOT: push
+  call void asm sideeffect "", ""()
+; CHECK-NOT: pop
+  ret void
+; CHECK: -- End function
+}
+
+define void @test_1() {
+entry:
+; CHECK-LABEL: test_1:
+; CHECK: push r8
+; CHECK: push r6
+; CHECK: push r4
+  call void asm sideeffect "", "~{r4},~{r6},~{r8}"()
+; CHECK: pop r4
+; CHECK: pop r6
+; CHECK: pop r8
+  ret void
+}
+
+define void @test_2() {
+entry:
+; CHECK-LABEL: test_2:
+; CHECK: push r9
+; CHECK: push r7
+; CHECK: push r5
+  call void asm sideeffect "", "~{r5},~{r7},~{r9}"()
+; CHECK: pop r5
+; CHECK: pop r7
+; CHECK: pop r9
+  ret void
+}
+
+; The r10 register is special because the sequence
+;   pop r10
+;   ret
+; can be replaced with
+;   jmp __mspabi_func_epilog_1
+; or other such function (depending on previous instructions).
+; Still, it is not replaced *yet*.
+define void @test_r10() {
+entry:
+; CHECK-LABEL: test_r10:
 ; CHECK: push r10
   call void asm sideeffect "", "~{r10}"()
 ; CHECK: pop r10
Index: llvm/lib/Target/MSP430/MSP430RegisterInfo.td
===
--- llvm/lib/Target/MSP430/MSP430RegisterInfo.td
+++ llvm/lib/Target/MSP430/MSP430RegisterInfo.td
@@ -36,7 +36,7 @@
 def SPB  : MSP430Reg<1,  "r1", ["sp"]>;
 def SRB  : MSP430Reg<2,  "r2", ["sr"]>;
 def CGB  : MSP430Reg<3,  "r3", ["cg"]>;
-def FPB  : MSP430Reg<4,  "r4", ["fp"]>;
+def R4B  : MSP430Reg<4,  "r4", ["fp"]>;
 def R5B  : MSP430Reg<5,  "r5">;
 def R6B  : MSP430Reg<6,  "r6">;
 def R7B  : MSP430Reg<7,  "r7">;
@@ -56,7 +56

[PATCH] D81282: [builtins] Move more float128-related helpers to GENERIC_TF_SOURCES list

2020-06-25 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGa931ec7ca0ee: [builtins] Move more float128-related helpers 
to GENERIC_TF_SOURCES list (authored by atrosinenko, committed by asl).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81282/new/

https://reviews.llvm.org/D81282

Files:
  compiler-rt/lib/builtins/CMakeLists.txt


Index: compiler-rt/lib/builtins/CMakeLists.txt
===
--- compiler-rt/lib/builtins/CMakeLists.txt
+++ compiler-rt/lib/builtins/CMakeLists.txt
@@ -46,7 +46,6 @@
   absvti2.c
   adddf3.c
   addsf3.c
-  addtf3.c
   addvdi3.c
   addvsi3.c
   addvti3.c
@@ -75,9 +74,7 @@
   divsc3.c
   divsf3.c
   divsi3.c
-  divtc3.c
   divti3.c
-  divtf3.c
   extendsfdf2.c
   extendhfsf2.c
   ffsdi2.c
@@ -123,7 +120,6 @@
   mulsc3.c
   mulsf3.c
   multi3.c
-  multf3.c
   mulvdi3.c
   mulvsi3.c
   mulvti3.c
@@ -143,13 +139,11 @@
   popcountti2.c
   powidf2.c
   powisf2.c
-  powitf2.c
   subdf3.c
   subsf3.c
   subvdi3.c
   subvsi3.c
   subvti3.c
-  subtf3.c
   trampoline_setup.c
   truncdfhf2.c
   truncdfsf2.c
@@ -168,7 +162,10 @@
 )
 
 set(GENERIC_TF_SOURCES
+  addtf3.c
   comparetf2.c
+  divtc3.c
+  divtf3.c
   extenddftf2.c
   extendsftf2.c
   fixtfdi.c
@@ -184,6 +181,9 @@
   floatunsitf.c
   floatuntitf.c
   multc3.c
+  multf3.c
+  powitf2.c
+  subtf3.c
   trunctfdf2.c
   trunctfsf2.c
 )


Index: compiler-rt/lib/builtins/CMakeLists.txt
===
--- compiler-rt/lib/builtins/CMakeLists.txt
+++ compiler-rt/lib/builtins/CMakeLists.txt
@@ -46,7 +46,6 @@
   absvti2.c
   adddf3.c
   addsf3.c
-  addtf3.c
   addvdi3.c
   addvsi3.c
   addvti3.c
@@ -75,9 +74,7 @@
   divsc3.c
   divsf3.c
   divsi3.c
-  divtc3.c
   divti3.c
-  divtf3.c
   extendsfdf2.c
   extendhfsf2.c
   ffsdi2.c
@@ -123,7 +120,6 @@
   mulsc3.c
   mulsf3.c
   multi3.c
-  multf3.c
   mulvdi3.c
   mulvsi3.c
   mulvti3.c
@@ -143,13 +139,11 @@
   popcountti2.c
   powidf2.c
   powisf2.c
-  powitf2.c
   subdf3.c
   subsf3.c
   subvdi3.c
   subvsi3.c
   subvti3.c
-  subtf3.c
   trampoline_setup.c
   truncdfhf2.c
   truncdfsf2.c
@@ -168,7 +162,10 @@
 )
 
 set(GENERIC_TF_SOURCES
+  addtf3.c
   comparetf2.c
+  divtc3.c
+  divtf3.c
   extenddftf2.c
   extendsftf2.c
   fixtfdi.c
@@ -184,6 +181,9 @@
   floatunsitf.c
   floatuntitf.c
   multc3.c
+  multf3.c
+  powitf2.c
+  subtf3.c
   trunctfdf2.c
   trunctfsf2.c
 )
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[PATCH] D82184: [MSP430] Update register names

2020-06-22 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl accepted this revision.
asl added a comment.
This revision is now accepted and ready to land.

Looks good to me! FP was an old register name from mspgcc time. MSP430 EABI 
does not use frame pointer at all (seems to be a bug in the ABI, as I do not 
understand how we could support VLAs or alloca's in this case).


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82184/new/

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[PATCH] D82184: [MSP430] Update register names

2020-06-22 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8f6620f66303: [MSP430] Update register names (authored by 
atrosinenko, committed by asl).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82184/new/

https://reviews.llvm.org/D82184

Files:
  clang/lib/Basic/Targets/MSP430.h
  clang/test/CodeGen/msp430-register-names.c
  llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
  llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
  llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
  llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
  llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
  llvm/lib/Target/MSP430/MSP430RegisterInfo.td
  llvm/test/CodeGen/MSP430/asm-clobbers.ll
  llvm/test/CodeGen/MSP430/inline-asm-register-names.ll

Index: llvm/test/CodeGen/MSP430/inline-asm-register-names.ll
===
--- /dev/null
+++ llvm/test/CodeGen/MSP430/inline-asm-register-names.ll
@@ -0,0 +1,59 @@
+; RUN: llc < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+
+; Test that correct register names are accepted *inside* inline asm listings.
+; Tested with PUSH instruction since it does not support memory operands.
+
+define void @accepted_rN() nounwind {
+; CHECK-LABEL: accepted_rN
+  call void asm sideeffect "push r0", ""() nounwind
+; CHECK: push r0
+  call void asm sideeffect "push r1", ""() nounwind
+; CHECK: push r1
+  call void asm sideeffect "push r2", ""() nounwind
+; CHECK: push r2
+  call void asm sideeffect "push r3", ""() nounwind
+; CHECK: push r3
+  call void asm sideeffect "push r4", ""() nounwind
+; CHECK: push r4
+  call void asm sideeffect "push r5", ""() nounwind
+; CHECK: push r5
+  call void asm sideeffect "push r6", ""() nounwind
+; CHECK: push r6
+  call void asm sideeffect "push r7", ""() nounwind
+; CHECK: push r7
+  call void asm sideeffect "push r8", ""() nounwind
+; CHECK: push r8
+  call void asm sideeffect "push r9", ""() nounwind
+; CHECK: push r9
+  call void asm sideeffect "push r10", ""() nounwind
+; CHECK: push r10
+  call void asm sideeffect "push r11", ""() nounwind
+; CHECK: push r11
+  call void asm sideeffect "push r12", ""() nounwind
+; CHECK: push r12
+  call void asm sideeffect "push r13", ""() nounwind
+; CHECK: push r13
+  call void asm sideeffect "push r14", ""() nounwind
+; CHECK: push r14
+  call void asm sideeffect "push r15", ""() nounwind
+; CHECK: push r15
+  ret void
+}
+
+define void @accepted_reg_aliases() nounwind {
+; CHECK-LABEL: accepted_reg_aliases
+; Ensure register aliases are renamed as expected
+call void asm sideeffect "push pc", ""() nounwind
+; CHECK: push r0
+call void asm sideeffect "push sp", ""() nounwind
+; CHECK: push r1
+call void asm sideeffect "push sr", ""() nounwind
+; CHECK: push r2
+call void asm sideeffect "push cg", ""() nounwind
+; CHECK: push r3
+call void asm sideeffect "push fp", ""() nounwind
+; CHECK: push r4
+ret void
+}
Index: llvm/test/CodeGen/MSP430/asm-clobbers.ll
===
--- llvm/test/CodeGen/MSP430/asm-clobbers.ll
+++ llvm/test/CodeGen/MSP430/asm-clobbers.ll
@@ -3,9 +3,52 @@
 target datalayout = "e-m:e-p:16:16-i32:16:32-a:16-n8:16"
 target triple = "msp430---elf"
 
-define void @test() {
+define void @test_no_clobber() {
 entry:
-; CHECK-LABEL: test:
+; CHECK-LABEL: test_no_clobber
+; CHECK-NOT: push
+  call void asm sideeffect "", ""()
+; CHECK-NOT: pop
+  ret void
+; CHECK: -- End function
+}
+
+define void @test_1() {
+entry:
+; CHECK-LABEL: test_1:
+; CHECK: push r8
+; CHECK: push r6
+; CHECK: push r4
+  call void asm sideeffect "", "~{r4},~{r6},~{r8}"()
+; CHECK: pop r4
+; CHECK: pop r6
+; CHECK: pop r8
+  ret void
+}
+
+define void @test_2() {
+entry:
+; CHECK-LABEL: test_2:
+; CHECK: push r9
+; CHECK: push r7
+; CHECK: push r5
+  call void asm sideeffect "", "~{r5},~{r7},~{r9}"()
+; CHECK: pop r5
+; CHECK: pop r7
+; CHECK: pop r9
+  ret void
+}
+
+; The r10 register is special because the sequence
+;   pop r10
+;   ret
+; can be replaced with
+;   jmp __mspabi_func_epilog_1
+; or other such function (depending on previous instructions).
+; Still, it is not replaced *yet*.
+define void @test_r10() {
+entry:
+; CHECK-LABEL: test_r10:
 ; CHECK: push r10
   call void asm sideeffect "", "~{r10}"()
 ; CHECK: pop r10
Index: llvm/lib/Target/MSP430/MSP430RegisterInfo.td
===
--- llvm/lib/Target/MSP430/MSP430RegisterInfo.td
+++ llvm/lib/Target/MSP430/MSP430RegisterInfo.td
@@ -36,7 +36,7 @@
 def SPB  : MSP430Reg<1,  "r1", ["sp"]>;
 def SRB  : MSP430Reg<2,  "r2", ["sr"]>;
 def CGB  : MSP430Reg<3,  "r3", ["cg"]>;
-def FPB  : MSP430Reg<4,  "r4", ["fp"]>;
+def R4B  : MSP430Reg<4,  "r4", ["fp"]>;
 def R5B  : MSP430Reg<5,  "r5">;
 def R6B  : MSP430Reg<6,  "r6">;
 def R7B  : MSP430Reg<7,  "r7">;
@@ -56,7 +56

[PATCH] D56927: Disable PIC/PIE for MSP430 target

2019-02-12 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rL353877: Disable PIC/PIE for MSP430 target (authored by asl, 
committed by ).
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56927/new/

https://reviews.llvm.org/D56927

Files:
  cfe/trunk/lib/Driver/ToolChains/MSP430.h
  cfe/trunk/test/CodeGen/msp430-reloc.c


Index: cfe/trunk/test/CodeGen/msp430-reloc.c
===
--- cfe/trunk/test/CodeGen/msp430-reloc.c
+++ cfe/trunk/test/CodeGen/msp430-reloc.c
@@ -0,0 +1,30 @@
+// REQUIRES: msp430-registered-target
+// RUN: %clang -target msp430 -fPIC -S %s -o - | FileCheck %s
+
+// Check the compilation does not crash as it was crashing before with "-fPIC" 
enabled
+
+void *alloca(unsigned int size);
+
+// CHECK: .globl foo
+short foo(char** data, char encoding)
+{
+   char* encoding_addr = alloca(sizeof(char));
+   *encoding_addr = encoding;
+
+   char tmp3 = *encoding_addr;
+   short conv2 = tmp3;
+   short and = conv2 & 0xf;
+
+   switch (and)
+   {
+   case 0 :
+   case 4 :
+   case 10 :
+   return 1;
+   case 11 :
+   return 2;
+   }
+
+   return 0;
+}
+
Index: cfe/trunk/lib/Driver/ToolChains/MSP430.h
===
--- cfe/trunk/lib/Driver/ToolChains/MSP430.h
+++ cfe/trunk/lib/Driver/ToolChains/MSP430.h
@@ -36,6 +36,10 @@
  llvm::opt::ArgStringList &CC1Args,
  Action::OffloadKind) const override;
 
+  bool isPICDefault() const override { return false; }
+  bool isPIEDefault() const override { return false; }
+  bool isPICDefaultForced() const override { return true; }
+
 protected:
   Tool *buildLinker() const override;
 


Index: cfe/trunk/test/CodeGen/msp430-reloc.c
===
--- cfe/trunk/test/CodeGen/msp430-reloc.c
+++ cfe/trunk/test/CodeGen/msp430-reloc.c
@@ -0,0 +1,30 @@
+// REQUIRES: msp430-registered-target
+// RUN: %clang -target msp430 -fPIC -S %s -o - | FileCheck %s
+
+// Check the compilation does not crash as it was crashing before with "-fPIC" enabled
+
+void *alloca(unsigned int size);
+
+// CHECK: .globl foo
+short foo(char** data, char encoding)
+{
+	char* encoding_addr = alloca(sizeof(char));
+	*encoding_addr = encoding;
+
+	char tmp3 = *encoding_addr;
+	short conv2 = tmp3;
+	short and = conv2 & 0xf;
+
+	switch (and)
+	{
+	case 0 :
+	case 4 :
+	case 10 :
+		return 1;
+	case 11 :
+		return 2;
+	}
+
+	return 0;
+}
+
Index: cfe/trunk/lib/Driver/ToolChains/MSP430.h
===
--- cfe/trunk/lib/Driver/ToolChains/MSP430.h
+++ cfe/trunk/lib/Driver/ToolChains/MSP430.h
@@ -36,6 +36,10 @@
  llvm::opt::ArgStringList &CC1Args,
  Action::OffloadKind) const override;
 
+  bool isPICDefault() const override { return false; }
+  bool isPIEDefault() const override { return false; }
+  bool isPICDefaultForced() const override { return true; }
+
 protected:
   Tool *buildLinker() const override;
 
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[PATCH] D56925: Do not use frame pointer by default for MSP430

2019-02-05 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rL353212: Do not use frame pointer by default for MSP430 
(authored by asl, committed by ).
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56925/new/

https://reviews.llvm.org/D56925

Files:
  cfe/trunk/lib/Driver/ToolChains/Clang.cpp
  cfe/trunk/test/CodeGen/msp430-fp-elim.c


Index: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
===
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp
@@ -519,6 +519,7 @@
   case llvm::Triple::xcore:
   case llvm::Triple::wasm32:
   case llvm::Triple::wasm64:
+  case llvm::Triple::msp430:
 // XCore never wants frame pointers, regardless of OS.
 // WebAssembly never wants frame pointers.
 return false;
Index: cfe/trunk/test/CodeGen/msp430-fp-elim.c
===
--- cfe/trunk/test/CodeGen/msp430-fp-elim.c
+++ cfe/trunk/test/CodeGen/msp430-fp-elim.c
@@ -0,0 +1,19 @@
+// REQUIRES: msp430-registered-target
+// RUN: %clang_cc1 -mdisable-fp-elim -triple msp430 -S %s -o - | FileCheck %s 
--check-prefix=FP_ENFORCED
+// RUN: %clang_cc1 -triple msp430 -S %s -o - | FileCheck %s 
--check-prefix=FP_DEFAULT
+
+// Check the frame pointer is not used on MSP430 by default, but can be 
forcibly turned on.
+
+// FP_ENFORCED: push r4
+// FP_ENFORCED: mov r4, r4
+// FP_ENFORCED: pop r4
+// FP_DEFAULT: .globl fp_elim_check
+// FP_DEFAULT-NOT: push r4
+// FP_DEFAULT: mov r4, r4
+// FP_DEFAULT-NOT: pop r4
+
+void fp_elim_check()
+{
+   asm volatile ("mov r4, r4");
+}
+


Index: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
===
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp
@@ -519,6 +519,7 @@
   case llvm::Triple::xcore:
   case llvm::Triple::wasm32:
   case llvm::Triple::wasm64:
+  case llvm::Triple::msp430:
 // XCore never wants frame pointers, regardless of OS.
 // WebAssembly never wants frame pointers.
 return false;
Index: cfe/trunk/test/CodeGen/msp430-fp-elim.c
===
--- cfe/trunk/test/CodeGen/msp430-fp-elim.c
+++ cfe/trunk/test/CodeGen/msp430-fp-elim.c
@@ -0,0 +1,19 @@
+// REQUIRES: msp430-registered-target
+// RUN: %clang_cc1 -mdisable-fp-elim -triple msp430 -S %s -o - | FileCheck %s --check-prefix=FP_ENFORCED
+// RUN: %clang_cc1 -triple msp430 -S %s -o - | FileCheck %s --check-prefix=FP_DEFAULT
+
+// Check the frame pointer is not used on MSP430 by default, but can be forcibly turned on.
+
+// FP_ENFORCED: push r4
+// FP_ENFORCED: mov r4, r4
+// FP_ENFORCED: pop r4
+// FP_DEFAULT: .globl fp_elim_check
+// FP_DEFAULT-NOT: push r4
+// FP_DEFAULT: mov r4, r4
+// FP_DEFAULT-NOT: pop r4
+
+void fp_elim_check()
+{
+	asm volatile ("mov r4, r4");
+}
+
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[PATCH] D56925: Do not use frame pointer by default for MSP430

2019-02-05 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl accepted this revision.
asl added a comment.
This revision is now accepted and ready to land.
Herald added a project: clang.

Ok now


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[PATCH] D56927: Disable PIC/PIE for MSP430 target

2019-01-25 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl requested changes to this revision.
asl added a comment.
This revision now requires changes to proceed.

Please make sure the test passes.


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[PATCH] D56927: Disable PIC/PIE for MSP430 target

2019-01-25 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl reopened this revision.
asl added a comment.
This revision is now accepted and ready to land.

The patch was reverted – the test requires fully configured msp430 
configuration and therefore was breaking the bots.


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[PATCH] D56927: Disable PIC/PIE for MSP430 target

2019-01-25 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rC352181: Disable PIC/PIE for MSP430 target by default. 
(authored by asl, committed by ).

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Files:
  lib/Driver/ToolChains/MSP430.h
  test/CodeGen/msp430-reloc.c


Index: lib/Driver/ToolChains/MSP430.h
===
--- lib/Driver/ToolChains/MSP430.h
+++ lib/Driver/ToolChains/MSP430.h
@@ -36,6 +36,10 @@
  llvm::opt::ArgStringList &CC1Args,
  Action::OffloadKind) const override;
 
+  bool isPICDefault() const override { return false; }
+  bool isPIEDefault() const override { return false; }
+  bool isPICDefaultForced() const override { return true; }
+
 protected:
   Tool *buildLinker() const override;
 
Index: test/CodeGen/msp430-reloc.c
===
--- test/CodeGen/msp430-reloc.c
+++ test/CodeGen/msp430-reloc.c
@@ -0,0 +1,29 @@
+// RUN: %clang -target msp430 -fPIC -S %s -o - | FileCheck %s
+
+// Check the compilation does not crash as it was crashing before with "-fPIC" 
enabled
+
+void *alloca(unsigned int size);
+
+// CHECK: .globl foo
+short foo(char** data, char encoding)
+{
+   char* encoding_addr = alloca(sizeof(char));
+   *encoding_addr = encoding;
+
+   char tmp3 = *encoding_addr;
+   short conv2 = tmp3;
+   short and = conv2 & 0xf;
+
+   switch (and)
+   {
+   case 0 :
+   case 4 :
+   case 10 :
+   return 1;
+   case 11 :
+   return 2;
+   }
+
+   return 0;
+}
+


Index: lib/Driver/ToolChains/MSP430.h
===
--- lib/Driver/ToolChains/MSP430.h
+++ lib/Driver/ToolChains/MSP430.h
@@ -36,6 +36,10 @@
  llvm::opt::ArgStringList &CC1Args,
  Action::OffloadKind) const override;
 
+  bool isPICDefault() const override { return false; }
+  bool isPIEDefault() const override { return false; }
+  bool isPICDefaultForced() const override { return true; }
+
 protected:
   Tool *buildLinker() const override;
 
Index: test/CodeGen/msp430-reloc.c
===
--- test/CodeGen/msp430-reloc.c
+++ test/CodeGen/msp430-reloc.c
@@ -0,0 +1,29 @@
+// RUN: %clang -target msp430 -fPIC -S %s -o - | FileCheck %s
+
+// Check the compilation does not crash as it was crashing before with "-fPIC" enabled
+
+void *alloca(unsigned int size);
+
+// CHECK: .globl foo
+short foo(char** data, char encoding)
+{
+	char* encoding_addr = alloca(sizeof(char));
+	*encoding_addr = encoding;
+
+	char tmp3 = *encoding_addr;
+	short conv2 = tmp3;
+	short and = conv2 & 0xf;
+
+	switch (and)
+	{
+	case 0 :
+	case 4 :
+	case 10 :
+		return 1;
+	case 11 :
+		return 2;
+	}
+
+	return 0;
+}
+
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[PATCH] D56925: Do not use frame pointer by default for MSP430

2019-01-25 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl requested changes to this revision.
asl added a comment.
This revision now requires changes to proceed.

Patch fails to apply. Please rebase.


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[PATCH] D57015: [MSP430] Ajust f32/f64 alignment according to MSP430 EABI

2019-01-25 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rC352177: [MSP430] Ajust f32/f64 alignment according to MSP430 
EABI (authored by asl, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D57015?vs=182784&id=183492#toc

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Files:
  lib/Basic/Targets/MSP430.h
  test/CodeGen/msp430-align.c
  test/Preprocessor/init.c


Index: test/CodeGen/msp430-align.c
===
--- test/CodeGen/msp430-align.c
+++ test/CodeGen/msp430-align.c
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -triple msp430-elf -emit-llvm %s -o - | FileCheck %s
+
+// MSP430 target prefers chars to be aligned to 8 bit and other types to 16 
bit.
+
+// CHECK: @c ={{.*}}global i8 1, align 1
+// CHECK: @s ={{.*}}global i16 266, align 2
+// CHECK: @i ={{.*}}global i16 266, align 2
+// CHECK: @l ={{.*}}global i32 16909060, align 2
+// CHECK: @ll ={{.*}}global i64 283686952306183, align 2
+// CHECK: @f ={{.*}}global float 1.00e+00, align 2
+// CHECK: @d ={{.*}}global double 1.00e+00, align 2
+// CHECK: @ld ={{.*}}global double 1.00e+00, align 2
+// CHECK: @p ={{.*}}global i8* @c, align 2
+
+char c = 1;
+short s = 266;
+int i = 266;
+long l = 16909060;
+long long ll = 283686952306183;
+float f = 1.0f;
+double d = 1.0;
+long double ld = 1.0;
+char *p = &c;
Index: test/Preprocessor/init.c
===
--- test/Preprocessor/init.c
+++ test/Preprocessor/init.c
@@ -5158,7 +5158,7 @@
 // MSP430:#define __SIZE_MAX__ 65535U
 // MSP430:#define __SIZE_TYPE__ unsigned int
 // MSP430:#define __SIZE_WIDTH__ 16
-// MSP430-CXX:#define __STDCPP_DEFAULT_NEW_ALIGNMENT__ 8U
+// MSP430-CXX:#define __STDCPP_DEFAULT_NEW_ALIGNMENT__ 2U
 // MSP430:#define __UINT16_C_SUFFIX__ U
 // MSP430:#define __UINT16_MAX__ 65535U
 // MSP430:#define __UINT16_TYPE__ unsigned short
Index: lib/Basic/Targets/MSP430.h
===
--- lib/Basic/Targets/MSP430.h
+++ lib/Basic/Targets/MSP430.h
@@ -33,6 +33,10 @@
 LongWidth = 32;
 LongLongWidth = 64;
 LongAlign = LongLongAlign = 16;
+FloatWidth = 32;
+FloatAlign = 16;
+DoubleWidth = LongDoubleWidth = 64;
+DoubleAlign = LongDoubleAlign = 16;
 PointerWidth = 16;
 PointerAlign = 16;
 SuitableAlign = 16;
@@ -51,6 +55,8 @@
 return None;
   }
 
+  bool allowsLargerPreferedTypeAlignment() const override { return false; }
+
   bool hasFeature(StringRef Feature) const override {
 return Feature == "msp430";
   }


Index: test/CodeGen/msp430-align.c
===
--- test/CodeGen/msp430-align.c
+++ test/CodeGen/msp430-align.c
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -triple msp430-elf -emit-llvm %s -o - | FileCheck %s
+
+// MSP430 target prefers chars to be aligned to 8 bit and other types to 16 bit.
+
+// CHECK: @c ={{.*}}global i8 1, align 1
+// CHECK: @s ={{.*}}global i16 266, align 2
+// CHECK: @i ={{.*}}global i16 266, align 2
+// CHECK: @l ={{.*}}global i32 16909060, align 2
+// CHECK: @ll ={{.*}}global i64 283686952306183, align 2
+// CHECK: @f ={{.*}}global float 1.00e+00, align 2
+// CHECK: @d ={{.*}}global double 1.00e+00, align 2
+// CHECK: @ld ={{.*}}global double 1.00e+00, align 2
+// CHECK: @p ={{.*}}global i8* @c, align 2
+
+char c = 1;
+short s = 266;
+int i = 266;
+long l = 16909060;
+long long ll = 283686952306183;
+float f = 1.0f;
+double d = 1.0;
+long double ld = 1.0;
+char *p = &c;
Index: test/Preprocessor/init.c
===
--- test/Preprocessor/init.c
+++ test/Preprocessor/init.c
@@ -5158,7 +5158,7 @@
 // MSP430:#define __SIZE_MAX__ 65535U
 // MSP430:#define __SIZE_TYPE__ unsigned int
 // MSP430:#define __SIZE_WIDTH__ 16
-// MSP430-CXX:#define __STDCPP_DEFAULT_NEW_ALIGNMENT__ 8U
+// MSP430-CXX:#define __STDCPP_DEFAULT_NEW_ALIGNMENT__ 2U
 // MSP430:#define __UINT16_C_SUFFIX__ U
 // MSP430:#define __UINT16_MAX__ 65535U
 // MSP430:#define __UINT16_TYPE__ unsigned short
Index: lib/Basic/Targets/MSP430.h
===
--- lib/Basic/Targets/MSP430.h
+++ lib/Basic/Targets/MSP430.h
@@ -33,6 +33,10 @@
 LongWidth = 32;
 LongLongWidth = 64;
 LongAlign = LongLongAlign = 16;
+FloatWidth = 32;
+FloatAlign = 16;
+DoubleWidth = LongDoubleWidth = 64;
+DoubleAlign = LongDoubleAlign = 16;
 PointerWidth = 16;
 PointerAlign = 16;
 SuitableAlign = 16;
@@ -51,6 +55,8 @@
 return None;
   }
 
+  bool allowsLargerPreferedTypeAlignment() const override { return false; }
+
   bool hasFeature(StringRef Feature) const override {
 return Feature == "msp430";
   }
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[PATCH] D24461: CodeGen: Cast llvm.flt.rounds result to match __builtin_flt_rounds

2019-01-17 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl accepted this revision.
asl added a comment.

Committed, thanks!


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[PATCH] D24461: CodeGen: Cast llvm.flt.rounds result to match __builtin_flt_rounds

2019-01-17 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rL351449: CodeGen: Cast llvm.flt.rounds result to match 
__builtin_flt_rounds (authored by asl, committed by ).
Herald added a subscriber: llvm-commits.

Changed prior to commit:
  https://reviews.llvm.org/D24461?vs=71016&id=182286#toc

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Files:
  cfe/trunk/lib/CodeGen/CGBuiltin.cpp
  cfe/trunk/test/CodeGen/builtins-msp430.c
  cfe/trunk/test/CodeGen/builtins.c


Index: cfe/trunk/test/CodeGen/builtins-msp430.c
===
--- cfe/trunk/test/CodeGen/builtins-msp430.c
+++ cfe/trunk/test/CodeGen/builtins-msp430.c
@@ -0,0 +1,10 @@
+// REQUIRES: msp430-registered-target
+// RUN: %clang_cc1 -triple msp430-unknown-unknown -emit-llvm %s -o - | 
FileCheck %s
+
+int test_builtin_flt_rounds() {
+  // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i32 @llvm.flt.rounds()
+  // CHECK-DAG: [[V1:[%A-Za-z0-9.]+]] = trunc i32 [[V0]] to i16
+  // CHECK-DAG: ret i16 [[V1]]
+  return __builtin_flt_rounds();
+}
+
Index: cfe/trunk/test/CodeGen/builtins.c
===
--- cfe/trunk/test/CodeGen/builtins.c
+++ cfe/trunk/test/CodeGen/builtins.c
@@ -246,6 +246,9 @@
   // CHECK: fcmp uge float {{.*}}, 0x3810
   // CHECK: and i1
   // CHECK: and i1
+
+  res = __builtin_flt_rounds();
+  // CHECK: call i32 @llvm.flt.rounds(
 }
 
 // CHECK-LABEL: define void @test_float_builtin_ops
Index: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
===
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp
@@ -2130,6 +2130,17 @@
 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType(;
   }
 
+  case Builtin::BI__builtin_flt_rounds: {
+Value *F = CGM.getIntrinsic(Intrinsic::flt_rounds);
+
+llvm::Type *ResultType = ConvertType(E->getType());
+Value *Result = Builder.CreateCall(F);
+if (Result->getType() != ResultType)
+  Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true,
+ "cast");
+return RValue::get(Result);
+  }
+
   case Builtin::BI__builtin_fpclassify: {
 Value *V = EmitScalarExpr(E->getArg(5));
 llvm::Type *Ty = ConvertType(E->getArg(5)->getType());


Index: cfe/trunk/test/CodeGen/builtins-msp430.c
===
--- cfe/trunk/test/CodeGen/builtins-msp430.c
+++ cfe/trunk/test/CodeGen/builtins-msp430.c
@@ -0,0 +1,10 @@
+// REQUIRES: msp430-registered-target
+// RUN: %clang_cc1 -triple msp430-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+
+int test_builtin_flt_rounds() {
+  // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i32 @llvm.flt.rounds()
+  // CHECK-DAG: [[V1:[%A-Za-z0-9.]+]] = trunc i32 [[V0]] to i16
+  // CHECK-DAG: ret i16 [[V1]]
+  return __builtin_flt_rounds();
+}
+
Index: cfe/trunk/test/CodeGen/builtins.c
===
--- cfe/trunk/test/CodeGen/builtins.c
+++ cfe/trunk/test/CodeGen/builtins.c
@@ -246,6 +246,9 @@
   // CHECK: fcmp uge float {{.*}}, 0x3810
   // CHECK: and i1
   // CHECK: and i1
+
+  res = __builtin_flt_rounds();
+  // CHECK: call i32 @llvm.flt.rounds(
 }
 
 // CHECK-LABEL: define void @test_float_builtin_ops
Index: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
===
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp
@@ -2130,6 +2130,17 @@
 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType(;
   }
 
+  case Builtin::BI__builtin_flt_rounds: {
+Value *F = CGM.getIntrinsic(Intrinsic::flt_rounds);
+
+llvm::Type *ResultType = ConvertType(E->getType());
+Value *Result = Builder.CreateCall(F);
+if (Result->getType() != ResultType)
+  Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true,
+ "cast");
+return RValue::get(Result);
+  }
+
   case Builtin::BI__builtin_fpclassify: {
 Value *V = EmitScalarExpr(E->getArg(5));
 llvm::Type *Ty = ConvertType(E->getArg(5)->getType());
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[PATCH] D56663: [MSP430] Improve support of 'interrupt' attribute

2019-01-16 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rL351344: [MSP430] Improve support of 'interrupt' 
attribute (authored by asl, committed by ).
Herald added a subscriber: llvm-commits.

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Files:
  cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
  cfe/trunk/lib/CodeGen/TargetInfo.cpp
  cfe/trunk/lib/Sema/SemaDeclAttr.cpp
  cfe/trunk/test/CodeGen/attr-msp430.c
  cfe/trunk/test/Sema/attr-msp430.c

Index: cfe/trunk/lib/Sema/SemaDeclAttr.cpp
===
--- cfe/trunk/lib/Sema/SemaDeclAttr.cpp
+++ cfe/trunk/lib/Sema/SemaDeclAttr.cpp
@@ -5377,6 +5377,27 @@
 }
 
 static void handleMSP430InterruptAttr(Sema &S, Decl *D, const ParsedAttr &AL) {
+  // MSP430 'interrupt' attribute is applied to
+  // a function with no parameters and void return type.
+  if (!isFunctionOrMethod(D)) {
+S.Diag(D->getLocation(), diag::warn_attribute_wrong_decl_type)
+<< "'interrupt'" << ExpectedFunctionOrMethod;
+return;
+  }
+
+  if (hasFunctionProto(D) && getFunctionOrMethodNumParams(D) != 0) {
+S.Diag(D->getLocation(), diag::warn_msp430_interrupt_attribute)
+<< 0;
+return;
+  }
+
+  if (!getFunctionOrMethodResultType(D)->isVoidType()) {
+S.Diag(D->getLocation(), diag::warn_msp430_interrupt_attribute)
+<< 1;
+return;
+  }
+
+  // The attribute takes one integer argument.
   if (!checkAttributeNumArgs(S, AL, 1))
 return;
 
@@ -5386,8 +5407,6 @@
 return;
   }
 
-  // FIXME: Check for decl - it should be void ()(void).
-
   Expr *NumParamsExpr = static_cast(AL.getArgAsExpr(0));
   llvm::APSInt NumParams(32);
   if (!NumParamsExpr->isIntegerConstantExpr(NumParams, S.Context)) {
@@ -5396,9 +5415,9 @@
 << NumParamsExpr->getSourceRange();
 return;
   }
-
+  // The argument should be in range 0..63.
   unsigned Num = NumParams.getLimitedValue(255);
-  if ((Num & 1) || Num > 30) {
+  if (Num > 63) {
 S.Diag(AL.getLoc(), diag::err_attribute_argument_out_of_bounds)
 << AL << (int)NumParams.getSExtValue()
 << NumParamsExpr->getSourceRange();
Index: cfe/trunk/lib/CodeGen/TargetInfo.cpp
===
--- cfe/trunk/lib/CodeGen/TargetInfo.cpp
+++ cfe/trunk/lib/CodeGen/TargetInfo.cpp
@@ -6774,21 +6774,19 @@
   if (GV->isDeclaration())
 return;
   if (const FunctionDecl *FD = dyn_cast_or_null(D)) {
-if (const MSP430InterruptAttr *attr = FD->getAttr()) {
-  // Handle 'interrupt' attribute:
-  llvm::Function *F = cast(GV);
+const auto *InterruptAttr = FD->getAttr();
+if (!InterruptAttr)
+  return;
 
-  // Step 1: Set ISR calling convention.
-  F->setCallingConv(llvm::CallingConv::MSP430_INTR);
+// Handle 'interrupt' attribute:
+llvm::Function *F = cast(GV);
 
-  // Step 2: Add attributes goodness.
-  F->addFnAttr(llvm::Attribute::NoInline);
+// Step 1: Set ISR calling convention.
+F->setCallingConv(llvm::CallingConv::MSP430_INTR);
 
-  // Step 3: Emit ISR vector alias.
-  unsigned Num = attr->getNumber() / 2;
-  llvm::GlobalAlias::create(llvm::Function::ExternalLinkage,
-"__isr_" + Twine(Num), F);
-}
+// Step 2: Add attributes goodness.
+F->addFnAttr(llvm::Attribute::NoInline);
+F->addFnAttr("interrupt", llvm::utostr(InterruptAttr->getNumber()));
   }
 }
 
Index: cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
===
--- cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
+++ cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
@@ -274,6 +274,10 @@
"RISC-V 'interrupt' attribute only applies to functions that have "
"%select{no parameters|a 'void' return type}0">,
InGroup;
+def warn_msp430_interrupt_attribute : Warning<
+   "MSP430 'interrupt' attribute only applies to functions that have "
+   "%select{no parameters|a 'void' return type}0">,
+   InGroup;
 def warn_unused_parameter : Warning<"unused parameter %0">,
   InGroup, DefaultIgnore;
 def warn_unused_variable : Warning<"unused variable %0">,
Index: cfe/trunk/test/Sema/attr-msp430.c
===
--- cfe/trunk/test/Sema/attr-msp430.c
+++ cfe/trunk/test/Sema/attr-msp430.c
@@ -1,6 +1,13 @@
 // RUN: %clang_cc1 -triple msp430-unknown-unknown -fsyntax-only -verify %s
 
+__attribute__((interrupt(1))) int t; // expected-warning {{'interrupt' attribute only applies to functions}}
+
 int i;
-void f(void) __attribute__((interrupt(i))); /* expected-error {{'interrupt' attribute requires an integer constant}} */
+__attribute__((interrupt(i))) void f(void); // expected-error {{'interrupt' attribute requires an integer constant}}
+__attribute__((interrupt(1, 2))) void f2(void); // expected-error {{'interrupt

[PATCH] D56776: [MSP430] Fix msp430-toolchain.c on Windows (added in rL351228)

2019-01-16 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rC351340: [MSP430] Fix msp430-toolchain.c on Windows (added in 
r351228) (authored by asl, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D56776?vs=181998&id=182017#toc

Repository:
  rC Clang

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56776/new/

https://reviews.llvm.org/D56776

Files:
  test/Driver/msp430-toolchain.c


Index: test/Driver/msp430-toolchain.c
===
--- test/Driver/msp430-toolchain.c
+++ test/Driver/msp430-toolchain.c
@@ -8,44 +8,44 @@
 // RUN:   --gcc-toolchain=%S/Inputs/basic_msp430_tree 2>&1 \
 // RUN:   | FileCheck -check-prefix=MSP430 %s
 
-// MSP430: 
"{{.*}}Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../../../bin/msp430-elf-ld"
+// MSP430: 
"{{.*}}Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../..{{/|}}..{{/|}}bin{{/|}}msp430-elf-ld"
 // MSP430: "-L{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/430"
-// MSP430: 
"-L{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../../../msp430-elf/lib/430"
-// MSP430: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../../../msp430-elf/lib/430/crt0.o"
-// MSP430: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/430/crtbegin.o"
+// MSP430: 
"-L{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../..{{/|}}..{{/|}}msp430-elf{{/|}}lib/430"
+// MSP430: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../..{{/|}}..{{/|}}msp430-elf{{/|}}lib/430{{/|}}crt0.o"
+// MSP430: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/430{{/|}}crtbegin.o"
 // MSP430: "--start-group" "-lmul_none" "-lgcc" "-lc" "-lcrt" "-lnosys" 
"--end-group"
-// MSP430: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/430/crtend.o"
-// MSP430: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../../../msp430-elf/lib/430/crtn.o"
+// MSP430: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/430{{/|}}crtend.o"
+// MSP430: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../..{{/|}}..{{/|}}msp430-elf{{/|}}lib/430{{/|}}crtn.o"
 
 // RUN: %clang %s -### -no-canonical-prefixes -target msp430 -nodefaultlibs \
 // RUN:   --gcc-toolchain=%S/Inputs/basic_msp430_tree 2>&1 \
 // RUN:   | FileCheck -check-prefix=MSP430-NO-DFT-LIB %s
 
-// MSP430-NO-DFT-LIB: 
"{{.*}}Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../../../bin/msp430-elf-ld"
+// MSP430-NO-DFT-LIB: 
"{{.*}}Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../..{{/|}}..{{/|}}bin{{/|}}msp430-elf-ld"
 // MSP430-NO-DFT-LIB: 
"-L{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/430"
-// MSP430-NO-DFT-LIB: 
"-L{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../../../msp430-elf/lib/430"
-// MSP430-NO-DFT-LIB: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../../../msp430-elf/lib/430/crt0.o"
-// MSP430-NO-DFT-LIB: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/430/crtbegin.o"
+// MSP430-NO-DFT-LIB: 
"-L{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../..{{/|}}..{{/|}}msp430-elf{{/|}}lib/430"
+// MSP430-NO-DFT-LIB: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../..{{/|}}..{{/|}}msp430-elf{{/|}}lib/430{{/|}}crt0.o"
+// MSP430-NO-DFT-LIB: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/430{{/|}}crtbegin.o"
 // MSP430-NO-DFT-LIB: "--start-group" "-lmul_none" "-lgcc" "--end-group"
-// MSP430-NO-DFT-LIB: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/430/crtend.o"
-// MSP430-NO-DFT-LIB: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../../../msp430-elf/lib/430/crtn.o"
+// MSP430-NO-DFT-LIB: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/430{{/|}}crtend.o"
+// MSP430-NO-DFT-LIB: 
"{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../..{{/|}}..{{/|}}msp430-elf{{/|}}lib/430{{/|}}crtn.o"
 
 // RUN: %clang %s -### -no-canonical-prefixes -target msp430 -nostartfiles \
 // RUN:   --gcc-toolchain=%S/Inputs/basic_msp430_tree 2>&1 \
 // RUN:   | FileCheck -check-prefix=MSP430-NO-START %s
 
-// MSP430-NO-START: 
"{{.*}}Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../../../bin/msp430-elf-ld"
+// MSP430-NO-START: 
"{{.*}}Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../..{{/|}}..{{/|}}bin{{/|}}msp430-elf-ld"
 // MSP430-NO-START: 
"-L{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/430"
-// MSP430-NO-START: 
"-L{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../../../msp430-elf/lib/430"
+// MSP430-NO-START: 
"-L{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/../../..{{/|}}..{{/|}}msp430-elf{{/|}}lib/430"
 // MSP430-NO-START: "--start-group" "-lmul_none" "-lgcc" "-lc" "-lcrt" 
"-lnosys" "--end-group"
 
 // RUN: %clang

[PATCH] D56658: [MSP430] Add msp430 toochain

2019-01-15 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl added inline comments.



Comment at: cfe/trunk/lib/CodeGen/CodeGenModule.cpp:141
+  (!CodeGenOpts.RelaxedAliasing && CodeGenOpts.OptimizationLevel > 0)) {
+fprintf(stderr, "TBAA enabled\n");
 TBAA.reset(new CodeGenTBAA(Context, TheModule, CodeGenOpts, getLangOpts(),

nathanchance wrote:
> asl wrote:
> > nathanchance wrote:
> > > I'm just curious, was committing this change intentional? Seems like 
> > > something for debugging purposes, rather than a useful diagnostic, since 
> > > it doesn't appear to be related to the rest of the patch (as far as I can 
> > > tell).
> > > 
> > > I see it quite a bit on a Linux kernel build: 
> > > https://gist.github.com/nathanchance/0b2d3b16d5b30396038d86f5cba3
> > Oh... Sorry, maybe unclean tree or something like this. Will fix!
> Thanks for the quick reply, looks like Peter Collingbourne beat you to it :) 
> https://reviews.llvm.org/rC351241
Pete already fixed this in r351241.


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[PATCH] D56658: [MSP430] Add msp430 toochain

2019-01-15 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl added inline comments.



Comment at: cfe/trunk/lib/CodeGen/CodeGenModule.cpp:141
+  (!CodeGenOpts.RelaxedAliasing && CodeGenOpts.OptimizationLevel > 0)) {
+fprintf(stderr, "TBAA enabled\n");
 TBAA.reset(new CodeGenTBAA(Context, TheModule, CodeGenOpts, getLangOpts(),

nathanchance wrote:
> I'm just curious, was committing this change intentional? Seems like 
> something for debugging purposes, rather than a useful diagnostic, since it 
> doesn't appear to be related to the rest of the patch (as far as I can tell).
> 
> I see it quite a bit on a Linux kernel build: 
> https://gist.github.com/nathanchance/0b2d3b16d5b30396038d86f5cba3
Oh... Sorry, maybe unclean tree or something like this. Will fix!


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[PATCH] D56658: [MSP430] Add msp430 toochain

2019-01-15 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rL351228: [MSP430] Provide a toolchain description (authored 
by asl, committed by ).
Herald added a subscriber: llvm-commits.

Changed prior to commit:
  https://reviews.llvm.org/D56658?vs=181531&id=181841#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56658/new/

https://reviews.llvm.org/D56658

Files:
  cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
  cfe/trunk/include/clang/Basic/MSP430Target.def
  cfe/trunk/include/clang/Driver/Options.td
  cfe/trunk/include/clang/module.modulemap
  cfe/trunk/lib/CodeGen/CodeGenModule.cpp
  cfe/trunk/lib/Driver/CMakeLists.txt
  cfe/trunk/lib/Driver/Driver.cpp
  cfe/trunk/lib/Driver/ToolChains/Clang.cpp
  cfe/trunk/lib/Driver/ToolChains/Gnu.cpp
  cfe/trunk/lib/Driver/ToolChains/MSP430.cpp
  cfe/trunk/lib/Driver/ToolChains/MSP430.h
  cfe/trunk/test/Driver/Inputs/basic_msp430_tree/bin/msp430-elf-ld
  
cfe/trunk/test/Driver/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/430/crtbegin.o
  
cfe/trunk/test/Driver/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/7.3.1/430/crtend.o
  cfe/trunk/test/Driver/Inputs/basic_msp430_tree/msp430-elf/lib/430/crt0.o
  cfe/trunk/test/Driver/Inputs/basic_msp430_tree/msp430-elf/lib/430/crtn.o
  cfe/trunk/test/Driver/msp430-hwmult.c
  cfe/trunk/test/Driver/msp430-mmcu.c
  cfe/trunk/test/Driver/msp430-toolchain.c
  cfe/trunk/test/Driver/no-integrated-as.c

Index: cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
===
--- cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
+++ cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
@@ -414,4 +414,15 @@
   "-ftrivial-auto-var-init=zero hasn't been enabled. Enable it at your own peril for benchmarking purpose only with "
   "-enable-trivial-auto-var-init-zero-knowing-it-will-be-removed-from-clang">;
 
+def warn_drv_msp430_hwmult_unsupported : Warning<"the given MCU does not "
+  "support hardware multiply, but -mhwmult is set to %0.">,
+   InGroup;
+def warn_drv_msp430_hwmult_mismatch : Warning<"the given MCU supports %0 "
+  "hardware multiply, but -mhwmult is set to %1.">,
+   InGroup;
+def warn_drv_msp430_hwmult_no_device : Warning<"no MCU device specified, but "
+  "'-mhwmult' is set to 'auto', assuming no hardware multiply. Use -mmcu to "
+  "specify a MSP430 device, or -mhwmult to set hardware multiply type "
+  "explicitly.">, InGroup;
+
 }
Index: cfe/trunk/include/clang/Basic/MSP430Target.def
===
--- cfe/trunk/include/clang/Basic/MSP430Target.def
+++ cfe/trunk/include/clang/Basic/MSP430Target.def
@@ -0,0 +1,247 @@
+//===--- MSP430Target.def - MSP430 Feature/Processor Database*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===--===//
+//
+// This file defines the MSP430 devices and their features.
+//
+//===--===//
+
+#ifndef MSP430_MCU_FEAT
+#define MSP430_MCU_FEAT(NAME, HWMULT) MSP430_MCU(NAME)
+#endif
+
+#ifndef MSP430_MCU
+#define MSP430_MCU(NAME)
+#endif
+
+MSP430_MCU("msp430c111")
+MSP430_MCU("msp430c")
+MSP430_MCU("msp430c112")
+MSP430_MCU("msp430c1121")
+MSP430_MCU("msp430c1331")
+MSP430_MCU("msp430c1351")
+MSP430_MCU("msp430e112")
+MSP430_MCU("msp430f110")
+MSP430_MCU("msp430f1101")
+MSP430_MCU("msp430f1101a")
+MSP430_MCU("msp430f")
+MSP430_MCU("msp430fa")
+MSP430_MCU("msp430f112")
+MSP430_MCU("msp430f1121")
+MSP430_MCU("msp430f1121a")
+MSP430_MCU("msp430f1122")
+MSP430_MCU("msp430f1132")
+MSP430_MCU("msp430f122")
+MSP430_MCU("msp430f1222")
+MSP430_MCU("msp430f123")
+MSP430_MCU("msp430f1232")
+MSP430_MCU("msp430f133")
+MSP430_MCU("msp430f135")
+MSP430_MCU("msp430f155")
+MSP430_MCU("msp430f156")
+MSP430_MCU("msp430f157")
+MSP430_MCU("msp430p112")
+MSP430_MCU("msp430f2001")
+MSP430_MCU("msp430f2011")
+MSP430_MCU("msp430f2002")
+MSP430_MCU("msp430f2012")
+MSP430_MCU("msp430f2003")
+MSP430_MCU("msp430f2013")
+MSP430_MCU("msp430f2101")
+MSP430_MCU("msp430f2111")
+MSP430_MCU("msp430f2121")
+MSP430_MCU("msp430f2131")
+MSP430_MCU("msp430f2112")
+MSP430_MCU("msp430f2122")
+MSP430_MCU("msp430f2132")
+MSP430_MCU("msp430f2232")
+MSP430_MCU("msp430f2252")
+MSP430_MCU("msp430f2272")
+MSP430_MCU("msp430f2234")
+MSP430_MCU("msp430f2254")
+MSP430_MCU("msp430f2274")
+MSP430_MCU("msp430g2211")
+MSP430_MCU("msp430g2201")
+MSP430_MCU("msp430g2111")
+MSP430_MCU("msp430g2101")
+MSP430_MCU("msp430g2001")
+MSP430_MCU("msp430g2231")
+MSP430_MCU("msp430g2221")
+MSP430_MCU("msp430g2131")
+MSP430_MCU("msp430g2121")
+MSP430_MCU("msp430g2102")
+MSP430_MCU("msp430g2202")
+MSP430_MCU("msp430g2302")
+MSP430_MCU("msp430g2402")
+MSP430_MCU("msp430g2132"

[PATCH] D34440: [Clang] Expand response files before loading compilation database

2017-07-20 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl added a comment.

In https://reviews.llvm.org/D34440#809525, @alexfh wrote:

> In https://reviews.llvm.org/D34440#808156, @vladimir.plyashkun wrote:
>
> > **To discuss:**
> >  ...
> >  By this moment, we unable to use //CompilationDatabase.json// from //CLion 
> > //side which is widely used in //Clang-Tidy// and in other common tools.
>
>
> It would be interesting to learn more about the reasons why you can't use 
> JSON compilation database. In case you don't want to clutter the project's 
> directory, you can place the compile_commands.json file elsewhere (in a 
> temporary directory, for example) and point clang tools to this directory 
> using the `-p` command line flag.


Many build systems normally generate response files on-fly in some 
circumstances (e.g. if command line is longer than some platform-imposed 
limit). So IMO response files should be a perfect citizen here.


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[PATCH] D34562: [MSP430] Fix data layout string.

2017-06-23 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl added a comment.

Meta-question: shall we support only EABI or... 2 different ABIs? It seems it 
does not make any sense to support anything besides EABI.


https://reviews.llvm.org/D34562



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[PATCH] D29464: [MinGWToolChain] Don't use GCC headers on Win32

2017-03-06 Thread Anton Korobeynikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rL297005: Do not include GCC "resource" directory into the set 
of built-in include paths… (authored by asl).

Changed prior to commit:
  https://reviews.llvm.org/D29464?vs=87827&id=90661#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D29464

Files:
  cfe/trunk/lib/Driver/MinGWToolChain.cpp
  cfe/trunk/test/Driver/mingw.cpp

Index: cfe/trunk/test/Driver/mingw.cpp
===
--- cfe/trunk/test/Driver/mingw.cpp
+++ cfe/trunk/test/Driver/mingw.cpp
@@ -7,53 +7,41 @@
 // CHECK_MINGW_ORG_TREE: "{{.*}}/Inputs/mingw_mingw_org_tree/mingw{{/|}}lib{{/|}}gcc{{/|}}mingw32{{/|}}4.8.1{{/|}}include{{/|}}c++"
 // CHECK_MINGW_ORG_TREE: "{{.*}}/Inputs/mingw_mingw_org_tree/mingw{{/|}}lib{{/|}}gcc{{/|}}mingw32{{/|}}4.8.1{{/|}}include{{/|}}c++{{/|}}mingw32"
 // CHECK_MINGW_ORG_TREE: "{{.*}}{{/|}}Inputs/mingw_mingw_org_tree/mingw{{/|}}lib{{/|}}gcc{{/|}}mingw32{{/|}}4.8.1{{/|}}include{{/|}}c++{{/|}}backward"
-// CHECK_MINGW_ORG_TREE: "{{.*}}/Inputs/mingw_mingw_org_tree/mingw{{/|}}lib{{/|}}gcc{{/|}}mingw32{{/|}}4.8.1{{/|}}include"
-// CHECK_MINGW_ORG_TREE: "{{.*}}/Inputs/mingw_mingw_org_tree/mingw{{/|}}lib{{/|}}gcc{{/|}}mingw32{{/|}}4.8.1{{/|}}include-fixed"
 // CHECK_MINGW_ORG_TREE: "{{.*}}/Inputs/mingw_mingw_org_tree/mingw{{/|}}mingw32{{/|}}include"
 // CHECK_MINGW_ORG_TREE: {{.*}}/Inputs/mingw_mingw_org_tree/mingw{{/|}}include
 
 
 // RUN: %clang -target i686-pc-windows-gnu -rtlib=platform -stdlib=libstdc++ -c -### --sysroot=%S/Inputs/mingw_mingw_builds_tree/mingw32 %s 2>&1 | FileCheck -check-prefix=CHECK_MINGW_BUILDS_TREE %s
 // CHECK_MINGW_BUILDS_TREE: "{{.*}}/Inputs/mingw_mingw_builds_tree/mingw32{{/|}}i686-w64-mingw32{{/|}}include{{/|}}c++"
 // CHECK_MINGW_BUILDS_TREE: "{{.*}}/Inputs/mingw_mingw_builds_tree/mingw32{{/|}}i686-w64-mingw32{{/|}}include{{/|}}c++{{/|}}i686-w64-mingw32"
 // CHECK_MINGW_BUILDS_TREE: "{{.*}}/Inputs/mingw_mingw_builds_tree/mingw32{{/|}}i686-w64-mingw32{{/|}}include{{/|}}c++{{/|}}backward"
-// CHECK_MINGW_BUILDS_TREE: "{{.*}}/Inputs/mingw_mingw_builds_tree/mingw32{{/|}}lib{{/|}}gcc{{/|}}i686-w64-mingw32{{/|}}4.9.1{{/|}}include"
-// CHECK_MINGW_BUILDS_TREE: "{{.*}}/Inputs/mingw_mingw_builds_tree/mingw32{{/|}}lib{{/|}}gcc{{/|}}i686-w64-mingw32{{/|}}4.9.1{{/|}}include-fixed"
 // CHECK_MINGW_BUILDS_TREE: "{{.*}}/Inputs/mingw_mingw_builds_tree/mingw32{{/|}}i686-w64-mingw32{{/|}}include"
 
 
 // RUN: %clang -target i686-pc-windows-gnu -rtlib=platform -stdlib=libstdc++ -c -### --sysroot=%S/Inputs/mingw_msys2_tree/msys64/mingw32 %s 2>&1 | FileCheck -check-prefix=CHECK_MINGW_MSYS_TREE %s
 // CHECK_MINGW_MSYS_TREE: "{{.*}}/Inputs/mingw_msys2_tree/msys64{{/|}}mingw32{{/|}}include{{/|}}c++{{/|}}4.9.2"
 // CHECK_MINGW_MSYS_TREE: "{{.*}}/Inputs/mingw_msys2_tree/msys64/mingw32{{/|}}include{{/|}}c++{{/|}}4.9.2{{/|}}i686-w64-mingw32"
 // CHECK_MINGW_MSYS_TREE: "{{.*}}/Inputs/mingw_msys2_tree/msys64/mingw32{{/|}}include{{/|}}c++{{/|}}4.9.2{{/|}}backward"
-// CHECK_MINGW_MSYS_TREE:  "{{.*}}/Inputs/mingw_msys2_tree/msys64/mingw32{{/|}}lib{{/|}}gcc{{/|}}i686-w64-mingw32{{/|}}4.9.2{{/|}}include"
-// CHECK_MINGW_MSYS_TREE:  "{{.*}}/Inputs/mingw_msys2_tree/msys64/mingw32{{/|}}lib{{/|}}gcc{{/|}}i686-w64-mingw32{{/|}}4.9.2{{/|}}include-fixed"
 // CHECK_MINGW_MSYS_TREE: "{{.*}}/Inputs/mingw_msys2_tree/msys64/mingw32{{/|}}i686-w64-mingw32{{/|}}include"
 // CHECK_MINGW_MSYS_TREE: "{{.*}}/Inputs/mingw_msys2_tree/msys64/mingw32{{/|}}include"
 
 
 // RUN: %clang -target x86_64-pc-windows-gnu -rtlib=platform -stdlib=libstdc++ -c -### --sysroot=%S/Inputs/mingw_opensuse_tree/usr %s 2>&1 | FileCheck -check-prefix=CHECK_MINGW_OPENSUSE_TREE %s
 // CHECK_MINGW_OPENSUSE_TREE: "{{.*}}/Inputs/mingw_opensuse_tree/usr{{/|}}lib64{{/|}}gcc{{/|}}x86_64-w64-mingw32{{/|}}5.1.0{{/|}}include{{/|}}c++"
 // CHECK_MINGW_OPENSUSE_TREE: "{{.*}}/Inputs/mingw_opensuse_tree/usr{{/|}}lib64{{/|}}gcc{{/|}}x86_64-w64-mingw32{{/|}}5.1.0{{/|}}include{{/|}}c++{{/|}}x86_64-w64-mingw32"
 // CHECK_MINGW_OPENSUSE_TREE: "{{.*}}/Inputs/mingw_opensuse_tree/usr{{/|}}lib64{{/|}}gcc{{/|}}x86_64-w64-mingw32{{/|}}5.1.0{{/|}}include{{/|}}c++{{/|}}backward"
-// CHECK_MINGW_OPENSUSE_TREE: "{{.*}}/Inputs/mingw_opensuse_tree/usr{{/|}}lib64{{/|}}gcc{{/|}}x86_64-w64-mingw32{{/|}}5.1.0{{/|}}include"
 // CHECK_MINGW_OPENSUSE_TREE: "{{.*}}/Inputs/mingw_opensuse_tree/usr{{/|}}x86_64-w64-mingw32/sys-root/mingw/include"
-// CHECK_MINGW_OPENSUSE_TREE: "{{.*}}/Inputs/mingw_opensuse_tree/usr{{/|}}lib64{{/|}}gc

[PATCH] D29464: [MinGWToolChain] Don't use GCC headers on Win32

2017-02-14 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl accepted this revision.
asl added a comment.
This revision is now accepted and ready to land.

We shouldn't add resource dirs to the path. After all, these headers could use, 
for example, gcc-only extensions.


https://reviews.llvm.org/D29464



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[PATCH] D28344: [AVR] Add support for the full set of inline asm constraints

2017-02-06 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl accepted this revision.
asl added inline comments.
This revision is now accepted and ready to land.



Comment at: lib/Basic/Targets.cpp:8570
+}
   }
 

don't you want to have "return false" here, just to silence warning for some 
compilers?


https://reviews.llvm.org/D28344



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[PATCH] D28346: [AVR] Allow specifying the CPU on the command line

2017-02-06 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl accepted this revision.
asl added a comment.
This revision is now accepted and ready to land.

LGTM with minor style nit




Comment at: lib/Basic/Targets.cpp:8733
+  auto It = std::find_if(AVRMcus.begin(),
+AVRMcus.end(),
+[&](const MCUInfo &Info) { return Info.Name == this->CPU; });

Minor style nit: I'd prefer end() to be on prev. line (like below)


https://reviews.llvm.org/D28346



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[PATCH] D28344: [AVR] Add support for the full set of inline asm constraints

2017-02-04 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl added inline comments.



Comment at: test/CodeGen/avr-inline-asm-constraints.c:2
+// REQUIRES: avr-registered-target
+// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm -o - %s | FileCheck 
%s
+

You need checks for multi-character stuff and unsupported constraints.


https://reviews.llvm.org/D28344



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[PATCH] D28346: [AVR] Allow specifying the CPU on the command line

2017-02-04 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl added inline comments.



Comment at: test/CodeGen/avr/target-cpu-defines/atmega328p.c:1
+// RUN: %clang_cc1 -triple avr-unknown-unknown -target-cpu atmega328p 
-emit-llvm %s -o - | FileCheck %s
+

This looks wrong. How you're using FileCheck? Consider dumping pre-built 
defines and checking the output.



Comment at: test/CodeGen/avr/target-cpu-defines/attiny104.c:1
+// RUN: %clang_cc1 -triple avr-unknown-unknown -target-cpu attiny104 
-emit-llvm %s -o - | FileCheck %s
+

Same issue here and in all the tests.


https://reviews.llvm.org/D28346



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[PATCH] D29464: [MinGWToolChain] Don't use GCC headers on Win32

2017-02-04 Thread Anton Korobeynikov via Phabricator via cfe-commits 
asl requested changes to this revision.
asl added inline comments.
This revision now requires changes to proceed.



Comment at: lib/Driver/MinGWToolChain.cpp:211
 
+#ifndef LLVM_ON_WIN32
   if (GetRuntimeLibType(DriverArgs) == ToolChain::RLT_Libgcc) {

This check is certainly wrong because it checks for host, not for target.


https://reviews.llvm.org/D29464



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