[PATCH] D132538: [AArch64] Filter out invalid code model in frontend.

This revision was automatically updated to reflect the committed changes. Closed by commit rGa8690143057b: [AArch64] Filter out invalid code model in frontend. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D132538/new/ https:

[PATCH] D132538: [AArch64] Filter out invalid code model in frontend.

HsiangKai added inline comments. Comment at: clang/test/Driver/mcmodel.c:9 // RUN: not %clang -c -mcmodel=lager %s 2>&1 | FileCheck --check-prefix=INVALID %s +// RUN: %clang -target aarch64 -### -c -mcmodel=medium %s 2>&1 | FileCheck --check-prefix=AARCH64-MEDIUM %s +// RUN: %

[PATCH] D132538: [AArch64] Filter out invalid code model in frontend.

HsiangKai updated this revision to Diff 455454. HsiangKai added a comment. Make the test lines consistent. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D132538/new/ https://reviews.llvm.org/D132538 Files: clang/lib/Driver/ToolChains/Clang.cpp

[PATCH] D132538: [AArch64] Filter out invalid code model in frontend.

HsiangKai created this revision. HsiangKai added reviewers: aemerson, paquette. Herald added subscribers: StephenFan, kristof.beyls. Herald added a project: All. HsiangKai requested review of this revision. Herald added subscribers: cfe-commits, MaskRay. Herald added a project: clang. AArch64 only

[PATCH] D115430: [Clang][RISCV] Fix upper bound of RISC-V V type in debug info

HsiangKai accepted this revision. HsiangKai added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115430/new/ https://reviews.llvm.org/D115430

[PATCH] D112534: [PoC][RISCV] Use an attribute to declare C intrinsics with different policy.

HsiangKai updated this revision to Diff 395365. HsiangKai added a comment. Herald added subscribers: llvm-commits, hiraditya. Herald added a project: LLVM. In riscv-insert-vsetvli, use the policy argument. No use implicit-def maskedoff to adjust the setting. Repository: rG LLVM Github Monorep

[PATCH] D112534: [PoC][RISCV] Use an attribute to declare C intrinsics with different policy.

HsiangKai updated this revision to Diff 394782. HsiangKai added a comment. Herald added a subscriber: jdoerfert. Update attribute test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112534/new/ https://reviews.llvm.org/D112534 Files: clang

[PATCH] D112534: [PoC][RISCV] Use an attribute to declare C intrinsics with different policy.

HsiangKai updated this revision to Diff 394766. HsiangKai added a comment. Fix build errors. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112534/new/ https://reviews.llvm.org/D112534 Files: clang/include/clang/Basic/Attr.td clang/include/clan

[PATCH] D112534: [PoC][RISCV] Use an attribute to declare C intrinsics with different policy.

HsiangKai updated this revision to Diff 394751. HsiangKai added a comment. Address @craig.topper and @frasercrmck's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112534/new/ https://reviews.llvm.org/D112534 Files: clang/include/clang/B

[PATCH] D112534: [PoC][RISCV] Use an attribute to declare C intrinsics with different policy.

HsiangKai added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:18610 unsigned NF = 1; constexpr unsigned TAIL_UNDISTURBED = 0; + constexpr unsigned TAIL_AGNOSTIC = 0b01; HsiangKai wrote: > craig.topper wrote: > > Is constant still used? > Yes

[PATCH] D112534: [PoC][RISCV] Use an attribute to declare C intrinsics with different policy.

HsiangKai added inline comments. Herald added subscribers: VincentWu, luke957. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:18610 unsigned NF = 1; constexpr unsigned TAIL_UNDISTURBED = 0; + constexpr unsigned TAIL_AGNOSTIC = 0b01; craig.topper wrote: > Is c

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai added a comment. In D111617#3183146 , @HsiangKai wrote: > Release build: > Before this patch: > > text data bssdec hex > 115471733 7987112 443760 123902605 7629a8d ./bin/clang > > After this patch:

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai added a comment. Release build: Before this patch: text data bssdec hex 115471733 7987112 443760 123902605 7629a8d ./bin/clang After this patch: text data bssdec hex 117568981 7996376 443760 1260

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai added a comment. In D111617#3175167 , @craig.topper wrote: > In D111617#3060377 , @HsiangKai > wrote: > >> Although it reduces the header size, this patch will increase the binary >> size of clang. >>

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai updated this revision to Diff 391948. HsiangKai added a comment. - Use unique_ptr. - Avoid to create static global constructors. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111617/new/ https://reviews.llvm.org/D111617 Files: clang/in

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai updated this revision to Diff 390198. HsiangKai added a comment. Address a part of comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111617/new/ https://reviews.llvm.org/D111617 Files: clang/include/clang/Basic/CMakeLists.txt c

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai updated this revision to Diff 31. HsiangKai added a comment. Update the implementation of getMangledName(). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111617/new/ https://reviews.llvm.org/D111617 Files: clang/include/clang/Basic

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai added a comment. The clang binary size increases about +1.4%. Compared to +2.3% previously, it is better in the implementation. The test time of lit testing under `clang/test/CodeGen/RISCV/` is 25.59s. It spends 112.07s without this patch in my local environment. Repository: rG LL

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai updated this revision to Diff 387489. HsiangKai added a comment. Rebase. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111617/new/ https://reviews.llvm.org/D111617 Files: clang/include/clang/Basic/CMakeLists.txt clang/include/clang/B

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai updated this revision to Diff 387488. HsiangKai added a comment. Check required extensions when adding the declarations. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111617/new/ https://reviews.llvm.org/D111617 Files: clang/include/cl

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai updated this revision to Diff 387472. HsiangKai added a comment. Herald added subscribers: VincentWu, luke957, mgrang. Restructure the data structure to reuse information between C intrinsics. In this way, we can have a smaller binary size and speed up the lookup for the C intrinsics.

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai added a comment. In D111617#3076994 , @rogfer01 wrote: > In D111617#3060377 , @HsiangKai > wrote: > >> Although it reduces the header size, this patch will increase the binary >> size of clang. > > Opt

[PATCH] D112534: [PoC][RISCV] Use an attribute to declare C intrinsics with different policy.

HsiangKai updated this revision to Diff 382529. HsiangKai added a comment. Address @craig.topper's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112534/new/ https://reviews.llvm.org/D112534 Files: clang/include/clang/Basic/Attr.td cl

[PATCH] D112534: [PoC][RISCV] Use an attribute to declare C intrinsics with different policy.

HsiangKai updated this revision to Diff 382298. HsiangKai added a comment. Remove redundant test case. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112534/new/ https://reviews.llvm.org/D112534 Files: clang/include/clang/Basic/Attr.td clang/in

[PATCH] D112534: [PoC][RISCV] Use an attribute to declare C intrinsics with different policy.

HsiangKai created this revision. HsiangKai added reviewers: kito-cheng, craig.topper, frasercrmck, rogfer01. Herald added subscribers: achieveartificialintelligence, StephenFan, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, Ma

[PATCH] D112398: [RISCV] Add ABI testing for Float16.

HsiangKai created this revision. HsiangKai added reviewers: craig.topper, kito-cheng, frasercrmck, rogfer01. Herald added subscribers: achieveartificialintelligence, StephenFan, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, Ma

[PATCH] D112102: [RISCV] Reduce the number of RISCV vector builtins by an order of magnitude.

HsiangKai added a comment. It looks good to me. Wait for others' opinions. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112102/new/ https://reviews.llvm.org/D112102 ___ cfe-commits mailing list cfe-comm

[PATCH] D112102: [RISCV] Reduce the number of RISCV vector builtins by an order of magnitude.

HsiangKai added a comment. In D112102#3075400 , @craig.topper wrote: > In D112102#3074656 , @frasercrmck > wrote: > >> Minor typo in the description: `differnet` >> >> Does this help with compile times, binary s

[PATCH] D112102: [RISCV] Reduce the number of RISCV vector builtins by an order of magnitude.

HsiangKai added a comment. In D112102#3074656 , @frasercrmck wrote: > Minor typo in the description: `differnet` > > Does this help with compile times, binary sizes, etc? After this patch, we may be able to consider removing all type ending C APIs. Oth

[PATCH] D112102: [RISCV] Reduce the number of RISCV vector builtins by an order of magnitude.

HsiangKai added inline comments. Comment at: llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll:1358 +; CHECK-NEXT:vsetvli zero, a0, e16, mf4, ta, mu +; CHECK-NEXT:vmerge.vvm v8, v8, v9, v0 +; CHECK-NEXT:ret frasercrmck wrote: > HsiangKai wrote: > > vmerge.vv

[PATCH] D112020: [RISCV] Use clang_builtin_alias for all RISCV vector intrinsics.

HsiangKai accepted this revision. HsiangKai added a comment. This revision is now accepted and ready to land. I ran tests under `clang/test/CodeGen/RISCV/rvv-intrinsics/`. It spent a little more time to run the tests. (previous: 84.01s; apply this patch: 96.43s in my local environment.) We could

[PATCH] D112020: [RISCV] Use clang_builtin_alias for all RISCV vector intrinsics.

HsiangKai added a comment. In D112020#3074557 , @HsiangKai wrote: > After preprocessing, macro definitions will disappear, but function > declarations will not. This is the benefit of using macro. > > After applying D112102

[PATCH] D112020: [RISCV] Use clang_builtin_alias for all RISCV vector intrinsics.

HsiangKai added a comment. After preprocessing, macro definitions will disappear, but function declarations will not. This is the benefit of using macro. After applying D112102 , we could still use #define vadd_vv_i8m1(op0, op1, op2) \ __builtin_rvv_vadd_vv

[PATCH] D112102: [RISCV] Reduce the number of RISCV vector builtins by an order of magnitude.

HsiangKai added inline comments. Comment at: llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll:1358 +; CHECK-NEXT:vsetvli zero, a0, e16, mf4, ta, mu +; CHECK-NEXT:vmerge.vvm v8, v8, v9, v0 +; CHECK-NEXT:ret vmerge.vvm is for integer vectors, doesn't it? Why

[PATCH] D111692: [RISCV] Remove Zvamo C intrinsics and builtins.

HsiangKai accepted this revision. HsiangKai added a comment. This revision is now accepted and ready to land. Zvamo is not a part of standard V extension in the current stage. I am fine to remove it in the implementation. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https:

[PATCH] D111923: [RISCV] Split RISCV vector builtins into their own file and namespace.

HsiangKai accepted this revision. HsiangKai added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111923/new/ https://reviews.llvm.org/D111923

[PATCH] D112028: [RISCV] Remove the HasSideEffects property from riscv_vector.td

HsiangKai accepted this revision. HsiangKai added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112028/new/ https://reviews.llvm.org/D112028

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai added a comment. As discussed in D110684 , developers complain not only compile time, but also binary size & memory usage caused by RVV intrinsics. We need to consider binary size, too. Is there other way to handle it? Or we should go back to think ab

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai added a comment. Although it reduces the header size, this patch will increase the binary size of clang. Debug build: Before this patch: textdatabss dec hex filename 263892591 10838284500232 275231

[PATCH] D110684: [RISCV] Define _m intrinsics as builtins, instead of macros.

HsiangKai added a comment. We are working on a patch, D111617 , to reduce the large header size caused by abundant RISC-V vector intrinsics. From the measurement depicted in D103228 , it should be helpful for compile time. Rep

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai added inline comments. Comment at: clang/lib/Sema/SemaLookup.cpp:923 + + const RVVIntrinsicInfo *Intrinsic = std::find_if( + std::begin(RVVIntrinsicInfos), std::end(RVVIntrinsicInfos), kito-cheng wrote: > rogfer01 wrote: > > Not for this patch: I

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

HsiangKai created this revision. HsiangKai added reviewers: khchen, craig.topper, rogfer01, kito-cheng. Herald added subscribers: achieveartificialintelligence, StephenFan, vkmr, frasercrmck, dexonsmith, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, t

[PATCH] D110684: [RISCV] Define _m intrinsics as builtins, instead of macros.

This revision was automatically updated to reflect the committed changes. Closed by commit rG97f0c63783f5: [RISCV] Define _m intrinsics as builtins, instead of macros. (authored by HsiangKai). Changed prior to commit: https://reviews.llvm.org/D110684?vs=376890&id=378859#toc Repository: rG LL

[PATCH] D110684: [RISCV] Define _m intrinsics as builtins, instead of macros.

HsiangKai added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110684/new/ https://reviews.llvm.org/D110684 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

HsiangKai added a comment. Herald added a subscriber: achieveartificialintelligence. I think we could restart to review this patch. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105690/new/ https://reviews.llvm.org/D105690

[PATCH] D106044: [RISCV] Update to vlm.v and vsm.v according to v1.0-rc1.

HsiangKai added a comment. Herald added a subscriber: achieveartificialintelligence. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106044/new/ https://reviews.llvm.org/D106044 ___ cfe-commits maili

[PATCH] D110684: [RISCV] Define _m intrinsics as builtins, instead of macros.

HsiangKai updated this revision to Diff 376890. HsiangKai added a comment. Update test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110684/new/ https://reviews.llvm.org/D110684 Files: clang/include/clang/Basic/IdentifierTable.h clang/i

[PATCH] D110684: [RISCV] Define _m intrinsics as builtins, instead of macros.

HsiangKai created this revision. HsiangKai added reviewers: craig.topper, rogfer01, frasercrmck. Herald added subscribers: achieveartificialintelligence, StephenFan, vkmr, dexonsmith, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, Ma

[PATCH] D109322: [RISCV] (2/2) Add the tail policy argument to builtins/intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG7afa61e71877: [RISCV] (2/2) Add the tail policy argument to builtins/intrinsics. (authored by HsiangKai). Changed prior to commit: https://reviews

[PATCH] D105092: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG7d39a8a92122: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics. (authored by HsiangKai). Changed prior to commit: https://reviews

[PATCH] D105092: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.

HsiangKai added inline comments. Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:162 // For unit stride load with mask // Input: (maskedoff, pointer, mask, vl) class RISCVUSLoadMask khchen wrote: > maybe we could have another NFC patch to update thos

[PATCH] D105092: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.

HsiangKai added a comment. Herald added a subscriber: achieveartificialintelligence. I will wait for https://reviews.llvm.org/D109322 be accepted. These two patches need to get in together. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105092/new/

[PATCH] D109322: [RISCV] (2/2) Add the tail policy argument to builtins/intrinsics.

HsiangKai added inline comments. Comment at: clang/include/clang/Basic/riscv_vector.td:2186 +}] in +def policy : RVVHeader; khchen wrote: > It seems like we can rewrite `vsetvli/vsetvl` and ` vsetvlmax` instructions > by using the `RVVHeader` mechanism? > We onl

[PATCH] D105092: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.

HsiangKai updated this revision to Diff 371499. HsiangKai added a comment. Address comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105092/new/ https://reviews.llvm.org/D105092 Files: llvm/include/llvm/IR/IntrinsicsRISCV.td llvm/lib/Tar

[PATCH] D105092: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.

HsiangKai updated this revision to Diff 370980. HsiangKai added a comment. Use timm for the $policy argument in the patterns. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105092/new/ https://reviews.llvm.org/D105092 Files: llvm/include/llvm/IR/

[PATCH] D109322: [RISCV] (2/2) Add the tail policy argument to builtins/intrinsics.

HsiangKai added a comment. I didn't attach all the test update in this patch. It is too huge to collect them in one patch. I ever ran `check-clang` and all tests pass after I updated all the clang test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.l

[PATCH] D105092: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.

HsiangKai added a comment. Clang part: https://reviews.llvm.org/D109322 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105092/new/ https://reviews.llvm.org/D105092 ___ cfe-commits mailing list cfe-commits

[PATCH] D105092: [RISCV] Add the tail policy argument to builtins/intrinsics.

HsiangKai updated this revision to Diff 370440. HsiangKai added a comment. Address comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105092/new/ https://reviews.llvm.org/D105092 Files: llvm/include/llvm/IR/IntrinsicsRISCV.td llvm/lib/Tar

[PATCH] D105092: [RISCV] Add the tail policy argument to builtins/intrinsics.

HsiangKai updated this revision to Diff 370285. HsiangKai added a comment. Update. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105092/new/ https://reviews.llvm.org/D105092 Files: llvm/include/llvm/IR/IntrinsicsRISCV.td llvm/lib/Target/RISCV/

[PATCH] D106738: [RISCV] Use getNaturalPointeeTypeAlignment to get alignment for stores created for vector builtins.

HsiangKai accepted this revision. HsiangKai added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106738/new/ https://reviews.llvm.org/D106738

[PATCH] D107433: [RISCV] Half-precision for vget/vset.

This revision was automatically updated to reflect the committed changes. Closed by commit rG5f996705e0ca: [RISCV] Half-precision for vget/vset. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D107433/new/ https://reviews.llvm.

[PATCH] D107433: [RISCV] Half-precision for vget/vset.

HsiangKai updated this revision to Diff 365065. HsiangKai added a comment. Update test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D107433/new/ https://reviews.llvm.org/D107433 Files: clang/include/clang/Basic/riscv_vector.td clang/tes

[PATCH] D107433: [RISCV] Half-precision for vget/vset.

HsiangKai created this revision. HsiangKai added reviewers: craig.topper, rogfer01, frasercrmck, khchen. Herald added subscribers: StephenFan, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng,

[PATCH] D107139: [RISCV] Rename vector inline constraint from 'v' to 'vr' and 'vm' in IR.

This revision was automatically updated to reflect the committed changes. Closed by commit rG8b33839f010f: [RISCV] Rename vector inline constraint from 'v' to 'vr' and 'vm' in IR. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org

[PATCH] D107139: [RISCV] Rename vector inline constraint from 'v' to 'vr' and 'vm' in IR.

HsiangKai updated this revision to Diff 363241. HsiangKai added a comment. Use '^' instead of '@2'. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D107139/new/ https://reviews.llvm.org/D107139 Files: clang/lib/Basic/Targets/RISCV.cpp clang/test/

[PATCH] D107139: [RISCV] Rename vector inline constraint from 'v' to 'vr' and 'vm' in IR.

HsiangKai created this revision. HsiangKai added reviewers: craig.topper, khchen, kito-cheng, frasercrmck, rogfer01. Herald added subscribers: StephenFan, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jo

[PATCH] D106939: [RISCV] If the maskedoff is vundefined(), use ta, ma for vsetvli.

HsiangKai added a comment. In D106939#2915134 , @HsiangKai wrote: > In D106939#2912807 , @frasercrmck > wrote: > >> LGTM but there are test failures. Is that just a whole load of `mu->ma` >> changes that have be

[PATCH] D106939: [RISCV] If the maskedoff is vundefined(), use ta, ma for vsetvli.

HsiangKai added a comment. In D106939#2912807 , @frasercrmck wrote: > LGTM but there are test failures. Is that just a whole load of `mu->ma` > changes that have been omitted for a smaller diff? Updated test cases are put in https://reviews.llvm.org/D1

[PATCH] D106939: [RISCV] If the maskedoff is vundefined(), use ta, ma for vsetvli.

HsiangKai updated this revision to Diff 362920. HsiangKai added a comment. - Add more comments. - Remove unnecessary `--riscv-no-aliases` in the test case. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106939/new/ https://reviews.llvm.org/D106939

[PATCH] D106939: [RISCV] If the maskedoff is vundefined(), use ta, ma for vsetvli.

HsiangKai updated this revision to Diff 362617. HsiangKai added a comment. Address comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106939/new/ https://reviews.llvm.org/D106939 Files: clang/test/CodeGen/RISCV/rvv-intrinsics/maskedoff-unde

[PATCH] D106939: [RISCV] If the maskedoff is vundefined(), use ta, ma for vsetvli.

HsiangKai created this revision. HsiangKai added reviewers: frasercrmck, khchen, arcbbb, rogfer01, evandro, craig.topper. Herald added subscribers: StephenFan, vkmr, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones,

[PATCH] D106518: [RISCV] Disable EEW=64 for index values when XLEN=32.

HsiangKai added inline comments. Comment at: clang/include/clang/Basic/riscv_vector.td:680 foreach type = TypeList in { -foreach eew_list = EEWList in { +foreach eew_list = Xlen32EEWList in { defvar eew = eew_list[0]; There is no

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

HsiangKai added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:10 /// This file describes the RISC-V instructions from the standard 'V' Vector /// extension, version 0.10. /// This version is still experimental as the 'V' extension hasn't been --

[PATCH] D103873: [Clang][RISCV] Implement vsoxseg and vsuxseg.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG698f288fa16c: [Clang][RISCV] Implement vsoxseg and vsuxseg. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTIO

[PATCH] D103809: [Clang][RISCV] Implement vloxseg and vluxseg.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG1c55033ea16f: [Clang][RISCV] Implement vloxseg and vluxseg. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTIO

[PATCH] D103796: [Clang][RISCV] Implement vlsseg.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGa9de8f7a5391: [Clang][RISCV] Implement vlsseg. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://r

[PATCH] D106340: [Clang][RISCV] Add half-precision FP for vle16/vse16.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG89ce6449024d: [Clang][RISCV] Add half-precision FP for vle16/vse16. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LA

[PATCH] D103873: [Clang][RISCV] Implement vsoxseg and vsuxseg.

HsiangKai updated this revision to Diff 360042. HsiangKai added a comment. Remove RV32 test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103873/new/ https://reviews.llvm.org/D103873 Files: clang/include/clang/Basic/riscv_vector.td clan

[PATCH] D103809: [Clang][RISCV] Implement vloxseg and vluxseg.

HsiangKai updated this revision to Diff 360026. HsiangKai added a comment. Remove RV32 test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103809/new/ https://reviews.llvm.org/D103809 Files: clang/include/clang/Basic/riscv_vector.td clan

[PATCH] D103796: [Clang][RISCV] Implement vlsseg.

HsiangKai updated this revision to Diff 360024. HsiangKai added a comment. Remove RV32 test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103796/new/ https://reviews.llvm.org/D103796 Files: clang/include/clang/Basic/riscv_vector.td clan

[PATCH] D103809: [Clang][RISCV] Implement vloxseg and vluxseg.

HsiangKai updated this revision to Diff 360013. HsiangKai added a comment. Correct alignment. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103809/new/ https://reviews.llvm.org/D103809 Files: clang/include/clang/Basic/riscv_vector.td clang/tes

[PATCH] D106340: [Clang][RISCV] Add half-precision FP for vle16/vse16.

HsiangKai created this revision. HsiangKai added a reviewer: craig.topper. Herald added subscribers: StephenFan, vkmr, frasercrmck, dexonsmith, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzh

[PATCH] D106255: [Clang][RISCV] Correct the alignment of stores generated by vlseg/vlsegff.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG0d22dee2ca59: [Clang][RISCV] Correct the alignment of stores generated by vlseg/vlsegff. (authored by HsiangKai). Repository: rG LLVM Github Monor

[PATCH] D105001: [Clang][RISCV] Support half-precision floating point for RVV intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG77bb82d06856: [Clang][RISCV] Support half-precision floating point for RVV intrinsics. (authored by HsiangKai). Changed prior to commit: https://r

[PATCH] D106255: [Clang][RISCV] Correct the alignment of stores generated by vlseg/vlsegff.

HsiangKai updated this revision to Diff 359718. HsiangKai added a comment. Update vlsegff test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106255/new/ https://reviews.llvm.org/D106255 Files: clang/include/clang/Basic/riscv_vector.td c

[PATCH] D106255: [Clang][RISCV] Correct the alignment of stores generated by vlseg/vlsegff.

HsiangKai created this revision. HsiangKai added reviewers: craig.topper, frasercrmck, rogfer01. Herald added subscribers: StephenFan, vkmr, dexonsmith, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzhe

[PATCH] D103796: [Clang][RISCV] Implement vlsseg.

HsiangKai updated this revision to Diff 359703. HsiangKai added a comment. Correct the alignment of store. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103796/new/ https://reviews.llvm.org/D103796 Files: clang/include/clang/Basic/riscv_vector.t

[PATCH] D105001: [Clang][RISCV] Support half-precision floating point for RVV intrinsics.

HsiangKai updated this revision to Diff 359667. HsiangKai added a comment. Add else and llvm_unreachable() for unhandled floating types. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105001/new/ https://reviews.llvm.org/D105001 Files: clang/incl

[PATCH] D105001: [Clang][RISCV] Support half-precision floating point for RVV intrinsics.

HsiangKai updated this revision to Diff 359178. HsiangKai added a comment. Remove RV32 test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105001/new/ https://reviews.llvm.org/D105001 Files: clang/include/clang/Basic/Builtins.def clang/i

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

HsiangKai added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:926 +def : InstAlias<"vfredsum.vs $vd, $vs2, $vs1$vm", +(VFREDUSUM_VS VR:$vd, VR:$vs2, VR:$vs1, VMaskOp:$vm)>; + How about to set the `Emit` to 0 to lower the pr

[PATCH] D106049: [RISCV] Update to vfredusum.vs and vfwredusum.vs according to v1.0-rc1.

HsiangKai abandoned this revision. HsiangKai added a comment. In D106049#2879422 , @frasercrmck wrote: > Duplicate of D105690 ? I didn't aware of it. Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST A

[PATCH] D106044: [RISCV] Update to vcpop.m, vlm.v and vsm.v according to v1.0-rc1.

HsiangKai added a comment. In D106044#2879361 , @rogfer01 wrote: > I'm confused because the PDF at > https://github.com/riscv/riscv-v-spec/releases/tag/v1.0-rc1 doesn't seem to > describe `vcpop.m`. > > I can see this has changed in the ToT > https:/

[PATCH] D105092: [PoC][RISCV] Add the tail policy argument to builtins/intrinsics.

HsiangKai updated this revision to Diff 358205. HsiangKai added a comment. Add the TA argument to most of the intrinsics with mask. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105092/new/ https://reviews.llvm.org/D105092 Files: clang/include/c

[PATCH] D105001: [Clang][RISCV] Support half-precision floating point for RVV intrinsics.

HsiangKai added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105001/new/ https://reviews.llvm.org/D105001 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[PATCH] D103873: [Clang][RISCV] Implement vsoxseg and vsuxseg.

HsiangKai added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103873/new/ https://reviews.llvm.org/D103873 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[PATCH] D103872: [Clang][RISCV] Implement vssseg.

HsiangKai added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103872/new/ https://reviews.llvm.org/D103872 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[PATCH] D103871: [Clang][RISCV] Implement vsseg.

HsiangKai added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103871/new/ https://reviews.llvm.org/D103871 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[PATCH] D103809: [Clang][RISCV] Implement vloxseg and vluxseg.

HsiangKai added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103809/new/ https://reviews.llvm.org/D103809 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[PATCH] D103796: [Clang][RISCV] Implement vlsseg.

HsiangKai added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103796/new/ https://reviews.llvm.org/D103796 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[PATCH] D103873: [Clang][RISCV] Implement vsoxseg and vsuxseg.

HsiangKai updated this revision to Diff 357720. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103873/new/ https://reviews.llvm.org/D103873 Files: clang/include/clang/Basic/riscv_vector.td clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsoxse

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