[PATCH] D107668: [OpenMP]Fix PR50336: Remove temporary files in the offload bundler tool

Naghasan added a comment. Thanks for your answer, make sense. If we are moving away I won't bother looking fixing my issue upstream as it is very niche (I don't think you can trigger this with the upstream clang driver). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D107668: [OpenMP]Fix PR50336: Remove temporary files in the offload bundler tool

Naghasan added a comment. Herald added a subscriber: MaskRay. Herald added a project: All. Any rational for not calling `addTempFile` during the binding rather than the call setup ? I had a brief look there and it seems to me this is the root of the problem. I got bitten by this patch in a

[PATCH] D114483: [SYCL] Add support for sycl_special_class attribute

Naghasan accepted this revision. Naghasan added a comment. LGTM, thanks for the work CHANGES SINCE LAST ACTION https://reviews.llvm.org/D114483/new/ https://reviews.llvm.org/D114483 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D112718: Add intrinsics and builtins for PTX atomics with semantic orders

Naghasan added inline comments. Comment at: clang/include/clang/Basic/BuiltinsNVPTX.def:1057 + +BUILTIN(__nvvm_atom_xchg_global_i, "iiD*i", "n") +TARGET_BUILTIN(__nvvm_atom_cta_xchg_global_i, "iiD*i", "n", SM_60) tra wrote: > t4c1 wrote: > > tra wrote: > > >

[PATCH] D114483: [SYCL] Add support for sycl_special_class attribute

Naghasan added a comment. Just a few comments Comment at: clang/include/clang/Basic/AttrDocs.td:411-413 +The ``__attribute__((sycl_special_class))`` attribute is used in SYCL +headers to indicate that a class or a struct needs additional implementation when +it is passed from

[PATCH] D114080: [SYCL] Diagnose uses of zero length arrays

Naghasan added a comment. In D114080#3137480 , @aaron.ballman wrote: > In D114080#3137462 , @Naghasan > wrote: > >> right, TIL `sizeof (ContainsArr)` is 0 according to clang. I can see trouble >> arising. >>

[PATCH] D114080: [SYCL] Diagnose uses of zero length arrays

Naghasan added a comment. right, TIL `sizeof (ContainsArr)` is 0 according to clang. I can see trouble arising. @aaron.ballman maybe you know better, is that intended for the extension ? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D114080/new/

[PATCH] D114080: [SYCL] Diagnose uses of zero length arrays

Naghasan added a comment. Why the need for this restriction ? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D114080/new/ https://reviews.llvm.org/D114080 ___ cfe-commits mailing list

[PATCH] D99190: [SYCL] Add design document for SYCL mode

Naghasan accepted this revision. Naghasan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D99190/new/ https://reviews.llvm.org/D99190 ___ cfe-commits mailing list

[PATCH] D99190: [SYCL] Add design document for SYCL mode

Naghasan added inline comments. Comment at: clang/docs/SYCLSupport.md:123 +traverse all symbols accessible from kernel functions and add them to the +"device part" of the code marking them with the new SYCL device attribute. + bader wrote: > Naghasan wrote: > >

[PATCH] D99488: [SYCL][Doc] Add address space handling section to SYCL documentation

Naghasan added inline comments. Comment at: clang/docs/SYCLSupport.md:909 +| `__attribute__((opencl_local))` | local_space | +| `__attribute__((opencl_private))` | private_space | + bader wrote: > Anastasia wrote: > > Since SYCL spec has constant AS you should

[PATCH] D99190: WIP: [SYCL] Add design document for SYCL mode

Naghasan added inline comments. Comment at: clang/docs/SYCLSupport.md:123 +traverse all symbols accessible from kernel functions and add them to the +"device part" of the code marking them with the new SYCL device attribute. + ABataev wrote: > bader wrote: > >

[PATCH] D99488: [SYCL][Doc] Add address space handling section to SYCL documentation

Naghasan added inline comments. Comment at: clang/docs/SYCLSupport.md:914-919 +Default address space represents "Generic-memory", which is a virtual address +space which overlaps the global, local and private address spaces. SYCL mode +enables conversion to/from default address

[PATCH] D99190: WIP: [SYCL] Add design document for SYCL mode

Naghasan requested changes to this revision. Naghasan added a comment. This revision now requires changes to proceed. Added comment for the front end support part. I think the document present to much at once, front-end, driver, tool chains, SPIR-V backend, compiler-runtime bindings etc. It is

[PATCH] D87282: [SYCL] Assume SYCL device functions are convergent

Naghasan accepted this revision. Naghasan added a comment. This revision is now accepted and ready to land. Change make sense to me (same rational as CUDA or OpenCL). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87282/new/

[PATCH] D80932: [SYCL] Make default address space a superset of OpenCL address spaces.

Naghasan added a comment. In D80932#2072064 , @Anastasia wrote: > In D80932#2071321 , @bader wrote: > > > In D80932#2068863 , @Anastasia > > wrote: > > > > > > > > > > > >

[PATCH] D72857: [SYCL] Driver option to enable SYCL mode and select SYCL version

Naghasan added inline comments. Comment at: clang/include/clang/Basic/LangOptions.def:206 LANGOPT(OpenCLCPlusPlusVersion , 32, 0, "C++ for OpenCL version") +ENUM_LANGOPT(SYCLVersion, SYCLVersionList, 4, SYCLVersionList::undefined, "Version of the SYCL standard used")

[PATCH] D57768: [SYCL] Add SYCL device compilation flow.

Naghasan accepted this revision. Naghasan added a subscriber: Anastasia. Naghasan added a comment. LGTM Side note: might be good to also involve @Anastasia, as some of the future patches will overlap with OpenCL. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION