subject:"\[PATCH\] D106959\: \[PowerPC\] swdiv builtins for XL compatibility"

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-09-29 Thread Quinn Pham via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG67a3d1e27551: [PowerPC] swdiv builtins for XL compatibility 
(authored by quinnp).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106959/new/

https://reviews.llvm.org/D106959

Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
  llvm/test/CodeGen/PowerPC/fdiv.ll

Index: llvm/test/CodeGen/PowerPC/fdiv.ll
===
--- llvm/test/CodeGen/PowerPC/fdiv.ll
+++ llvm/test/CodeGen/PowerPC/fdiv.ll
@@ -23,3 +23,16 @@
   %3 = fdiv contract reassoc arcp nsz ninf float %0, %1
   ret float %3
 }
+
+define dso_local float @fdiv_fast(float %0, float %1) local_unnamed_addr {
+; CHECK-LABEL: fdiv_fast:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:xsresp 3, 2
+; CHECK-NEXT:xsmulsp 0, 1, 3
+; CHECK-NEXT:xsnmsubasp 1, 2, 0
+; CHECK-NEXT:xsmaddasp 0, 3, 1
+; CHECK-NEXT:fmr 1, 0
+; CHECK-NEXT:blr
+  %3 = fdiv fast float %0, %1
+  ret float %3
+}
Index: clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
===
--- /dev/null
+++ clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
@@ -0,0 +1,80 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -ffast-math -ffp-contract=fast \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix CHECK-OFAST
+
+extern double a;
+extern double b;
+extern float c;
+extern float d;
+
+// CHECK-LABEL:   @test_swdiv(
+// CHECK: [[TMP0:%.*]] = load double, double* @a
+// CHECK-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-NEXT:[[SWDIV:%.*]] = fdiv double [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret double [[SWDIV]]
+//
+// CHECK-OFAST-LABEL:   @test_swdiv(
+// CHECK-OFAST: [[TMP0:%.*]] = load double, double* @a
+// CHECK-OFAST-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-OFAST-NEXT:[[SWDIV:%.*]] = fdiv fast double [[TMP0]], [[TMP1]]
+// CHECK-OFAST-NEXT:ret double [[SWDIV]]
+//
+double test_swdiv() {
+  return __swdiv(a, b);
+}
+
+// CHECK-LABEL:   @test_swdivs(
+// CHECK: [[TMP0:%.*]] = load float, float* @c
+// CHECK-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-NEXT:[[SWDIVS:%.*]] = fdiv float [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret float [[SWDIVS]]
+//
+// CHECK-OFAST-LABEL:   @test_swdivs(
+// CHECK-OFAST: [[TMP0:%.*]] = load float, float* @c
+// CHECK-OFAST-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-OFAST-NEXT:[[SWDIVS:%.*]] = fdiv fast float [[TMP0]], [[TMP1]]
+// CHECK-OFAST-NEXT:ret float [[SWDIVS]]
+//
+float test_swdivs() {
+  return __swdivs(c, d);
+}
+
+// CHECK-LABEL:   @test_builtin_ppc_swdiv(
+// CHECK: [[TMP0:%.*]] = load double, double* @a
+// CHECK-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-NEXT:[[SWDIV:%.*]] = fdiv double [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret double [[SWDIV]]
+//
+// CHECK-OFAST-LABEL:   @test_builtin_ppc_swdiv(
+// CHECK-OFAST: [[TMP0:%.*]] = load double, double* @a
+// CHECK-OFAST-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-OFAST-NEXT:[[SWDIV:%.*]] = fdiv fast double [[TMP0]], [[TMP1]]
+// CHECK-OFAST-NEXT:ret double [[SWDIV]]
+//
+double test_builtin_ppc_swdiv() {
+  return __builtin_ppc_swdiv(a, b);
+}
+
+// CHECK-LABEL:   @test_builtin_ppc_swdivs(
+// CHECK: [[TMP0:%.*]] = load float, float* @c
+// CHECK-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-NEXT:[[SWDIVS:%.*]] = fdiv float [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret float [[SWDIVS]]
+//
+// CHECK-OFAST-LABEL:   @test_builtin_ppc_swdivs(
+// CHECK-OFAST: [[TMP0:%.*]] = load float, float* @c
+// CHECK-OFAST-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-OFAST-NEXT:[[SWDIVS:%.*]] = fdiv fast float [[TMP0]], [[TMP1]]
+// CHECK-OFAST-NEXT:ret float [[SWDIVS]]
+//
+float test_builtin_ppc_swdivs() {
+  return __builtin_ppc_swdivs(c, d);
+}
Index: clang/lib/CodeGen/CGBuiltin.cpp
===
--- clang/lib/CodeGen/CGBuiltin.cpp
+++ clang/lib/CodeGen/CGBuiltin.cpp
@@ -16077,7 +16077,7 @@
*this, E, Intrinsic::sqrt,

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-09-29 Thread Quinn Pham via Phabricator via cfe-commits

quinnp updated this revision to Diff 375912.
quinnp added a comment.

Fixing failing test case after rebasing with https://reviews.llvm.org/D110213.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106959/new/

https://reviews.llvm.org/D106959

Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
  llvm/test/CodeGen/PowerPC/fdiv.ll

Index: llvm/test/CodeGen/PowerPC/fdiv.ll
===
--- llvm/test/CodeGen/PowerPC/fdiv.ll
+++ llvm/test/CodeGen/PowerPC/fdiv.ll
@@ -23,3 +23,16 @@
   %3 = fdiv contract reassoc arcp nsz ninf float %0, %1
   ret float %3
 }
+
+define dso_local float @fdiv_fast(float %0, float %1) local_unnamed_addr {
+; CHECK-LABEL: fdiv_fast:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:xsresp 3, 2
+; CHECK-NEXT:xsmulsp 0, 1, 3
+; CHECK-NEXT:xsnmsubasp 1, 2, 0
+; CHECK-NEXT:xsmaddasp 0, 3, 1
+; CHECK-NEXT:fmr 1, 0
+; CHECK-NEXT:blr
+  %3 = fdiv fast float %0, %1
+  ret float %3
+}
Index: clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
===
--- /dev/null
+++ clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
@@ -0,0 +1,80 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -ffast-math -ffp-contract=fast \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix CHECK-OFAST
+
+extern double a;
+extern double b;
+extern float c;
+extern float d;
+
+// CHECK-LABEL:   @test_swdiv(
+// CHECK: [[TMP0:%.*]] = load double, double* @a
+// CHECK-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-NEXT:[[SWDIV:%.*]] = fdiv double [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret double [[SWDIV]]
+//
+// CHECK-OFAST-LABEL:   @test_swdiv(
+// CHECK-OFAST: [[TMP0:%.*]] = load double, double* @a
+// CHECK-OFAST-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-OFAST-NEXT:[[SWDIV:%.*]] = fdiv fast double [[TMP0]], [[TMP1]]
+// CHECK-OFAST-NEXT:ret double [[SWDIV]]
+//
+double test_swdiv() {
+  return __swdiv(a, b);
+}
+
+// CHECK-LABEL:   @test_swdivs(
+// CHECK: [[TMP0:%.*]] = load float, float* @c
+// CHECK-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-NEXT:[[SWDIVS:%.*]] = fdiv float [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret float [[SWDIVS]]
+//
+// CHECK-OFAST-LABEL:   @test_swdivs(
+// CHECK-OFAST: [[TMP0:%.*]] = load float, float* @c
+// CHECK-OFAST-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-OFAST-NEXT:[[SWDIVS:%.*]] = fdiv fast float [[TMP0]], [[TMP1]]
+// CHECK-OFAST-NEXT:ret float [[SWDIVS]]
+//
+float test_swdivs() {
+  return __swdivs(c, d);
+}
+
+// CHECK-LABEL:   @test_builtin_ppc_swdiv(
+// CHECK: [[TMP0:%.*]] = load double, double* @a
+// CHECK-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-NEXT:[[SWDIV:%.*]] = fdiv double [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret double [[SWDIV]]
+//
+// CHECK-OFAST-LABEL:   @test_builtin_ppc_swdiv(
+// CHECK-OFAST: [[TMP0:%.*]] = load double, double* @a
+// CHECK-OFAST-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-OFAST-NEXT:[[SWDIV:%.*]] = fdiv fast double [[TMP0]], [[TMP1]]
+// CHECK-OFAST-NEXT:ret double [[SWDIV]]
+//
+double test_builtin_ppc_swdiv() {
+  return __builtin_ppc_swdiv(a, b);
+}
+
+// CHECK-LABEL:   @test_builtin_ppc_swdivs(
+// CHECK: [[TMP0:%.*]] = load float, float* @c
+// CHECK-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-NEXT:[[SWDIVS:%.*]] = fdiv float [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret float [[SWDIVS]]
+//
+// CHECK-OFAST-LABEL:   @test_builtin_ppc_swdivs(
+// CHECK-OFAST: [[TMP0:%.*]] = load float, float* @c
+// CHECK-OFAST-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-OFAST-NEXT:[[SWDIVS:%.*]] = fdiv fast float [[TMP0]], [[TMP1]]
+// CHECK-OFAST-NEXT:ret float [[SWDIVS]]
+//
+float test_builtin_ppc_swdivs() {
+  return __builtin_ppc_swdivs(c, d);
+}
Index: clang/lib/CodeGen/CGBuiltin.cpp
===
--- clang/lib/CodeGen/CGBuiltin.cpp
+++ clang/lib/CodeGen/CGBuiltin.cpp
@@ -16077,7 +16077,7 @@
*this, E, Intrinsic::sqrt,
Intrinsic::experimental_constrained_sqrt))
 .getScalarVal();
-  case

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-09-28 Thread Nemanja Ivanovic via Phabricator via cfe-commits

nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.

LGTM. Please note in the commit message that this is simply a wrapper for a 
floating point divide. XL provided this builtin because it doesn't produce 
software estimates by default at `-Ofast`.


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[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-09-27 Thread Quinn Pham via Phabricator via cfe-commits

quinnp added a comment.

In D106959#3021069 , @NeHuang wrote:

> Do we already have a backend test case for `fdiv` emitting a software 
> estimate when `-Ofast` is used?

I've added a testcase in `llvm/test/CodeGen/PowerPC/fdiv.ll` which goes from 
`fdiv fast` to the assembly for the software divide estimate.


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[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-09-27 Thread Quinn Pham via Phabricator via cfe-commits

quinnp updated this revision to Diff 375285.
quinnp added a comment.

Added a backend testcase which goes from `fdiv fast` to software estimate. 
Added a runline in the front end testcase that sets the fast math flags.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106959/new/

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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
  llvm/test/CodeGen/PowerPC/fdiv.ll

Index: llvm/test/CodeGen/PowerPC/fdiv.ll
===
--- llvm/test/CodeGen/PowerPC/fdiv.ll
+++ llvm/test/CodeGen/PowerPC/fdiv.ll
@@ -23,3 +23,16 @@
   %3 = fdiv contract reassoc arcp nsz ninf float %0, %1
   ret float %3
 }
+
+define dso_local float @fdiv_fast(float %0, float %1) local_unnamed_addr {
+; CHECK-LABEL: fdiv_fast:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:xsresp 3, 2
+; CHECK-NEXT:xsmulsp 0, 1, 3
+; CHECK-NEXT:xsnmsubasp 1, 2, 0
+; CHECK-NEXT:xsmaddasp 0, 3, 1
+; CHECK-NEXT:fmr 1, 0
+; CHECK-NEXT:blr
+  %3 = fdiv fast float %0, %1
+  ret float %3
+}
Index: clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
===
--- /dev/null
+++ clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
@@ -0,0 +1,80 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -ffast-math -ffp-contract=fast \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix CHECK-OFAST
+
+extern double a;
+extern double b;
+extern float c;
+extern float d;
+
+// CHECK-LABEL:   @test_swdiv(
+// CHECK: [[TMP0:%.*]] = load double, double* @a
+// CHECK-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-NEXT:[[SWDIV:%.*]] = fdiv double [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret double [[SWDIV]]
+//
+// CHECK-OFAST-LABEL:   @test_swdiv(
+// CHECK-OFAST: [[TMP0:%.*]] = load double, double* @a
+// CHECK-OFAST-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-OFAST-NEXT:[[SWDIV:%.*]] = fdiv fast double [[TMP0]], [[TMP1]]
+// CHECK-OFAST-NEXT:ret double [[SWDIV]]
+//
+double test_swdiv() {
+  return __swdiv(a, b);
+}
+
+// CHECK-LABEL:   @test_swdivs(
+// CHECK: [[TMP0:%.*]] = load float, float* @c
+// CHECK-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-NEXT:[[SWDIVS:%.*]] = fdiv float [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret float [[SWDIVS]]
+//
+// CHECK-OFAST-LABEL:   @test_swdivs(
+// CHECK-OFAST: [[TMP0:%.*]] = load float, float* @c
+// CHECK-OFAST-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-OFAST-NEXT:[[SWDIVS:%.*]] = fdiv fast float [[TMP0]], [[TMP1]]
+// CHECK-OFAST-NEXT:ret float [[SWDIVS]]
+//
+float test_swdivs() {
+  return __swdivs(c, d);
+}
+
+// CHECK-LABEL:   @test_builtin_ppc_swdiv(
+// CHECK: [[TMP0:%.*]] = load double, double* @a
+// CHECK-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-NEXT:[[SWDIV:%.*]] = fdiv double [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret double [[SWDIV]]
+//
+// CHECK-OFAST-LABEL:   @test_builtin_ppc_swdiv(
+// CHECK-OFAST: [[TMP0:%.*]] = load double, double* @a
+// CHECK-OFAST-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-OFAST-NEXT:[[SWDIV:%.*]] = fdiv fast double [[TMP0]], [[TMP1]]
+// CHECK-OFAST-NEXT:ret double [[SWDIV]]
+//
+double test_builtin_ppc_swdiv() {
+  return __builtin_ppc_swdiv(a, b);
+}
+
+// CHECK-LABEL:   @test_builtin_ppc_swdivs(
+// CHECK: [[TMP0:%.*]] = load float, float* @c
+// CHECK-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-NEXT:[[SWDIVS:%.*]] = fdiv float [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret float [[SWDIVS]]
+//
+// CHECK-OFAST-LABEL:   @test_builtin_ppc_swdivs(
+// CHECK-OFAST: [[TMP0:%.*]] = load float, float* @c
+// CHECK-OFAST-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-OFAST-NEXT:[[SWDIVS:%.*]] = fdiv fast float [[TMP0]], [[TMP1]]
+// CHECK-OFAST-NEXT:ret float [[SWDIVS]]
+//
+float test_builtin_ppc_swdivs() {
+  return __builtin_ppc_swdivs(c, d);
+}
Index: clang/lib/CodeGen/CGBuiltin.cpp
===
--- clang/lib/CodeGen/CGBuiltin.cpp
+++ clang/lib/CodeGen/CGBuiltin.cpp
@@ -16035,6 +16035,9 @@
*this, E, Intrinsic::sqrt,

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-09-24 Thread Victor Huang via Phabricator via cfe-commits

NeHuang added a comment.

Do we already have a backend test case for `fdiv` emitting a software estimate 
when `-Ofast` is used?


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[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-09-24 Thread Quinn Pham via Phabricator via cfe-commits

quinnp added inline comments.



Comment at: llvm/test/CodeGen/PowerPC/LowerCheckedFPArith.ll:36
+; CHECK-NEXT:  %2 = fdiv fast float %0, %1
+; CHECK-NEXT:  %3 = fcmp une float %2, %2
+; CHECK-NEXT:  br i1 %3, label %swdiv_HWDIV, label %swdiv_MERGE

efriedma wrote:
> quinnp wrote:
> > efriedma wrote:
> > > A "fast" fdiv never produces NaN, per LangRef.  Using fcmp like this is 
> > > fragile at best.
> > > 
> > > (Maybe you want "fdiv arcp"?)
> > Thank you, I see what you mean. I have changed it to emit a `fdiv ninf 
> > arcp` instead of a `fdiv fast`. I included the `ninf` flag because without 
> > it the compiler doesn't produce the software div estimate.
> ninf is also an issue, although maybe less likely to bite in practice.  
> Consider what happens if someone passes infinity to swdivs: the fdiv reduces 
> to poison, so the branch is undefined behavior.
We've decided to emit an `fdiv` without any fast math flags for these builtins. 
This will be safe and will emit the software estimate for `-Ofast`.


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[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-09-24 Thread Quinn Pham via Phabricator via cfe-commits

quinnp updated this revision to Diff 374847.
quinnp marked 7 inline comments as done.
quinnp added a comment.

Updatign the patch to emit a fdiv for each of the builtins without any fast 
math flags. This will be safe and will still emit a software estimate when 
`-Ofast` is used.


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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c


Index: clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
===
--- /dev/null
+++ clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
@@ -0,0 +1,54 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+
+extern double a;
+extern double b;
+extern float c;
+extern float d;
+
+// CHECK-LABEL:   @test_swdiv(
+// CHECK: [[TMP0:%.*]] = load double, double* @a
+// CHECK-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-NEXT:[[SWDIV:%.*]] = fdiv double [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret double [[SWDIV]]
+//
+double test_swdiv() {
+  return __swdiv(a, b);
+}
+
+// CHECK-LABEL:   @test_swdivs(
+// CHECK: [[TMP0:%.*]] = load float, float* @c
+// CHECK-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-NEXT:[[SWDIVS:%.*]] = fdiv float [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret float [[SWDIVS]]
+//
+float test_swdivs() {
+  return __swdivs(c, d);
+}
+
+// CHECK-LABEL:   @test_builtin_ppc_swdiv(
+// CHECK: [[TMP0:%.*]] = load double, double* @a
+// CHECK-NEXT:[[TMP1:%.*]] = load double, double* @b
+// CHECK-NEXT:[[SWDIV:%.*]] = fdiv double [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret double [[SWDIV]]
+//
+double test_builtin_ppc_swdiv() {
+  return __builtin_ppc_swdiv(a, b);
+}
+
+// CHECK-LABEL:   @test_builtin_ppc_swdivs(
+// CHECK: [[TMP0:%.*]] = load float, float* @c
+// CHECK-NEXT:[[TMP1:%.*]] = load float, float* @d
+// CHECK-NEXT:[[SWDIVS:%.*]] = fdiv float [[TMP0]], [[TMP1]]
+// CHECK-NEXT:ret float [[SWDIVS]]
+//
+float test_builtin_ppc_swdivs() {
+  return __builtin_ppc_swdivs(c, d);
+}
Index: clang/lib/CodeGen/CGBuiltin.cpp
===
--- clang/lib/CodeGen/CGBuiltin.cpp
+++ clang/lib/CodeGen/CGBuiltin.cpp
@@ -16035,6 +16035,9 @@
*this, E, Intrinsic::sqrt,
Intrinsic::experimental_constrained_sqrt))
 .getScalarVal();
+  case PPC::BI__builtin_ppc_swdiv:
+  case PPC::BI__builtin_ppc_swdivs:
+return Builder.CreateFDiv(Ops[0], Ops[1], "swdiv");
   }
 }
 
Index: clang/lib/Basic/Targets/PPC.cpp
===
--- clang/lib/Basic/Targets/PPC.cpp
+++ clang/lib/Basic/Targets/PPC.cpp
@@ -238,6 +238,8 @@
   Builder.defineMacro("__fsqrts", "__builtin_ppc_fsqrts");
   Builder.defineMacro("__addex", "__builtin_ppc_addex");
   Builder.defineMacro("__cmplxl", "__builtin_complex");
+  Builder.defineMacro("__swdiv", "__builtin_ppc_swdiv");
+  Builder.defineMacro("__swdivs", "__builtin_ppc_swdivs");
 }
 
 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
Index: clang/include/clang/Basic/BuiltinsPPC.def
===
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -96,6 +96,8 @@
 BUILTIN(__builtin_ppc_swdivs_nochk, "fff", "")
 BUILTIN(__builtin_ppc_alignx, "vIivC*", "nc")
 BUILTIN(__builtin_ppc_rdlam, "UWiUWiUWiUWIi", "nc")
+BUILTIN(__builtin_ppc_swdiv, "ddd", "")
+BUILTIN(__builtin_ppc_swdivs, "fff", "")
 // Compare
 BUILTIN(__builtin_ppc_cmpeqb, "LLiLLiLLi", "")
 BUILTIN(__builtin_ppc_cmprb, "iCIiii", "")


Index: clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
===
--- /dev/null
+++ clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
@@ -0,0 +1,54 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN:   -emit-llvm %s

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-08-06 Thread Victor Huang via Phabricator via cfe-commits

NeHuang added inline comments.



Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c:17
+// CHECK-LABEL: @test_swdiv(
+// CHECK:[[TMP0:%.*]] = load double, double* @a, align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load double, double* @b, align 8

nit: alignment with CHECKs below. Same for the other test cases.



Comment at: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:452
+
+  addPass(createPPCLowerCheckedFPArithPass());
 }

+1, 


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[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-07-30 Thread Amy Kwan via Phabricator via cfe-commits

amyk added inline comments.



Comment at: llvm/include/llvm/IR/IntrinsicsPowerPC.td:1436
+
+def int_ppc_ftdivdp : Intrinsic<[llvm_i32_ty], [llvm_double_ty, 
llvm_double_ty], [IntrNoMem]>;
 }

Line too long?



Comment at: llvm/include/llvm/IR/IntrinsicsPowerPC.td:1724
+  Intrinsic<[llvm_double_ty], [llvm_double_ty, 
llvm_double_ty],
+  [IntrNoMem]>;
+  def int_ppc_swdivs : GCCBuiltin<"__builtin_ppc_swdivs">,

Minor indentation nit.



Comment at: llvm/include/llvm/IR/IntrinsicsPowerPC.td:1727
+   Intrinsic<[llvm_float_ty], [llvm_float_ty, 
llvm_float_ty],
+   [IntrNoMem]>;
 }

Minor indentation nit.



Comment at: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp:451
   TargetPassConfig::addIRPasses();
+
+  addPass(createPPCLowerCheckedFPArithPass());

Nit: Add a comment before creating the pass as the other pass calls also follow 
a comment.


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[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-07-30 Thread Eli Friedman via Phabricator via cfe-commits

efriedma added inline comments.



Comment at: llvm/test/CodeGen/PowerPC/LowerCheckedFPArith.ll:36
+; CHECK-NEXT:  %2 = fdiv fast float %0, %1
+; CHECK-NEXT:  %3 = fcmp une float %2, %2
+; CHECK-NEXT:  br i1 %3, label %swdiv_HWDIV, label %swdiv_MERGE

quinnp wrote:
> efriedma wrote:
> > A "fast" fdiv never produces NaN, per LangRef.  Using fcmp like this is 
> > fragile at best.
> > 
> > (Maybe you want "fdiv arcp"?)
> Thank you, I see what you mean. I have changed it to emit a `fdiv ninf arcp` 
> instead of a `fdiv fast`. I included the `ninf` flag because without it the 
> compiler doesn't produce the software div estimate.
ninf is also an issue, although maybe less likely to bite in practice.  
Consider what happens if someone passes infinity to swdivs: the fdiv reduces to 
poison, so the branch is undefined behavior.


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[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-07-30 Thread Quinn Pham via Phabricator via cfe-commits

quinnp marked an inline comment as done.
quinnp added inline comments.



Comment at: llvm/test/CodeGen/PowerPC/LowerCheckedFPArith.ll:36
+; CHECK-NEXT:  %2 = fdiv fast float %0, %1
+; CHECK-NEXT:  %3 = fcmp une float %2, %2
+; CHECK-NEXT:  br i1 %3, label %swdiv_HWDIV, label %swdiv_MERGE

efriedma wrote:
> A "fast" fdiv never produces NaN, per LangRef.  Using fcmp like this is 
> fragile at best.
> 
> (Maybe you want "fdiv arcp"?)
Thank you, I see what you mean. I have changed it to emit a `fdiv ninf arcp` 
instead of a `fdiv fast`. I included the `ninf` flag because without it the 
compiler doesn't produce the software div estimate.


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[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-07-30 Thread Quinn Pham via Phabricator via cfe-commits

quinnp updated this revision to Diff 363189.
quinnp added a comment.

Addressing review comments.


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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/CMakeLists.txt
  llvm/lib/Target/PowerPC/PPC.h
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCInstrVSX.td
  llvm/lib/Target/PowerPC/PPCLowerCheckedFPArith.cpp
  llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
  llvm/test/CodeGen/PowerPC/LowerCheckedFPArith.ll
  llvm/test/CodeGen/PowerPC/O3-pipeline.ll
  llvm/test/CodeGen/PowerPC/int-ppc-ftdivdp.ll

Index: llvm/test/CodeGen/PowerPC/int-ppc-ftdivdp.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/int-ppc-ftdivdp.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
+; RUN:   -mcpu=pwr7 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr7 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr7 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
+; RUN:   -mattr=-vsx -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-NOVSX
+
+define dso_local i32 @test_ftdivdp(double %a, double %b) local_unnamed_addr {
+; CHECK-LABEL: test_ftdivdp:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:xstdivdp 0, 1, 2
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:blr
+;
+; CHECK-NOVSX-LABEL: test_ftdivdp:
+; CHECK-NOVSX:   # %bb.0: # %entry
+; CHECK-NOVSX-NEXT:ftdiv 0, 1, 2
+; CHECK-NOVSX-NEXT:mfocrf 3, 128
+; CHECK-NOVSX-NEXT:srwi 3, 3, 28
+; CHECK-NOVSX-NEXT:blr
+entry:
+  %c = tail call i32 @llvm.ppc.ftdivdp(double %a, double %b)
+  ret i32 %c
+}
+
+declare i32 @llvm.ppc.ftdivdp(double, double)
Index: llvm/test/CodeGen/PowerPC/O3-pipeline.ll
===
--- llvm/test/CodeGen/PowerPC/O3-pipeline.ll
+++ llvm/test/CodeGen/PowerPC/O3-pipeline.ll
@@ -63,6 +63,8 @@
 ; CHECK-NEXT:   Expand vector predication intrinsics
 ; CHECK-NEXT:   Scalarize Masked Memory Intrinsics
 ; CHECK-NEXT:   Expand reduction intrinsics
+; CHECK-NEXT:   Lower Checked Floating Point Arithmetic
+; CHECK-NEXT:   Dominator Tree Construction
 ; CHECK-NEXT:   Natural Loop Information
 ; CHECK-NEXT:   CodeGen Prepare
 ; CHECK-NEXT:   Dominator Tree Construction
Index: llvm/test/CodeGen/PowerPC/LowerCheckedFPArith.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/LowerCheckedFPArith.ll
@@ -0,0 +1,53 @@
+; RUN: opt -ppc-lower-checked-fp-arith -S -o - < %s | FileCheck %s
+
+@a = external local_unnamed_addr global double
+@b = external local_unnamed_addr global double
+@c = external local_unnamed_addr global float
+@d = external local_unnamed_addr global float
+
+; CHECK-LABEL: @test_swdiv(
+; CHECK:  %0 = load double, double* @a, align 8
+; CHECK-NEXT:  %1 = load double, double* @b, align 8
+; CHECK-NEXT:  %2 = call i32 @llvm.ppc.ftdivdp(double %0, double %1)
+; CHECK-NEXT:  %3 = icmp eq i32 %2, 0
+; CHECK-NEXT:  %4 = fdiv ninf arcp double %0, %1
+; CHECK-NEXT:  br i1 %3, label %swdiv_HWDIV, label %swdiv_MERGE
+
+; CHECK:  %5 = fdiv double %0, %1
+; CHECK-NEXT:  br label %swdiv_MERGE
+
+; CHECK:  %6 = phi double [ %4, %entry ], [ %5, %swdiv_HWDIV ]
+; CHECK-NEXT:  ret double %6
+
+define dso_local double @test_swdiv() local_unnamed_addr {
+entry:
+  %0 = load double, double* @a
+  %1 = load double, double* @b
+  %2 = tail call double @llvm.ppc.swdiv(double %0, double %1)
+  ret double %2
+}
+
+declare double @llvm.ppc.swdiv(double, double)
+
+; CHECK-LABEL: @test_swdivs(
+; CHECK:  %0 = load float, float* @c, align 4
+; CHECK-NEXT:  %1 = load float, float* @d, align 4
+; CHECK-NEXT:  %2 = fdiv ninf arcp float %0, %1
+; CHECK-NEXT:  %3 = fcmp une float %2, %2
+; CHECK-NEXT:  br i1 %3, label %swdiv_HWDIV, label %swdiv_MERGE
+
+; CHECK:  %4 = fdiv float %0, %1
+; CHECK-NEXT:  br label %swdiv_MERGE
+
+; CHECK:  %5 = phi float [ %2, %entry ], [ %4, %swdiv_HWDIV ]
+; CHECK-NEXT:  ret float %5
+
+define dso_local float @test_swdivs() local_unnamed_addr {
+entry:
+  %0 = load float, float* @c
+  %1 = load float, float* @d
+  %2 = tail call float @llvm.ppc.swdivs(float %0, float %1)
+  ret float %2
+}
+
+declare float @llvm.ppc.swdivs(float, float)
Index: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-07-30 Thread Victor Huang via Phabricator via cfe-commits

NeHuang added inline comments.



Comment at: llvm/test/CodeGen/PowerPC/O3-pipeline.ll:211
   ret void
-}
\ No newline at end of file
+}

unrelated change?



Comment at: llvm/test/CodeGen/PowerPC/int-ppc-ftdivdp.ll:7
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \

nit: `pwr7`  for aix run lines



Comment at: llvm/test/CodeGen/PowerPC/int-ppc-ftdivdp.ll:8
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
+; RUN:   -mattr=-vsx -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-NOVSX

can we also add a run line for 64 bit AIX?


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[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-07-28 Thread Eli Friedman via Phabricator via cfe-commits

efriedma added inline comments.



Comment at: llvm/test/CodeGen/PowerPC/LowerCheckedFPArith.ll:36
+; CHECK-NEXT:  %2 = fdiv fast float %0, %1
+; CHECK-NEXT:  %3 = fcmp une float %2, %2
+; CHECK-NEXT:  br i1 %3, label %swdiv_HWDIV, label %swdiv_MERGE

A "fast" fdiv never produces NaN, per LangRef.  Using fcmp like this is fragile 
at best.

(Maybe you want "fdiv arcp"?)


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[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

2021-07-28 Thread Quinn Pham via Phabricator via cfe-commits

quinnp updated this revision to Diff 362400.
quinnp added a comment.

Fixing a failing test case.


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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/CMakeLists.txt
  llvm/lib/Target/PowerPC/PPC.h
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCInstrVSX.td
  llvm/lib/Target/PowerPC/PPCLowerCheckedFPArith.cpp
  llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
  llvm/test/CodeGen/PowerPC/LowerCheckedFPArith.ll
  llvm/test/CodeGen/PowerPC/O3-pipeline.ll
  llvm/test/CodeGen/PowerPC/int-ppc-ftdivdp.ll

Index: llvm/test/CodeGen/PowerPC/int-ppc-ftdivdp.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/int-ppc-ftdivdp.ll
@@ -0,0 +1,30 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
+; RUN:   -mcpu=pwr7 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
+; RUN:   -mattr=-vsx -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-NOVSX
+
+define dso_local i32 @test_ftdivdp(double %a, double %b) local_unnamed_addr {
+; CHECK-LABEL: test_ftdivdp:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:xstdivdp 0, 1, 2
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:blr
+;
+; CHECK-NOVSX-LABEL: test_ftdivdp:
+; CHECK-NOVSX:   # %bb.0: # %entry
+; CHECK-NOVSX-NEXT:ftdiv 0, 1, 2
+; CHECK-NOVSX-NEXT:mfocrf 3, 128
+; CHECK-NOVSX-NEXT:srwi 3, 3, 28
+; CHECK-NOVSX-NEXT:blr
+entry:
+  %c = tail call i32 @llvm.ppc.ftdivdp(double %a, double %b)
+  ret i32 %c
+}
+
+declare i32 @llvm.ppc.ftdivdp(double, double)
Index: llvm/test/CodeGen/PowerPC/O3-pipeline.ll
===
--- llvm/test/CodeGen/PowerPC/O3-pipeline.ll
+++ llvm/test/CodeGen/PowerPC/O3-pipeline.ll
@@ -63,6 +63,8 @@
 ; CHECK-NEXT:   Expand vector predication intrinsics
 ; CHECK-NEXT:   Scalarize Masked Memory Intrinsics
 ; CHECK-NEXT:   Expand reduction intrinsics
+; CHECK-NEXT:   Lower Checked Floating Point Arithmetic
+; CHECK-NEXT:   Dominator Tree Construction
 ; CHECK-NEXT:   Natural Loop Information
 ; CHECK-NEXT:   CodeGen Prepare
 ; CHECK-NEXT:   Dominator Tree Construction
@@ -206,4 +208,4 @@
 
 define void @f() {
   ret void
-}
\ No newline at end of file
+}
Index: llvm/test/CodeGen/PowerPC/LowerCheckedFPArith.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/LowerCheckedFPArith.ll
@@ -0,0 +1,53 @@
+; RUN: opt -ppc-lower-checked-fp-arith -S -o - < %s | FileCheck %s
+
+@a = external local_unnamed_addr global double
+@b = external local_unnamed_addr global double
+@c = external local_unnamed_addr global float
+@d = external local_unnamed_addr global float
+
+; CHECK-LABEL: @test_swdiv(
+; CHECK:  %0 = load double, double* @a, align 8
+; CHECK-NEXT:  %1 = load double, double* @b, align 8
+; CHECK-NEXT:  %2 = call i32 @llvm.ppc.ftdivdp(double %0, double %1)
+; CHECK-NEXT:  %3 = icmp eq i32 %2, 0
+; CHECK-NEXT:  %4 = fdiv fast double %0, %1
+; CHECK-NEXT:  br i1 %3, label %swdiv_HWDIV, label %swdiv_MERGE
+
+; CHECK:  %5 = fdiv double %0, %1
+; CHECK-NEXT:  br label %swdiv_MERGE
+
+; CHECK:  %6 = phi double [ %4, %entry ], [ %5, %swdiv_HWDIV ]
+; CHECK-NEXT:  ret double %6
+
+define dso_local double @test_swdiv() local_unnamed_addr {
+entry:
+  %0 = load double, double* @a
+  %1 = load double, double* @b
+  %2 = tail call double @llvm.ppc.swdiv(double %0, double %1)
+  ret double %2
+}
+
+declare double @llvm.ppc.swdiv(double, double)
+
+; CHECK-LABEL: @test_swdivs(
+; CHECK:  %0 = load float, float* @c, align 4
+; CHECK-NEXT:  %1 = load float, float* @d, align 4
+; CHECK-NEXT:  %2 = fdiv fast float %0, %1
+; CHECK-NEXT:  %3 = fcmp une float %2, %2
+; CHECK-NEXT:  br i1 %3, label %swdiv_HWDIV, label %swdiv_MERGE
+
+; CHECK:  %4 = fdiv float %0, %1
+; CHECK-NEXT:  br label %swdiv_MERGE
+
+; CHECK:  %5 = phi float [ %2, %entry ], [ %4, %swdiv_HWDIV ]
+; CHECK-NEXT:  ret float %5
+
+define dso_local float @test_swdivs() local_unnamed_addr {
+entry:
+  %0 = load float, float* @c
+  %1 = load float, float* @d
+  %2 = tail call float @llvm.ppc.swdivs(float %0, float %1)
+  ret float %2
+}
+
+declare float @llvm.ppc.swdivs(float, float)
Index: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility]

2021-07-28 Thread Quinn Pham via Phabricator via cfe-commits

quinnp created this revision.
Herald added subscribers: shchenz, kbarton, hiraditya, mgorny, nemanjai.
quinnp requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.

This patch is in a series of patches to provide builtins for compatibility with
the XL compiler. This patch adds software divide builtins with checking.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D106959

Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-swdiv.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/CMakeLists.txt
  llvm/lib/Target/PowerPC/PPC.h
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCInstrVSX.td
  llvm/lib/Target/PowerPC/PPCLowerCheckedFPArith.cpp
  llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
  llvm/test/CodeGen/PowerPC/LowerCheckedFPArith.ll
  llvm/test/CodeGen/PowerPC/int-ppc-ftdivdp.ll

Index: llvm/test/CodeGen/PowerPC/int-ppc-ftdivdp.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/int-ppc-ftdivdp.ll
@@ -0,0 +1,30 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
+; RUN:   -mcpu=pwr7 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
+; RUN:   -mattr=-vsx -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-NOVSX
+
+define dso_local i32 @test_ftdivdp(double %a, double %b) local_unnamed_addr {
+; CHECK-LABEL: test_ftdivdp:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:xstdivdp 0, 1, 2
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:blr
+;
+; CHECK-NOVSX-LABEL: test_ftdivdp:
+; CHECK-NOVSX:   # %bb.0: # %entry
+; CHECK-NOVSX-NEXT:ftdiv 0, 1, 2
+; CHECK-NOVSX-NEXT:mfocrf 3, 128
+; CHECK-NOVSX-NEXT:srwi 3, 3, 28
+; CHECK-NOVSX-NEXT:blr
+entry:
+  %c = tail call i32 @llvm.ppc.ftdivdp(double %a, double %b)
+  ret i32 %c
+}
+
+declare i32 @llvm.ppc.ftdivdp(double, double)
Index: llvm/test/CodeGen/PowerPC/LowerCheckedFPArith.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/LowerCheckedFPArith.ll
@@ -0,0 +1,53 @@
+; RUN: opt -ppc-lower-checked-fp-arith -S -o - < %s | FileCheck %s
+
+@a = external local_unnamed_addr global double
+@b = external local_unnamed_addr global double
+@c = external local_unnamed_addr global float
+@d = external local_unnamed_addr global float
+
+; CHECK-LABEL: @test_swdiv(
+; CHECK:  %0 = load double, double* @a, align 8
+; CHECK-NEXT:  %1 = load double, double* @b, align 8
+; CHECK-NEXT:  %2 = call i32 @llvm.ppc.ftdivdp(double %0, double %1)
+; CHECK-NEXT:  %3 = icmp eq i32 %2, 0
+; CHECK-NEXT:  %4 = fdiv fast double %0, %1
+; CHECK-NEXT:  br i1 %3, label %swdiv_HWDIV, label %swdiv_MERGE
+
+; CHECK:  %5 = fdiv double %0, %1
+; CHECK-NEXT:  br label %swdiv_MERGE
+
+; CHECK:  %6 = phi double [ %4, %entry ], [ %5, %swdiv_HWDIV ]
+; CHECK-NEXT:  ret double %6
+
+define dso_local double @test_swdiv() local_unnamed_addr {
+entry:
+  %0 = load double, double* @a
+  %1 = load double, double* @b
+  %2 = tail call double @llvm.ppc.swdiv(double %0, double %1)
+  ret double %2
+}
+
+declare double @llvm.ppc.swdiv(double, double)
+
+; CHECK-LABEL: @test_swdivs(
+; CHECK:  %0 = load float, float* @c, align 4
+; CHECK-NEXT:  %1 = load float, float* @d, align 4
+; CHECK-NEXT:  %2 = fdiv fast float %0, %1
+; CHECK-NEXT:  %3 = fcmp une float %2, %2
+; CHECK-NEXT:  br i1 %3, label %swdiv_HWDIV, label %swdiv_MERGE
+
+; CHECK:  %4 = fdiv float %0, %1
+; CHECK-NEXT:  br label %swdiv_MERGE
+
+; CHECK:  %5 = phi float [ %2, %entry ], [ %4, %swdiv_HWDIV ]
+; CHECK-NEXT:  ret float %5
+
+define dso_local float @test_swdivs() local_unnamed_addr {
+entry:
+  %0 = load float, float* @c
+  %1 = load float, float* @d
+  %2 = tail call float @llvm.ppc.swdivs(float %0, float %1)
+  ret float %2
+}
+
+declare float @llvm.ppc.swdivs(float, float)
Index: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
===
--- llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -125,6 +125,7 @@
   initializePPCLowerMASSVEntriesPass(PR);
   initializePPCExpandAtomicPseudoPass(PR);
   initializeGlobalISel(PR);
+  initializePPCLowerCheckedFPArithPass(PR);
 }
 
 static bool isLittleEndianTriple(const Triple ) {
@@ -447,6 +448,8 @@
   }
 
   TargetPassConfig::addIRPasses();
+
+  addPass(createPPCLowerCheckedFPArithPass());
 }
 
 bool PPCPassConfig::addPreISel() {
Index:

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility

[PATCH] D106959: [PowerPC] swdiv builtins for XL compatibility]

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