subject:"\[PATCH\] D110273\: \[PowerPC\] Fix lharx and lbarx builtin signatures"

[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

2021-09-30 Thread Albion Fung via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG29bb877499ce: [PowerPC] Fix lharx and lbarx builtin 
signatures (authored by Conanap).

Changed prior to commit:
  https://reviews.llvm.org/D110273?vs=374908=376417#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110273/new/

https://reviews.llvm.org/D110273

Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c


Index: clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
@@ -24,7 +24,7 @@
   return __lharx(a);
 }
 
-char test_lbarx(volatile unsigned char *a) {
+char test_lbarx(volatile char *a) {
   // CHECK-LABEL: @test_lbarx
   // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", 
"=r,*Z,~{memory}"(i8* %a)
   // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later 
CPUs
@@ -46,3 +46,18 @@
   // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later 
CPUs
   return __sthcx(a, val);
 }
+
+// Extra test cases that previously caused error during usage.
+int test_lharx_intret(volatile short *a) {
+  // CHECK-LABEL: @test_lharx_intret
+  // CHECK: %0 = tail call i16 asm sideeffect "lharx $0, ${1:y}", 
"=r,*Z,~{memory}"(i16* %a)
+  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later 
CPUs
+  return __lharx(a);
+}
+
+int test_lbarx_intret(volatile char *a) {
+  // CHECK-LABEL: @test_lbarx_intret
+  // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", 
"=r,*Z,~{memory}"(i8* %a)
+  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later 
CPUs
+  return __lbarx(a);
+}
Index: clang/include/clang/Basic/BuiltinsPPC.def
===
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -74,8 +74,8 @@
 BUILTIN(__builtin_ppc_fetch_and_swaplp, "ULiULiD*ULi", "")
 BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "")
 BUILTIN(__builtin_ppc_lwarx, "iiD*", "")
-BUILTIN(__builtin_ppc_lharx, "isD*", "")
-BUILTIN(__builtin_ppc_lbarx, "UiUcD*", "")
+BUILTIN(__builtin_ppc_lharx, "ssD*", "")
+BUILTIN(__builtin_ppc_lbarx, "ccD*", "")
 BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "")
 BUILTIN(__builtin_ppc_stwcx, "iiD*i", "")
 BUILTIN(__builtin_ppc_sthcx, "isD*s", "")


Index: clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
@@ -24,7 +24,7 @@
   return __lharx(a);
 }
 
-char test_lbarx(volatile unsigned char *a) {
+char test_lbarx(volatile char *a) {
   // CHECK-LABEL: @test_lbarx
   // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", "=r,*Z,~{memory}"(i8* %a)
   // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
@@ -46,3 +46,18 @@
   // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
   return __sthcx(a, val);
 }
+
+// Extra test cases that previously caused error during usage.
+int test_lharx_intret(volatile short *a) {
+  // CHECK-LABEL: @test_lharx_intret
+  // CHECK: %0 = tail call i16 asm sideeffect "lharx $0, ${1:y}", "=r,*Z,~{memory}"(i16* %a)
+  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
+  return __lharx(a);
+}
+
+int test_lbarx_intret(volatile char *a) {
+  // CHECK-LABEL: @test_lbarx_intret
+  // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", "=r,*Z,~{memory}"(i8* %a)
+  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
+  return __lbarx(a);
+}
Index: clang/include/clang/Basic/BuiltinsPPC.def
===
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -74,8 +74,8 @@
 BUILTIN(__builtin_ppc_fetch_and_swaplp, "ULiULiD*ULi", "")
 BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "")
 BUILTIN(__builtin_ppc_lwarx, "iiD*", "")
-BUILTIN(__builtin_ppc_lharx, "isD*", "")
-BUILTIN(__builtin_ppc_lbarx, "UiUcD*", "")
+BUILTIN(__builtin_ppc_lharx, "ssD*", "")
+BUILTIN(__builtin_ppc_lbarx, "ccD*", "")
 BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "")
 BUILTIN(__builtin_ppc_stwcx, "iiD*i", "")
 BUILTIN(__builtin_ppc_sthcx, "isD*s", "")
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[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

2021-09-30 Thread Amy Kwan via Phabricator via cfe-commits

amyk added a comment.

Additional nit regarding the description and comment:

The signatures for the PowerPC builtins lharx and
lbarx are incorrect, and causes issues when in a function
that requiers the return of the builtin to be promoted.
This patch fixes these signatures.

Updated to:

The signatures for the PowerPC builtins lharx and
lbarx are incorrect, and causes issues when used in a function
that requires the return of the builtin to be promoted.
This patch fixes these signatures.




Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c:50
+
+// extra test cases that previously caused error during usage
+int test_lharx_intret(volatile short *a) {

nit: Capitalize the sentence and add a period. 


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[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

2021-09-30 Thread Nemanja Ivanovic via Phabricator via cfe-commits

nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.

LGTM. Thanks.


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[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

2021-09-24 Thread Albion Fung via Phabricator via cfe-commits

Conanap updated this revision to Diff 374908.
Conanap added a comment.

Fixed an old test case


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110273/new/

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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c


Index: clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
@@ -24,7 +24,7 @@
   return __lharx(a);
 }
 
-char test_lbarx(volatile unsigned char *a) {
+char test_lbarx(volatile char *a) {
   // CHECK-LABEL: @test_lbarx
   // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", 
"=r,*Z,~{memory}"(i8* %a)
   // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later 
CPUs
@@ -46,3 +46,18 @@
   // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later 
CPUs
   return __sthcx(a, val);
 }
+
+// extra test cases that previously caused error during usage
+int test_lharx_intret(volatile short *a) {
+  // CHECK-LABEL: @test_lharx_intret
+  // CHECK: %0 = tail call i16 asm sideeffect "lharx $0, ${1:y}", 
"=r,*Z,~{memory}"(i16* %a)
+  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later 
CPUs
+  return __lharx(a);
+}
+
+int test_lbarx_intret(volatile char *a) {
+  // CHECK-LABEL: @test_lbarx_intret
+  // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", 
"=r,*Z,~{memory}"(i8* %a)
+  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later 
CPUs
+  return __lbarx(a);
+}
Index: clang/include/clang/Basic/BuiltinsPPC.def
===
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -74,8 +74,8 @@
 BUILTIN(__builtin_ppc_fetch_and_swaplp, "ULiULiD*ULi", "")
 BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "")
 BUILTIN(__builtin_ppc_lwarx, "iiD*", "")
-BUILTIN(__builtin_ppc_lharx, "isD*", "")
-BUILTIN(__builtin_ppc_lbarx, "UiUcD*", "")
+BUILTIN(__builtin_ppc_lharx, "ssD*", "")
+BUILTIN(__builtin_ppc_lbarx, "ccD*", "")
 BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "")
 BUILTIN(__builtin_ppc_stwcx, "iiD*i", "")
 BUILTIN(__builtin_ppc_sthcx, "isD*s", "")


Index: clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
@@ -24,7 +24,7 @@
   return __lharx(a);
 }
 
-char test_lbarx(volatile unsigned char *a) {
+char test_lbarx(volatile char *a) {
   // CHECK-LABEL: @test_lbarx
   // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", "=r,*Z,~{memory}"(i8* %a)
   // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
@@ -46,3 +46,18 @@
   // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
   return __sthcx(a, val);
 }
+
+// extra test cases that previously caused error during usage
+int test_lharx_intret(volatile short *a) {
+  // CHECK-LABEL: @test_lharx_intret
+  // CHECK: %0 = tail call i16 asm sideeffect "lharx $0, ${1:y}", "=r,*Z,~{memory}"(i16* %a)
+  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
+  return __lharx(a);
+}
+
+int test_lbarx_intret(volatile char *a) {
+  // CHECK-LABEL: @test_lbarx_intret
+  // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", "=r,*Z,~{memory}"(i8* %a)
+  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
+  return __lbarx(a);
+}
Index: clang/include/clang/Basic/BuiltinsPPC.def
===
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -74,8 +74,8 @@
 BUILTIN(__builtin_ppc_fetch_and_swaplp, "ULiULiD*ULi", "")
 BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "")
 BUILTIN(__builtin_ppc_lwarx, "iiD*", "")
-BUILTIN(__builtin_ppc_lharx, "isD*", "")
-BUILTIN(__builtin_ppc_lbarx, "UiUcD*", "")
+BUILTIN(__builtin_ppc_lharx, "ssD*", "")
+BUILTIN(__builtin_ppc_lbarx, "ccD*", "")
 BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "")
 BUILTIN(__builtin_ppc_stwcx, "iiD*i", "")
 BUILTIN(__builtin_ppc_sthcx, "isD*s", "")
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[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

2021-09-24 Thread Victor Huang via Phabricator via cfe-commits

NeHuang added inline comments.



Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c:27
 
 char test_lbarx(volatile unsigned char *a) {
   // CHECK-LABEL: @test_lbarx

Do you also need to update the input argument type here as well to match the 
changes in `BuiltinsPPC.def`?


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[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

2021-09-23 Thread Albion Fung via Phabricator via cfe-commits

Conanap updated this revision to Diff 374556.
Conanap added a comment.

Added test cases


CHANGES SINCE LAST ACTION
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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c


Index: clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
@@ -46,3 +46,18 @@
   // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later 
CPUs
   return __sthcx(a, val);
 }
+
+// extra test cases that previously caused error during usage
+int test_lharx_intret(volatile short *a) {
+  // CHECK-LABEL: @test_lharx_intret
+  // CHECK: %0 = tail call i16 asm sideeffect "lharx $0, ${1:y}", 
"=r,*Z,~{memory}"(i16* %a)
+  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later 
CPUs
+  return __lharx(a);
+}
+
+int test_lbarx_intret(volatile char *a) {
+  // CHECK-LABEL: @test_lbarx_intret
+  // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", 
"=r,*Z,~{memory}"(i8* %a)
+  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later 
CPUs
+  return __lbarx(a);
+}
Index: clang/include/clang/Basic/BuiltinsPPC.def
===
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -74,8 +74,8 @@
 BUILTIN(__builtin_ppc_fetch_and_swaplp, "ULiULiD*ULi", "")
 BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "")
 BUILTIN(__builtin_ppc_lwarx, "iiD*", "")
-BUILTIN(__builtin_ppc_lharx, "isD*", "")
-BUILTIN(__builtin_ppc_lbarx, "UiUcD*", "")
+BUILTIN(__builtin_ppc_lharx, "ssD*", "")
+BUILTIN(__builtin_ppc_lbarx, "ccD*", "")
 BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "")
 BUILTIN(__builtin_ppc_stwcx, "iiD*i", "")
 BUILTIN(__builtin_ppc_sthcx, "isD*s", "")


Index: clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
@@ -46,3 +46,18 @@
   // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
   return __sthcx(a, val);
 }
+
+// extra test cases that previously caused error during usage
+int test_lharx_intret(volatile short *a) {
+  // CHECK-LABEL: @test_lharx_intret
+  // CHECK: %0 = tail call i16 asm sideeffect "lharx $0, ${1:y}", "=r,*Z,~{memory}"(i16* %a)
+  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
+  return __lharx(a);
+}
+
+int test_lbarx_intret(volatile char *a) {
+  // CHECK-LABEL: @test_lbarx_intret
+  // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", "=r,*Z,~{memory}"(i8* %a)
+  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
+  return __lbarx(a);
+}
Index: clang/include/clang/Basic/BuiltinsPPC.def
===
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -74,8 +74,8 @@
 BUILTIN(__builtin_ppc_fetch_and_swaplp, "ULiULiD*ULi", "")
 BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "")
 BUILTIN(__builtin_ppc_lwarx, "iiD*", "")
-BUILTIN(__builtin_ppc_lharx, "isD*", "")
-BUILTIN(__builtin_ppc_lbarx, "UiUcD*", "")
+BUILTIN(__builtin_ppc_lharx, "ssD*", "")
+BUILTIN(__builtin_ppc_lbarx, "ccD*", "")
 BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "")
 BUILTIN(__builtin_ppc_stwcx, "iiD*i", "")
 BUILTIN(__builtin_ppc_sthcx, "isD*s", "")
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[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

2021-09-22 Thread Nemanja Ivanovic via Phabricator via cfe-commits

nemanjai added a comment.

The description says it causes issues but there is no test case. Please add the 
test case that causes issues.


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[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

2021-09-22 Thread Albion Fung via Phabricator via cfe-commits

Conanap created this revision.
Conanap added reviewers: PowerPC, nemanjai, stefanp, saghir.
Conanap added projects: clang, LLVM, PowerPC.
Herald added subscribers: steven.zhang, kbarton.
Conanap requested review of this revision.

The signatures for the PowerPC builtins `lharx` and
`lbarx` are incorrect, and causes issues when in a function
that requiers the return of the builtin to be promoted.
This patch fixes these signatures.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D110273

Files:
  clang/include/clang/Basic/BuiltinsPPC.def


Index: clang/include/clang/Basic/BuiltinsPPC.def
===
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -74,8 +74,8 @@
 BUILTIN(__builtin_ppc_fetch_and_swaplp, "ULiULiD*ULi", "")
 BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "")
 BUILTIN(__builtin_ppc_lwarx, "iiD*", "")
-BUILTIN(__builtin_ppc_lharx, "isD*", "")
-BUILTIN(__builtin_ppc_lbarx, "UiUcD*", "")
+BUILTIN(__builtin_ppc_lharx, "ssD*", "")
+BUILTIN(__builtin_ppc_lbarx, "ccD*", "")
 BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "")
 BUILTIN(__builtin_ppc_stwcx, "iiD*i", "")
 BUILTIN(__builtin_ppc_sthcx, "isD*s", "")


Index: clang/include/clang/Basic/BuiltinsPPC.def
===
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -74,8 +74,8 @@
 BUILTIN(__builtin_ppc_fetch_and_swaplp, "ULiULiD*ULi", "")
 BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "")
 BUILTIN(__builtin_ppc_lwarx, "iiD*", "")
-BUILTIN(__builtin_ppc_lharx, "isD*", "")
-BUILTIN(__builtin_ppc_lbarx, "UiUcD*", "")
+BUILTIN(__builtin_ppc_lharx, "ssD*", "")
+BUILTIN(__builtin_ppc_lbarx, "ccD*", "")
 BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "")
 BUILTIN(__builtin_ppc_stwcx, "iiD*i", "")
 BUILTIN(__builtin_ppc_sthcx, "isD*s", "")
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[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

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