[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Quinn Pham via Phabricator via cfe-commits]

quinnp reopened this revision.
quinnp added a comment.
This revision is now accepted and ready to land.

Re-opening the revision so that I can update it with a fix.


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[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Quinn Pham via Phabricator via cfe-commits]

quinnp added a comment.

In D121637#3437371 , @thakis wrote:

> Looks like this breaks tests on windows: 
> http://45.33.8.238/win/55893/step_7.txt
>
> Please take a look and revert for now if it takes a while to fix.

Thanks for finding this, not sure what the cause is. I reverted the commit 
here: https://reviews.llvm.org/rGfef56f79ac8c4a4985774ea9fb1faa83a74866d3.

I'll look into a fix.


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[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Nico Weber via Phabricator via cfe-commits]

thakis added a comment.

Looks like this breaks tests on windows: http://45.33.8.238/win/55893/step_7.txt

Please take a look and revert for now if it takes a while to fix.


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[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Quinn Pham via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG2aae5b1fac38: [PowerPC] Fix EmitPPCBuiltinExpr to emit 
arguments once (authored by quinnp).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
  clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma-types.c
  clang/test/CodeGen/PowerPC/builtins-ppc-stmtexpr-argument.c
  clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cas.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fetch.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
  clang/test/CodeGen/PowerPC/ppc-mma-types.c
  clang/test/Sema/ppc-pair-mma-types.c

Index: clang/test/Sema/ppc-pair-mma-types.c
===
--- clang/test/Sema/ppc-pair-mma-types.c
+++ clang/test/Sema/ppc-pair-mma-types.c
@@ -12,11 +12,6 @@
 
 // typedef
 typedef __vector_quad vq_t;
-void testVQTypedef(int *inp, int *outp) {
-  vq_t *vqin = (vq_t *)inp;
-  vq_t *vqout = (vq_t *)outp;
-  *vqout = *vqin;
-}
 
 // function argument
 void testVQArg1(__vector_quad vq, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
@@ -29,57 +24,22 @@
   *vqp = vq;
 }
 
-void testVQArg3(__vector_quad *vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
-void testVQArg4(const __vector_quad *const vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
-void testVQArg5(__vector_quad vqa[], int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = vqa[0];
-}
-
 void testVQArg6(const vq_t vq, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   *vqp = vq;
 }
 
-void testVQArg7(const vq_t *vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
 // function return
 __vector_quad testVQRet1(int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   return *vqp; // expected-error {{invalid use of PPC MMA type}}
 }
 
-__vector_quad *testVQRet2(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
-const __vector_quad *testVQRet3(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
 const vq_t testVQRet4(int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   return *vqp; // expected-error {{invalid use of PPC MMA type}}
 }
 
-const vq_t *testVQRet5(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
 // global
 __vector_quad globalvq;// expected-error {{invalid use of PPC MMA type}}
 const __vector_quad globalvq2; // expected-error {{invalid use of PPC MMA type}}
@@ -87,16 +47,6 @@
 const __vector_quad *const globalvqp2;
 vq_t globalvq_t; // expected-error {{invalid use of PPC MMA type}}
 
-// local
-void testVQLocal(int *ptr, vector unsigned char vc) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  __vector_quad vq1 = *vqp;
-  __vector_quad vq2;
-  __builtin_mma_xxsetaccz();
-  __vector_quad vq3;
-  __builtin_mma_xvi4ger8(, vc, vc);
-  *vqp = vq3;
-}
 
 // struct field
 struct TestVQStruct {
@@ -106,17 +56,6 @@
   __vector_quad *vq;
 };
 
-// sizeof / alignof
-int testVQSizeofAlignof(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  __vector_quad vq = *vqp;
-  unsigned sizet = sizeof(__vector_quad);
-  unsigned alignt = __alignof__(__vector_quad);
-  unsigned sizev = sizeof(vq);
-  unsigned alignv = __alignof__(vq);
-  return sizet + alignt + sizev + alignv;
-}
-
 // operators
 int testVQOperators1(int *ptr) {
   __vector_quad *vqp = (__vector_quad *)ptr;
@@ -168,11 +107,6 @@
 
 // typedef
 typedef __vector_pair vp_t;
-void testVPTypedef(int *inp, int *outp) {
-  vp_t *vpin = (vp_t *)inp;
-  vp_t *vpout = (vp_t *)outp;
-  *vpout = *vpin;
-}
 
 // function argument
 void testVPArg1(__vector_pair vp, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
@@ -185,57 +119,22 @@
   *vpp = vp;
 }
 
-void testVPArg3(__vector_pair *vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = *vp;
-}
-
-void testVPArg4(const __vector_pair *const vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = *vp;
-}
-
-void testVPArg5(__vector_pair vpa[], int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = vpa[0];
-}
-
 void testVPArg6(const vp_t vp, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_pair *vpp = (__vector_pair *)ptr;
   *vpp = vp;
 }
 
-void testVPArg7(const vp_t *vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair 

[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Quinn Pham via Phabricator via cfe-commits]

quinnp updated this revision to Diff 421303.
quinnp added a comment.

Fixing a set of builtins added by the rebase with main.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121637/new/

https://reviews.llvm.org/D121637

Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
  clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma-types.c
  clang/test/CodeGen/PowerPC/builtins-ppc-stmtexpr-argument.c
  clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cas.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fetch.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
  clang/test/CodeGen/PowerPC/ppc-mma-types.c
  clang/test/Sema/ppc-pair-mma-types.c

Index: clang/test/Sema/ppc-pair-mma-types.c
===
--- clang/test/Sema/ppc-pair-mma-types.c
+++ clang/test/Sema/ppc-pair-mma-types.c
@@ -12,11 +12,6 @@
 
 // typedef
 typedef __vector_quad vq_t;
-void testVQTypedef(int *inp, int *outp) {
-  vq_t *vqin = (vq_t *)inp;
-  vq_t *vqout = (vq_t *)outp;
-  *vqout = *vqin;
-}
 
 // function argument
 void testVQArg1(__vector_quad vq, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
@@ -29,57 +24,22 @@
   *vqp = vq;
 }
 
-void testVQArg3(__vector_quad *vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
-void testVQArg4(const __vector_quad *const vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
-void testVQArg5(__vector_quad vqa[], int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = vqa[0];
-}
-
 void testVQArg6(const vq_t vq, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   *vqp = vq;
 }
 
-void testVQArg7(const vq_t *vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
 // function return
 __vector_quad testVQRet1(int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   return *vqp; // expected-error {{invalid use of PPC MMA type}}
 }
 
-__vector_quad *testVQRet2(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
-const __vector_quad *testVQRet3(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
 const vq_t testVQRet4(int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   return *vqp; // expected-error {{invalid use of PPC MMA type}}
 }
 
-const vq_t *testVQRet5(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
 // global
 __vector_quad globalvq;// expected-error {{invalid use of PPC MMA type}}
 const __vector_quad globalvq2; // expected-error {{invalid use of PPC MMA type}}
@@ -87,16 +47,6 @@
 const __vector_quad *const globalvqp2;
 vq_t globalvq_t; // expected-error {{invalid use of PPC MMA type}}
 
-// local
-void testVQLocal(int *ptr, vector unsigned char vc) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  __vector_quad vq1 = *vqp;
-  __vector_quad vq2;
-  __builtin_mma_xxsetaccz();
-  __vector_quad vq3;
-  __builtin_mma_xvi4ger8(, vc, vc);
-  *vqp = vq3;
-}
 
 // struct field
 struct TestVQStruct {
@@ -106,17 +56,6 @@
   __vector_quad *vq;
 };
 
-// sizeof / alignof
-int testVQSizeofAlignof(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  __vector_quad vq = *vqp;
-  unsigned sizet = sizeof(__vector_quad);
-  unsigned alignt = __alignof__(__vector_quad);
-  unsigned sizev = sizeof(vq);
-  unsigned alignv = __alignof__(vq);
-  return sizet + alignt + sizev + alignv;
-}
-
 // operators
 int testVQOperators1(int *ptr) {
   __vector_quad *vqp = (__vector_quad *)ptr;
@@ -168,11 +107,6 @@
 
 // typedef
 typedef __vector_pair vp_t;
-void testVPTypedef(int *inp, int *outp) {
-  vp_t *vpin = (vp_t *)inp;
-  vp_t *vpout = (vp_t *)outp;
-  *vpout = *vpin;
-}
 
 // function argument
 void testVPArg1(__vector_pair vp, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
@@ -185,57 +119,22 @@
   *vpp = vp;
 }
 
-void testVPArg3(__vector_pair *vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = *vp;
-}
-
-void testVPArg4(const __vector_pair *const vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = *vp;
-}
-
-void testVPArg5(__vector_pair vpa[], int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = vpa[0];
-}
-
 void testVPArg6(const vp_t vp, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_pair *vpp = (__vector_pair *)ptr;
   *vpp = vp;
 }
 
-void testVPArg7(const vp_t *vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = *vp;
-}
-
 // function return
 __vector_pair testVPRet1(int *ptr) { // expected-error {{invalid 

[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Quinn Pham via Phabricator via cfe-commits]

quinnp updated this revision to Diff 421286.
quinnp added a comment.

Rebasing with main.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121637/new/

https://reviews.llvm.org/D121637

Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
  clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma-types.c
  clang/test/CodeGen/PowerPC/builtins-ppc-stmtexpr-argument.c
  clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cas.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fetch.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
  clang/test/CodeGen/PowerPC/ppc-mma-types.c
  clang/test/Sema/ppc-pair-mma-types.c

Index: clang/test/Sema/ppc-pair-mma-types.c
===
--- clang/test/Sema/ppc-pair-mma-types.c
+++ clang/test/Sema/ppc-pair-mma-types.c
@@ -12,11 +12,6 @@
 
 // typedef
 typedef __vector_quad vq_t;
-void testVQTypedef(int *inp, int *outp) {
-  vq_t *vqin = (vq_t *)inp;
-  vq_t *vqout = (vq_t *)outp;
-  *vqout = *vqin;
-}
 
 // function argument
 void testVQArg1(__vector_quad vq, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
@@ -29,57 +24,22 @@
   *vqp = vq;
 }
 
-void testVQArg3(__vector_quad *vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
-void testVQArg4(const __vector_quad *const vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
-void testVQArg5(__vector_quad vqa[], int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = vqa[0];
-}
-
 void testVQArg6(const vq_t vq, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   *vqp = vq;
 }
 
-void testVQArg7(const vq_t *vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
 // function return
 __vector_quad testVQRet1(int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   return *vqp; // expected-error {{invalid use of PPC MMA type}}
 }
 
-__vector_quad *testVQRet2(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
-const __vector_quad *testVQRet3(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
 const vq_t testVQRet4(int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   return *vqp; // expected-error {{invalid use of PPC MMA type}}
 }
 
-const vq_t *testVQRet5(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
 // global
 __vector_quad globalvq;// expected-error {{invalid use of PPC MMA type}}
 const __vector_quad globalvq2; // expected-error {{invalid use of PPC MMA type}}
@@ -87,16 +47,6 @@
 const __vector_quad *const globalvqp2;
 vq_t globalvq_t; // expected-error {{invalid use of PPC MMA type}}
 
-// local
-void testVQLocal(int *ptr, vector unsigned char vc) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  __vector_quad vq1 = *vqp;
-  __vector_quad vq2;
-  __builtin_mma_xxsetaccz();
-  __vector_quad vq3;
-  __builtin_mma_xvi4ger8(, vc, vc);
-  *vqp = vq3;
-}
 
 // struct field
 struct TestVQStruct {
@@ -106,17 +56,6 @@
   __vector_quad *vq;
 };
 
-// sizeof / alignof
-int testVQSizeofAlignof(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  __vector_quad vq = *vqp;
-  unsigned sizet = sizeof(__vector_quad);
-  unsigned alignt = __alignof__(__vector_quad);
-  unsigned sizev = sizeof(vq);
-  unsigned alignv = __alignof__(vq);
-  return sizet + alignt + sizev + alignv;
-}
-
 // operators
 int testVQOperators1(int *ptr) {
   __vector_quad *vqp = (__vector_quad *)ptr;
@@ -168,11 +107,6 @@
 
 // typedef
 typedef __vector_pair vp_t;
-void testVPTypedef(int *inp, int *outp) {
-  vp_t *vpin = (vp_t *)inp;
-  vp_t *vpout = (vp_t *)outp;
-  *vpout = *vpin;
-}
 
 // function argument
 void testVPArg1(__vector_pair vp, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
@@ -185,57 +119,22 @@
   *vpp = vp;
 }
 
-void testVPArg3(__vector_pair *vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = *vp;
-}
-
-void testVPArg4(const __vector_pair *const vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = *vp;
-}
-
-void testVPArg5(__vector_pair vpa[], int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = vpa[0];
-}
-
 void testVPArg6(const vp_t vp, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_pair *vpp = (__vector_pair *)ptr;
   *vpp = vp;
 }
 
-void testVPArg7(const vp_t *vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = *vp;
-}
-
 // function return
 __vector_pair testVPRet1(int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_pair 

[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Quinn Pham via Phabricator via cfe-commits]

quinnp added inline comments.



Comment at: clang/lib/CodeGen/CGBuiltin.cpp:15627
+Value *Y =
+Builder.CreateAnd(EmitScalarExpr(E->getArg(1)), 
Builder.CreateNot(Op3));
 return Builder.CreateOr(X, Y);

nemanjai wrote:
> Nit: I understand that we only have one use of `E->getArg(1)`, but might as 
> well initialize `Op1` as above just for consistency.
I've fixed all the instances of this.


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[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Quinn Pham via Phabricator via cfe-commits]

quinnp updated this revision to Diff 421279.
quinnp marked an inline comment as done.
quinnp added a comment.

Fixing some testcases that broke due to re-ordering IR in my last update.


Repository:
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Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
  clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma-types.c
  clang/test/CodeGen/PowerPC/builtins-ppc-stmtexpr-argument.c
  clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cas.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fetch.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
  clang/test/CodeGen/PowerPC/ppc-mma-types.c
  clang/test/Sema/ppc-pair-mma-types.c

Index: clang/test/Sema/ppc-pair-mma-types.c
===
--- clang/test/Sema/ppc-pair-mma-types.c
+++ clang/test/Sema/ppc-pair-mma-types.c
@@ -12,11 +12,6 @@
 
 // typedef
 typedef __vector_quad vq_t;
-void testVQTypedef(int *inp, int *outp) {
-  vq_t *vqin = (vq_t *)inp;
-  vq_t *vqout = (vq_t *)outp;
-  *vqout = *vqin;
-}
 
 // function argument
 void testVQArg1(__vector_quad vq, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
@@ -29,57 +24,22 @@
   *vqp = vq;
 }
 
-void testVQArg3(__vector_quad *vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
-void testVQArg4(const __vector_quad *const vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
-void testVQArg5(__vector_quad vqa[], int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = vqa[0];
-}
-
 void testVQArg6(const vq_t vq, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   *vqp = vq;
 }
 
-void testVQArg7(const vq_t *vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
 // function return
 __vector_quad testVQRet1(int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   return *vqp; // expected-error {{invalid use of PPC MMA type}}
 }
 
-__vector_quad *testVQRet2(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
-const __vector_quad *testVQRet3(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
 const vq_t testVQRet4(int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   return *vqp; // expected-error {{invalid use of PPC MMA type}}
 }
 
-const vq_t *testVQRet5(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
 // global
 __vector_quad globalvq;// expected-error {{invalid use of PPC MMA type}}
 const __vector_quad globalvq2; // expected-error {{invalid use of PPC MMA type}}
@@ -87,16 +47,6 @@
 const __vector_quad *const globalvqp2;
 vq_t globalvq_t; // expected-error {{invalid use of PPC MMA type}}
 
-// local
-void testVQLocal(int *ptr, vector unsigned char vc) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  __vector_quad vq1 = *vqp;
-  __vector_quad vq2;
-  __builtin_mma_xxsetaccz();
-  __vector_quad vq3;
-  __builtin_mma_xvi4ger8(, vc, vc);
-  *vqp = vq3;
-}
 
 // struct field
 struct TestVQStruct {
@@ -106,17 +56,6 @@
   __vector_quad *vq;
 };
 
-// sizeof / alignof
-int testVQSizeofAlignof(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  __vector_quad vq = *vqp;
-  unsigned sizet = sizeof(__vector_quad);
-  unsigned alignt = __alignof__(__vector_quad);
-  unsigned sizev = sizeof(vq);
-  unsigned alignv = __alignof__(vq);
-  return sizet + alignt + sizev + alignv;
-}
-
 // operators
 int testVQOperators1(int *ptr) {
   __vector_quad *vqp = (__vector_quad *)ptr;
@@ -168,11 +107,6 @@
 
 // typedef
 typedef __vector_pair vp_t;
-void testVPTypedef(int *inp, int *outp) {
-  vp_t *vpin = (vp_t *)inp;
-  vp_t *vpout = (vp_t *)outp;
-  *vpout = *vpin;
-}
 
 // function argument
 void testVPArg1(__vector_pair vp, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
@@ -185,57 +119,22 @@
   *vpp = vp;
 }
 
-void testVPArg3(__vector_pair *vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = *vp;
-}
-
-void testVPArg4(const __vector_pair *const vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = *vp;
-}
-
-void testVPArg5(__vector_pair vpa[], int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = vpa[0];
-}
-
 void testVPArg6(const vp_t vp, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_pair *vpp = (__vector_pair *)ptr;
   *vpp = vp;
 }
 
-void testVPArg7(const vp_t *vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = *vp;
-}
-
 // function return
 

[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Nemanja Ivanovic via Phabricator via cfe-commits]

nemanjai accepted this revision.
nemanjai added a comment.

Please add a test case that would cause a failure prior to this patch due to 
the argument being emitted more than once (i.e. the test case that prompted 
this patch). If that is already added and I just missed it, please add a note 
to the test case along the lines of:

  // The argument expression must not be emitted multiple times.

Other than the minor nits, LGTM.




Comment at: clang/lib/CodeGen/CGBuiltin.cpp:15627
+Value *Y =
+Builder.CreateAnd(EmitScalarExpr(E->getArg(1)), 
Builder.CreateNot(Op3));
 return Builder.CreateOr(X, Y);

Nit: I understand that we only have one use of `E->getArg(1)`, but might as 
well initialize `Op1` as above just for consistency.


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[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Amy Kwan via Phabricator via cfe-commits]

amyk accepted this revision as: amyk.
amyk added a comment.
This revision is now accepted and ready to land.

Thanks Quinn. i think this overall LGTM.


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[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Quinn Pham via Phabricator via cfe-commits]

quinnp marked an inline comment as done.
quinnp added inline comments.



Comment at: clang/lib/CodeGen/CGBuiltin.cpp:15208
-  for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) {
-if (E->getArg(i)->getType()->isArrayType())
-  Ops.push_back(EmitArrayToPointerDecay(E->getArg(i)).getPointer());

quinnp wrote:
> amyk wrote:
> > A question I have is do we not need to consider 
> > this/`EmitArrayToPointerDecay()` anymore? Was this not used for anything?
> Thanks for your comment! I could not find any builtins that used this case in 
> the loop for emitting their arguments and did not see any failures when I 
> removed it. I am going to look into this now and verify whether or not this 
> is needed.
I've updated the patch to include `EmitArrayToPointerDecay()` where it is 
needed and add code generation testcases to test this functionality.


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[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Quinn Pham via Phabricator via cfe-commits]

quinnp updated this revision to Diff 419126.
quinnp added a comment.

Moving testcases that require code generation from 
`clang/test/Sema/ppc-pair-mma-types.c` to 
`clang/test/CodeGen/PowerPC/ppc-mma-types.c` and 
`clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma-types.c`. This is because 
some of these tests use the line 
`Ops.push_back(EmitArrayToPointerDecay(E->getArg(i)).getPointer());` which I 
initially removed from EmitPPCbuiltinExpr. I have added this back in the switch 
statement where it is needed.


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Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
  clang/test/CodeGen/PowerPC/builtins-ppc-int128.c
  clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma-types.c
  clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cas.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fetch.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
  clang/test/CodeGen/PowerPC/ppc-mma-types.c
  clang/test/Sema/ppc-pair-mma-types.c

Index: clang/test/Sema/ppc-pair-mma-types.c
===
--- clang/test/Sema/ppc-pair-mma-types.c
+++ clang/test/Sema/ppc-pair-mma-types.c
@@ -12,11 +12,6 @@
 
 // typedef
 typedef __vector_quad vq_t;
-void testVQTypedef(int *inp, int *outp) {
-  vq_t *vqin = (vq_t *)inp;
-  vq_t *vqout = (vq_t *)outp;
-  *vqout = *vqin;
-}
 
 // function argument
 void testVQArg1(__vector_quad vq, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
@@ -29,57 +24,22 @@
   *vqp = vq;
 }
 
-void testVQArg3(__vector_quad *vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
-void testVQArg4(const __vector_quad *const vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
-void testVQArg5(__vector_quad vqa[], int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = vqa[0];
-}
-
 void testVQArg6(const vq_t vq, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   *vqp = vq;
 }
 
-void testVQArg7(const vq_t *vq, int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  *vqp = *vq;
-}
-
 // function return
 __vector_quad testVQRet1(int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   return *vqp; // expected-error {{invalid use of PPC MMA type}}
 }
 
-__vector_quad *testVQRet2(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
-const __vector_quad *testVQRet3(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
 const vq_t testVQRet4(int *ptr) { // expected-error {{invalid use of PPC MMA type}}
   __vector_quad *vqp = (__vector_quad *)ptr;
   return *vqp; // expected-error {{invalid use of PPC MMA type}}
 }
 
-const vq_t *testVQRet5(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  return vqp + 2;
-}
-
 // global
 __vector_quad globalvq;// expected-error {{invalid use of PPC MMA type}}
 const __vector_quad globalvq2; // expected-error {{invalid use of PPC MMA type}}
@@ -87,16 +47,6 @@
 const __vector_quad *const globalvqp2;
 vq_t globalvq_t; // expected-error {{invalid use of PPC MMA type}}
 
-// local
-void testVQLocal(int *ptr, vector unsigned char vc) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  __vector_quad vq1 = *vqp;
-  __vector_quad vq2;
-  __builtin_mma_xxsetaccz();
-  __vector_quad vq3;
-  __builtin_mma_xvi4ger8(, vc, vc);
-  *vqp = vq3;
-}
 
 // struct field
 struct TestVQStruct {
@@ -106,17 +56,6 @@
   __vector_quad *vq;
 };
 
-// sizeof / alignof
-int testVQSizeofAlignof(int *ptr) {
-  __vector_quad *vqp = (__vector_quad *)ptr;
-  __vector_quad vq = *vqp;
-  unsigned sizet = sizeof(__vector_quad);
-  unsigned alignt = __alignof__(__vector_quad);
-  unsigned sizev = sizeof(vq);
-  unsigned alignv = __alignof__(vq);
-  return sizet + alignt + sizev + alignv;
-}
-
 // operators
 int testVQOperators1(int *ptr) {
   __vector_quad *vqp = (__vector_quad *)ptr;
@@ -168,11 +107,6 @@
 
 // typedef
 typedef __vector_pair vp_t;
-void testVPTypedef(int *inp, int *outp) {
-  vp_t *vpin = (vp_t *)inp;
-  vp_t *vpout = (vp_t *)outp;
-  *vpout = *vpin;
-}
 
 // function argument
 void testVPArg1(__vector_pair vp, int *ptr) { // expected-error {{invalid use of PPC MMA type}}
@@ -185,57 +119,22 @@
   *vpp = vp;
 }
 
-void testVPArg3(__vector_pair *vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = *vp;
-}
-
-void testVPArg4(const __vector_pair *const vp, int *ptr) {
-  __vector_pair *vpp = (__vector_pair *)ptr;
-  *vpp = *vp;
-}
-
-void testVPArg5(__vector_pair vpa[], 

[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Quinn Pham via Phabricator via cfe-commits]

quinnp added inline comments.



Comment at: clang/lib/CodeGen/CGBuiltin.cpp:15208
-  for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) {
-if (E->getArg(i)->getType()->isArrayType())
-  Ops.push_back(EmitArrayToPointerDecay(E->getArg(i)).getPointer());

amyk wrote:
> A question I have is do we not need to consider 
> this/`EmitArrayToPointerDecay()` anymore? Was this not used for anything?
Thanks for your comment! I could not find any builtins that used this case in 
the loop for emitting their arguments and did not see any failures when I 
removed it. I am going to look into this now and verify whether or not this is 
needed.


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[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Amy Kwan via Phabricator via cfe-commits]

amyk added a comment.

Overall this change looks good to me, although I do have one question.




Comment at: clang/lib/CodeGen/CGBuiltin.cpp:15208
-  for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) {
-if (E->getArg(i)->getType()->isArrayType())
-  Ops.push_back(EmitArrayToPointerDecay(E->getArg(i)).getPointer());

A question I have is do we not need to consider 
this/`EmitArrayToPointerDecay()` anymore? Was this not used for anything?


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[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Quinn Pham via Phabricator via cfe-commits]

quinnp updated this revision to Diff 416917.
quinnp added a comment.

Fixing a failing test case.


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Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
  clang/test/CodeGen/PowerPC/builtins-ppc-int128.c
  clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cas.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fetch.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c

Index: clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
===
--- clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
+++ clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
@@ -14,13 +14,11 @@
 
 // CHECK-LABEL: @test_popcntb(
 // CHECK:[[TMP0:%.*]] = load i64, i64* @a, align 8
-// CHECK-NEXT:[[TMP1:%.*]] = load i64, i64* @a, align 8
 // CHECK-NEXT:[[POPCNTB:%.*]] = call i64 @llvm.ppc.popcntb.i64.i64(i64 [[TMP0]])
 // CHECK-NEXT:ret i64 [[POPCNTB]]
 //
 // CHECK-32-LABEL: @test_popcntb(
 // CHECK-32:[[TMP0:%.*]] = load i32, i32* @a, align 4
-// CHECK-32-NEXT:[[TMP1:%.*]] = load i32, i32* @a, align 4
 // CHECK-32-NEXT:[[POPCNTB:%.*]] = call i32 @llvm.ppc.popcntb.i32.i32(i32 [[TMP0]])
 // CHECK-32-NEXT:ret i32 [[POPCNTB]]
 //
@@ -198,13 +196,11 @@
 
 // CHECK-LABEL: @test_builtin_ppc_popcntb(
 // CHECK:[[TMP0:%.*]] = load i64, i64* @a, align 8
-// CHECK-NEXT:[[TMP1:%.*]] = load i64, i64* @a, align 8
 // CHECK-NEXT:[[POPCNTB:%.*]] = call i64 @llvm.ppc.popcntb.i64.i64(i64 [[TMP0]])
 // CHECK-NEXT:ret i64 [[POPCNTB]]
 //
 // CHECK-32-LABEL: @test_builtin_ppc_popcntb(
 // CHECK-32:[[TMP0:%.*]] = load i32, i32* @a, align 4
-// CHECK-32-NEXT:[[TMP1:%.*]] = load i32, i32* @a, align 4
 // CHECK-32-NEXT:[[POPCNTB:%.*]] = call i32 @llvm.ppc.popcntb.i32.i32(i32 [[TMP0]])
 // CHECK-32-NEXT:ret i32 [[POPCNTB]]
 //
Index: clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
===
--- clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
+++ clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
@@ -15,11 +15,11 @@
   // CHECK-LABEL: test_builtin_ppc_rldimi
   // CHECK:   %res = alloca i64, align 8
   // CHECK-NEXT:  [[RA:%[0-9]+]] = load i64, i64* @ull, align 8
-  // CHECK-NEXT:  [[RB:%[0-9]+]] = load i64, i64* @ull, align 8
-  // CHECK-NEXT:  [[RC:%[0-9]+]] = call i64 @llvm.fshl.i64(i64 [[RA]], i64 [[RA]], i64 63)
-  // CHECK-NEXT:  [[RD:%[0-9]+]] = and i64 [[RC]], 72057593769492480
-  // CHECK-NEXT:  [[RE:%[0-9]+]] = and i64 [[RB]], -72057593769492481
-  // CHECK-NEXT:  [[RF:%[0-9]+]] = or i64 [[RD]], [[RE]]
+  // CHECK-NEXT:  [[RB:%[0-9]+]] = call i64 @llvm.fshl.i64(i64 [[RA]], i64 [[RA]], i64 63)
+  // CHECK-NEXT:  [[RC:%[0-9]+]] = and i64 [[RB]], 72057593769492480
+  // CHECK-NEXT:  [[RD:%[0-9]+]] = load i64, i64* @ull, align 8
+  // CHECK-NEXT:  [[RE:%[0-9]+]] = and i64 [[RD]], -72057593769492481
+  // CHECK-NEXT:  [[RF:%[0-9]+]] = or i64 [[RC]], [[RE]]
   // CHECK-NEXT:  store i64 [[RF]], i64* %res, align 8
   // CHECK-NEXT:  ret void
 
@@ -31,11 +31,11 @@
   // CHECK-LABEL: test_builtin_ppc_rlwimi
   // CHECK:   %res = alloca i32, align 4
   // CHECK-NEXT:  [[RA:%[0-9]+]] = load i32, i32* @ui, align 4
-  // CHECK-NEXT:  [[RB:%[0-9]+]] = load i32, i32* @ui, align 4
-  // CHECK-NEXT:  [[RC:%[0-9]+]] = call i32 @llvm.fshl.i32(i32 [[RA]], i32 [[RA]], i32 31)
-  // CHECK-NEXT:  [[RD:%[0-9]+]] = and i32 [[RC]], 16776960
-  // CHECK-NEXT:  [[RE:%[0-9]+]] = and i32 [[RB]], -16776961
-  // CHECK-NEXT:  [[RF:%[0-9]+]] = or i32 [[RD]], [[RE]]
+  // CHECK-NEXT:  [[RB:%[0-9]+]] = call i32 @llvm.fshl.i32(i32 [[RA]], i32 [[RA]], i32 31)
+  // CHECK-NEXT:  [[RC:%[0-9]+]] = and i32 [[RB]], 16776960
+  // CHECK-NEXT:  [[RD:%[0-9]+]] = load i32, i32* @ui, align 4
+  // CHECK-NEXT:  [[RE:%[0-9]+]] = and i32 [[RD]], -16776961
+  // CHECK-NEXT:  [[RF:%[0-9]+]] = or i32 [[RC]], [[RE]]
   // CHECK-NEXT:  store i32 [[RF]], i32* %res, align 4
   // CHECK-NEXT:  ret void
 
Index: clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.c
===
--- clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.c
+++ clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.c
@@ -95,7 +95,6 @@
 // CHECK-LABEL: @fnmsub(
 // CHECK: [[D_ADDR:%.*]] = alloca double, align 8
 // CHECK-NEXT:store double [[D:%.*]], double* [[D_ADDR]], align 8
-// CHECK-COUNT-3:load double, double* [[D_ADDR]], align 8
 // CHECK-NEXT:[[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8
 // CHECK-NEXT:

[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Quinn Pham via Phabricator via cfe-commits]

quinnp updated this revision to Diff 415412.
quinnp added a comment.

Minor formatting update.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121637/new/

https://reviews.llvm.org/D121637

Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
  clang/test/CodeGen/PowerPC/builtins-ppc-int128.c
  clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cas.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fetch.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c

Index: clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
===
--- clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
+++ clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
@@ -14,13 +14,11 @@
 
 // CHECK-LABEL: @test_popcntb(
 // CHECK:[[TMP0:%.*]] = load i64, i64* @a, align 8
-// CHECK-NEXT:[[TMP1:%.*]] = load i64, i64* @a, align 8
 // CHECK-NEXT:[[POPCNTB:%.*]] = call i64 @llvm.ppc.popcntb.i64.i64(i64 [[TMP0]])
 // CHECK-NEXT:ret i64 [[POPCNTB]]
 //
 // CHECK-32-LABEL: @test_popcntb(
 // CHECK-32:[[TMP0:%.*]] = load i32, i32* @a, align 4
-// CHECK-32-NEXT:[[TMP1:%.*]] = load i32, i32* @a, align 4
 // CHECK-32-NEXT:[[POPCNTB:%.*]] = call i32 @llvm.ppc.popcntb.i32.i32(i32 [[TMP0]])
 // CHECK-32-NEXT:ret i32 [[POPCNTB]]
 //
@@ -198,13 +196,11 @@
 
 // CHECK-LABEL: @test_builtin_ppc_popcntb(
 // CHECK:[[TMP0:%.*]] = load i64, i64* @a, align 8
-// CHECK-NEXT:[[TMP1:%.*]] = load i64, i64* @a, align 8
 // CHECK-NEXT:[[POPCNTB:%.*]] = call i64 @llvm.ppc.popcntb.i64.i64(i64 [[TMP0]])
 // CHECK-NEXT:ret i64 [[POPCNTB]]
 //
 // CHECK-32-LABEL: @test_builtin_ppc_popcntb(
 // CHECK-32:[[TMP0:%.*]] = load i32, i32* @a, align 4
-// CHECK-32-NEXT:[[TMP1:%.*]] = load i32, i32* @a, align 4
 // CHECK-32-NEXT:[[POPCNTB:%.*]] = call i32 @llvm.ppc.popcntb.i32.i32(i32 [[TMP0]])
 // CHECK-32-NEXT:ret i32 [[POPCNTB]]
 //
Index: clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
===
--- clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
+++ clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
@@ -15,11 +15,11 @@
   // CHECK-LABEL: test_builtin_ppc_rldimi
   // CHECK:   %res = alloca i64, align 8
   // CHECK-NEXT:  [[RA:%[0-9]+]] = load i64, i64* @ull, align 8
-  // CHECK-NEXT:  [[RB:%[0-9]+]] = load i64, i64* @ull, align 8
-  // CHECK-NEXT:  [[RC:%[0-9]+]] = call i64 @llvm.fshl.i64(i64 [[RA]], i64 [[RA]], i64 63)
-  // CHECK-NEXT:  [[RD:%[0-9]+]] = and i64 [[RC]], 72057593769492480
-  // CHECK-NEXT:  [[RE:%[0-9]+]] = and i64 [[RB]], -72057593769492481
-  // CHECK-NEXT:  [[RF:%[0-9]+]] = or i64 [[RD]], [[RE]]
+  // CHECK-NEXT:  [[RB:%[0-9]+]] = call i64 @llvm.fshl.i64(i64 [[RA]], i64 [[RA]], i64 63)
+  // CHECK-NEXT:  [[RC:%[0-9]+]] = and i64 [[RB]], 72057593769492480
+  // CHECK-NEXT:  [[RD:%[0-9]+]] = load i64, i64* @ull, align 8
+  // CHECK-NEXT:  [[RE:%[0-9]+]] = and i64 [[RD]], -72057593769492481
+  // CHECK-NEXT:  [[RF:%[0-9]+]] = or i64 [[RC]], [[RE]]
   // CHECK-NEXT:  store i64 [[RF]], i64* %res, align 8
   // CHECK-NEXT:  ret void
 
@@ -31,11 +31,11 @@
   // CHECK-LABEL: test_builtin_ppc_rlwimi
   // CHECK:   %res = alloca i32, align 4
   // CHECK-NEXT:  [[RA:%[0-9]+]] = load i32, i32* @ui, align 4
-  // CHECK-NEXT:  [[RB:%[0-9]+]] = load i32, i32* @ui, align 4
-  // CHECK-NEXT:  [[RC:%[0-9]+]] = call i32 @llvm.fshl.i32(i32 [[RA]], i32 [[RA]], i32 31)
-  // CHECK-NEXT:  [[RD:%[0-9]+]] = and i32 [[RC]], 16776960
-  // CHECK-NEXT:  [[RE:%[0-9]+]] = and i32 [[RB]], -16776961
-  // CHECK-NEXT:  [[RF:%[0-9]+]] = or i32 [[RD]], [[RE]]
+  // CHECK-NEXT:  [[RB:%[0-9]+]] = call i32 @llvm.fshl.i32(i32 [[RA]], i32 [[RA]], i32 31)
+  // CHECK-NEXT:  [[RC:%[0-9]+]] = and i32 [[RB]], 16776960
+  // CHECK-NEXT:  [[RD:%[0-9]+]] = load i32, i32* @ui, align 4
+  // CHECK-NEXT:  [[RE:%[0-9]+]] = and i32 [[RD]], -16776961
+  // CHECK-NEXT:  [[RF:%[0-9]+]] = or i32 [[RC]], [[RE]]
   // CHECK-NEXT:  store i32 [[RF]], i32* %res, align 4
   // CHECK-NEXT:  ret void
 
Index: clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.c
===
--- clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.c
+++ clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.c
@@ -15,9 +15,8 @@
 
 // CHECK-LABEL: @test_fric(
 // CHECK:[[TMP0:%.*]] = load double, double* @a, align 8
-// CHECK-NEXT:[[TMP1:%.*]] = load double, double* @a, align 8
-// CHECK-NEXT:[[TMP2:%.*]] = call double @llvm.rint.f64(double [[TMP1]])
-// CHECK-NEXT:ret double [[TMP2]]
+// CHECK-NEXT:[[TMP1:%.*]] = call double @llvm.rint.f64(double [[TMP0]])
+// CHECK-NEXT:ret double 

[PATCH] D121637: [PowerPC] Fix EmitPPCBuiltinExpr to emit arguments once

[Quinn Pham via Phabricator via cfe-commits]

quinnp created this revision.
Herald added subscribers: shchenz, kbarton, nemanjai.
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quinnp requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

This patch refactors `EmitPPCBuiltinExpr` in `CGBuiltin.cpp` to remove
the loop at the begining of the function that emits the arguments and
to delay emitting the arguments until inside the switch statement. This
refactor will put `EmitPPCBuiltinExpr` in line with the strategy of the
target independent function `EmitBuiltinExpr`. Also, this refactor
ensures that arguments are only emitted once.

Tests that included builtins affected by the refactor have been modified
to match expected behaviour.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D121637

Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c
  clang/test/CodeGen/PowerPC/builtins-ppc-int128.c
  clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cas.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fetch.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
  clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c

Index: clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
===
--- clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
+++ clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
@@ -14,13 +14,11 @@
 
 // CHECK-LABEL: @test_popcntb(
 // CHECK:[[TMP0:%.*]] = load i64, i64* @a, align 8
-// CHECK-NEXT:[[TMP1:%.*]] = load i64, i64* @a, align 8
 // CHECK-NEXT:[[POPCNTB:%.*]] = call i64 @llvm.ppc.popcntb.i64.i64(i64 [[TMP0]])
 // CHECK-NEXT:ret i64 [[POPCNTB]]
 //
 // CHECK-32-LABEL: @test_popcntb(
 // CHECK-32:[[TMP0:%.*]] = load i32, i32* @a, align 4
-// CHECK-32-NEXT:[[TMP1:%.*]] = load i32, i32* @a, align 4
 // CHECK-32-NEXT:[[POPCNTB:%.*]] = call i32 @llvm.ppc.popcntb.i32.i32(i32 [[TMP0]])
 // CHECK-32-NEXT:ret i32 [[POPCNTB]]
 //
@@ -198,13 +196,11 @@
 
 // CHECK-LABEL: @test_builtin_ppc_popcntb(
 // CHECK:[[TMP0:%.*]] = load i64, i64* @a, align 8
-// CHECK-NEXT:[[TMP1:%.*]] = load i64, i64* @a, align 8
 // CHECK-NEXT:[[POPCNTB:%.*]] = call i64 @llvm.ppc.popcntb.i64.i64(i64 [[TMP0]])
 // CHECK-NEXT:ret i64 [[POPCNTB]]
 //
 // CHECK-32-LABEL: @test_builtin_ppc_popcntb(
 // CHECK-32:[[TMP0:%.*]] = load i32, i32* @a, align 4
-// CHECK-32-NEXT:[[TMP1:%.*]] = load i32, i32* @a, align 4
 // CHECK-32-NEXT:[[POPCNTB:%.*]] = call i32 @llvm.ppc.popcntb.i32.i32(i32 [[TMP0]])
 // CHECK-32-NEXT:ret i32 [[POPCNTB]]
 //
Index: clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
===
--- clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
+++ clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
@@ -15,11 +15,11 @@
   // CHECK-LABEL: test_builtin_ppc_rldimi
   // CHECK:   %res = alloca i64, align 8
   // CHECK-NEXT:  [[RA:%[0-9]+]] = load i64, i64* @ull, align 8
-  // CHECK-NEXT:  [[RB:%[0-9]+]] = load i64, i64* @ull, align 8
-  // CHECK-NEXT:  [[RC:%[0-9]+]] = call i64 @llvm.fshl.i64(i64 [[RA]], i64 [[RA]], i64 63)
-  // CHECK-NEXT:  [[RD:%[0-9]+]] = and i64 [[RC]], 72057593769492480
-  // CHECK-NEXT:  [[RE:%[0-9]+]] = and i64 [[RB]], -72057593769492481
-  // CHECK-NEXT:  [[RF:%[0-9]+]] = or i64 [[RD]], [[RE]]
+  // CHECK-NEXT:  [[RB:%[0-9]+]] = call i64 @llvm.fshl.i64(i64 [[RA]], i64 [[RA]], i64 63)
+  // CHECK-NEXT:  [[RC:%[0-9]+]] = and i64 [[RB]], 72057593769492480
+  // CHECK-NEXT:  [[RD:%[0-9]+]] = load i64, i64* @ull, align 8
+  // CHECK-NEXT:  [[RE:%[0-9]+]] = and i64 [[RD]], -72057593769492481
+  // CHECK-NEXT:  [[RF:%[0-9]+]] = or i64 [[RC]], [[RE]]
   // CHECK-NEXT:  store i64 [[RF]], i64* %res, align 8
   // CHECK-NEXT:  ret void
 
@@ -31,11 +31,11 @@
   // CHECK-LABEL: test_builtin_ppc_rlwimi
   // CHECK:   %res = alloca i32, align 4
   // CHECK-NEXT:  [[RA:%[0-9]+]] = load i32, i32* @ui, align 4
-  // CHECK-NEXT:  [[RB:%[0-9]+]] = load i32, i32* @ui, align 4
-  // CHECK-NEXT:  [[RC:%[0-9]+]] = call i32 @llvm.fshl.i32(i32 [[RA]], i32 [[RA]], i32 31)
-  // CHECK-NEXT:  [[RD:%[0-9]+]] = and i32 [[RC]], 16776960
-  // CHECK-NEXT:  [[RE:%[0-9]+]] = and i32 [[RB]], -16776961
-  // CHECK-NEXT:  [[RF:%[0-9]+]] = or i32 [[RD]], [[RE]]
+  // CHECK-NEXT:  [[RB:%[0-9]+]] = call i32 @llvm.fshl.i32(i32 [[RA]], i32 [[RA]], i32 31)
+  // CHECK-NEXT:  [[RC:%[0-9]+]] = and i32 [[RB]], 16776960
+  // CHECK-NEXT:  [[RD:%[0-9]+]] = load i32, i32* @ui, align 4
+  // CHECK-NEXT:  [[RE:%[0-9]+]] = and i32 [[RD]], -16776961
+  // CHECK-NEXT:  [[RF:%[0-9]+]] = or i32 [[RC]], [[RE]]
   // CHECK-NEXT:  store i32 [[RF]], i32* %res, align 4
   // CHECK-NEXT:  ret void
 
Index: clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fp.c