[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-12-04 Thread Owen Pan via Phabricator via cfe-commits
owenpan added inline comments. Comment at: clang/lib/Format/FormatToken.h:1572 + bool isBlockBegin(const FormatToken , const FormatStyle ) const { +return Style.isVerilog() ? isVerilogBegin(Tok) : Tok.is(tok::l_brace); + } HazardyKnusperkeks wrote: >

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-12-04 Thread Owen Pan via Phabricator via cfe-commits
owenpan added a comment. In D123450#3465024 , @MyDeveloperDay wrote: > ``if (Keywords.isBlockBegin(*FormatTok, Style)) {`` > > I'm not a massive fan of handling l_brace and begin and end as the same > thing, I might be tempted to handle them

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-09-02 Thread Owen Pan via Phabricator via cfe-commits
owenpan added inline comments. Comment at: clang/lib/Format/UnwrappedLineParser.cpp:2592 - if (FormatTok->is(tok::l_brace)) { + if (Keywords.isBlockBegin(*FormatTok, Style)) { FormatTok->setFinalizedType(TT_ControlStatementLBrace); owenpan wrote: > This

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-09-02 Thread Owen Pan via Phabricator via cfe-commits
owenpan added inline comments. Comment at: clang/lib/Format/FormatToken.h:1550 + bool isBlockBegin(const FormatToken , const FormatStyle ) const { +return Tok.is(TT_MacroBlockBegin) || + (Style.isVerilog() ? isVerilogBegin(Tok) : Tok.is(tok::l_brace));

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-09-02 Thread Owen Pan via Phabricator via cfe-commits
owenpan added inline comments. Comment at: clang/lib/Format/UnwrappedLineParser.cpp:2592 - if (FormatTok->is(tok::l_brace)) { + if (Keywords.isBlockBegin(*FormatTok, Style)) { FormatTok->setFinalizedType(TT_ControlStatementLBrace); This is likely the

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-07-01 Thread Owen Pan via Phabricator via cfe-commits
owenpan added a comment. `clang/docs/ClangFormatStyleOptions.rst` was out of sync because `dump_format_style.py` had not been run. Fixed in cc55d97 . Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-06-25 Thread sstwcw via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG9ed2e68c9ae5: [clang-format] Parse Verilog if statements (authored by sstwcw). Changed prior to commit:

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-06-09 Thread sstwcw via Phabricator via cfe-commits
sstwcw updated this revision to Diff 435777. sstwcw added a comment. - add brace Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D123450/new/ https://reviews.llvm.org/D123450 Files: clang/docs/ClangFormat.rst clang/include/clang/Format/Format.h

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-06-09 Thread sstwcw via Phabricator via cfe-commits
sstwcw updated this revision to Diff 435774. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D123450/new/ https://reviews.llvm.org/D123450 Files: clang/docs/ClangFormat.rst clang/include/clang/Format/Format.h clang/lib/Format/Format.cpp

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-06-09 Thread sstwcw via Phabricator via cfe-commits
sstwcw updated this revision to Diff 435773. sstwcw added a comment. use isVerilog Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D123450/new/ https://reviews.llvm.org/D123450 Files: clang/docs/ClangFormat.rst

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-06-09 Thread sstwcw via Phabricator via cfe-commits
sstwcw updated this revision to Diff 435771. sstwcw marked 2 inline comments as done. sstwcw added a comment. add MacroBlockBegin Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D123450/new/ https://reviews.llvm.org/D123450 Files:

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-04-21 Thread MyDeveloperDay via Phabricator via cfe-commits
MyDeveloperDay added a comment. As first passes for adding a new language I think this looks pretty good. ``if (Keywords.isBlockBegin(*FormatTok, Style)) {`` I'm not a massive fan of handling l_brace and begin and end as the same thing, I might be tempted to handle them separately, as then its

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-04-21 Thread Björn Schäpers via Phabricator via cfe-commits
HazardyKnusperkeks added inline comments. Comment at: clang/lib/Format/FormatToken.h:1572 + bool isBlockBegin(const FormatToken , const FormatStyle ) const { +return Style.isVerilog() ? isVerilogBegin(Tok) : Tok.is(tok::l_brace); + } Shouldn't we add

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-04-13 Thread sstwcw via Phabricator via cfe-commits
sstwcw marked an inline comment as done. sstwcw added inline comments. Comment at: clang/lib/Format/FormatToken.h:374 + /// Verilog we want to treat the backtick like a hash. + tok::TokenKind AliasToken = tok::unknown; + HazardyKnusperkeks wrote: > sstwcw

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-04-13 Thread sstwcw via Phabricator via cfe-commits
sstwcw updated this revision to Diff 422496. sstwcw edited the summary of this revision. sstwcw added a comment. abandon alias Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D123450/new/ https://reviews.llvm.org/D123450 Files:

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-04-12 Thread Björn Schäpers via Phabricator via cfe-commits
HazardyKnusperkeks added inline comments. Comment at: clang/lib/Format/FormatToken.h:374 + /// Verilog we want to treat the backtick like a hash. + tok::TokenKind AliasToken = tok::unknown; + sstwcw wrote: > HazardyKnusperkeks wrote: > > Can't we do that with

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-04-11 Thread sstwcw via Phabricator via cfe-commits
sstwcw updated this revision to Diff 422049. sstwcw marked 2 inline comments as done. sstwcw added a comment. add comment Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D123450/new/ https://reviews.llvm.org/D123450 Files:

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-04-11 Thread sstwcw via Phabricator via cfe-commits
sstwcw marked 3 inline comments as done. sstwcw added inline comments. Comment at: clang/lib/Format/FormatToken.h:374 + /// Verilog we want to treat the backtick like a hash. + tok::TokenKind AliasToken = tok::unknown; + HazardyKnusperkeks wrote: > Can't we do

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-04-10 Thread Björn Schäpers via Phabricator via cfe-commits
HazardyKnusperkeks added inline comments. Comment at: clang/lib/Format/FormatToken.h:374 + /// Verilog we want to treat the backtick like a hash. + tok::TokenKind AliasToken = tok::unknown; + Can't we do that with a type? I'm not very happy about the alias,

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-04-09 Thread sstwcw via Phabricator via cfe-commits
sstwcw added inline comments. Comment at: clang/lib/Format/FormatToken.h:1157 +VerilogExtraKeywords = std::unordered_set( +{kw_always, kw_always_comb, kw_always_ff,kw_always_latch, + kw_assert, kw_assign, kw_assume, kw_automatic,

[PATCH] D123450: [clang-format] Parse Verilog if statements

2022-04-09 Thread sstwcw via Phabricator via cfe-commits
sstwcw created this revision. sstwcw added reviewers: MyDeveloperDay, HazardyKnusperkeks, curdeius, owenpan. Herald added a subscriber: mgorny. Herald added a project: All. sstwcw requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. This patch