Re: [PATCH] D20620: [Clang][AVX512][Builtin] Fix palignr intrinsics header
This revision was automatically updated to reflect the committed changes. Closed by commit rL270707: [Clang][AVX512][Builtin] Fix palignr intrinsics header (authored by mzuckerm). Changed prior to commit: http://reviews.llvm.org/D20620?vs=58406=58425#toc Repository: rL LLVM http://reviews.llvm.org/D20620 Files: cfe/trunk/lib/Headers/avx512bwintrin.h Index: cfe/trunk/lib/Headers/avx512bwintrin.h === --- cfe/trunk/lib/Headers/avx512bwintrin.h +++ cfe/trunk/lib/Headers/avx512bwintrin.h @@ -2145,19 +2145,19 @@ #define _mm512_alignr_epi8(A, B, N) __extension__ ({\ (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \ - (__v64qi)(__m512i)(B), (int)(N) * 8, \ + (__v64qi)(__m512i)(B), (int)(N), \ (__v64qi)_mm512_undefined_pd(), \ (__mmask64)-1); }) #define _mm512_mask_alignr_epi8(W, U, A, B, N) __extension__({\ (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \ - (__v64qi)(__m512i)(B), (int)(N) * 8, \ + (__v64qi)(__m512i)(B), (int)(N), \ (__v64qi)(__m512i)(W), \ (__mmask64)(U)); }) #define _mm512_maskz_alignr_epi8(U, A, B, N) __extension__({\ (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \ - (__v64qi)(__m512i)(B), (int)(N) * 8, \ + (__v64qi)(__m512i)(B), (int)(N), \ (__v64qi)_mm512_setzero_si512(), \ (__mmask64)(U)); }) Index: cfe/trunk/lib/Headers/avx512bwintrin.h === --- cfe/trunk/lib/Headers/avx512bwintrin.h +++ cfe/trunk/lib/Headers/avx512bwintrin.h @@ -2145,19 +2145,19 @@ #define _mm512_alignr_epi8(A, B, N) __extension__ ({\ (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \ - (__v64qi)(__m512i)(B), (int)(N) * 8, \ + (__v64qi)(__m512i)(B), (int)(N), \ (__v64qi)_mm512_undefined_pd(), \ (__mmask64)-1); }) #define _mm512_mask_alignr_epi8(W, U, A, B, N) __extension__({\ (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \ - (__v64qi)(__m512i)(B), (int)(N) * 8, \ + (__v64qi)(__m512i)(B), (int)(N), \ (__v64qi)(__m512i)(W), \ (__mmask64)(U)); }) #define _mm512_maskz_alignr_epi8(U, A, B, N) __extension__({\ (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \ - (__v64qi)(__m512i)(B), (int)(N) * 8, \ + (__v64qi)(__m512i)(B), (int)(N), \ (__v64qi)_mm512_setzero_si512(), \ (__mmask64)(U)); }) ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D20620: [Clang][AVX512][Builtin] Fix palignr intrinsics header
igorb accepted this revision. igorb added a comment. This revision is now accepted and ready to land. LGTM http://reviews.llvm.org/D20620 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D20620: [Clang][AVX512][Builtin] Fix palignr intrinsics header
m_zuckerman created this revision. m_zuckerman added reviewers: AsafBadouh, igorb, delena. m_zuckerman added a subscriber: cfe-commits. We don't need to multiply by eight the IMM. The instruction is doing that. http://reviews.llvm.org/D20620 Files: lib/Headers/avx512bwintrin.h Index: lib/Headers/avx512bwintrin.h === --- lib/Headers/avx512bwintrin.h +++ lib/Headers/avx512bwintrin.h @@ -2145,19 +2145,19 @@ #define _mm512_alignr_epi8(A, B, N) __extension__ ({\ (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \ - (__v64qi)(__m512i)(B), (int)(N) * 8, \ + (__v64qi)(__m512i)(B), (int)(N), \ (__v64qi)_mm512_undefined_pd(), \ (__mmask64)-1); }) #define _mm512_mask_alignr_epi8(W, U, A, B, N) __extension__({\ (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \ - (__v64qi)(__m512i)(B), (int)(N) * 8, \ + (__v64qi)(__m512i)(B), (int)(N), \ (__v64qi)(__m512i)(W), \ (__mmask64)(U)); }) #define _mm512_maskz_alignr_epi8(U, A, B, N) __extension__({\ (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \ - (__v64qi)(__m512i)(B), (int)(N) * 8, \ + (__v64qi)(__m512i)(B), (int)(N), \ (__v64qi)_mm512_setzero_si512(), \ (__mmask64)(U)); }) Index: lib/Headers/avx512bwintrin.h === --- lib/Headers/avx512bwintrin.h +++ lib/Headers/avx512bwintrin.h @@ -2145,19 +2145,19 @@ #define _mm512_alignr_epi8(A, B, N) __extension__ ({\ (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \ - (__v64qi)(__m512i)(B), (int)(N) * 8, \ + (__v64qi)(__m512i)(B), (int)(N), \ (__v64qi)_mm512_undefined_pd(), \ (__mmask64)-1); }) #define _mm512_mask_alignr_epi8(W, U, A, B, N) __extension__({\ (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \ - (__v64qi)(__m512i)(B), (int)(N) * 8, \ + (__v64qi)(__m512i)(B), (int)(N), \ (__v64qi)(__m512i)(W), \ (__mmask64)(U)); }) #define _mm512_maskz_alignr_epi8(U, A, B, N) __extension__({\ (__m512i)__builtin_ia32_palignr512_mask((__v64qi)(__m512i)(A), \ - (__v64qi)(__m512i)(B), (int)(N) * 8, \ + (__v64qi)(__m512i)(B), (int)(N), \ (__v64qi)_mm512_setzero_si512(), \ (__mmask64)(U)); }) ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits