[PATCH] D41968: [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.

2018-05-15 Thread Phabricator via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rL332414: [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs. (authored by jhb, committed by ). Herald added a subscriber: llvm-commits. Repository: rL LLVM

[PATCH] D41968: [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.

2018-05-03 Thread Simon Dardis via Phabricator via cfe-commits
sdardis accepted this revision. sdardis added a comment. This revision is now accepted and ready to land. Herald added a subscriber: chrib. Sorry for the delay. LGTM. Repository: rUNW libunwind https://reviews.llvm.org/D41968 ___ cfe-commits

[PATCH] D41968: [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.

2018-04-06 Thread John Baldwin via Phabricator via cfe-commits
bsdjhb added a comment. Ping @sdardis @compnerd Repository: rUNW libunwind https://reviews.llvm.org/D41968 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D41968: [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.

2018-03-14 Thread John Baldwin via Phabricator via cfe-commits
bsdjhb added a comment. @sdardis ping. I think the approach I've used for O32 is probably the right one in that it matches what DWARF expects (DWARF doesn't treat the 32-bit floating point registers as pairs but as individual registers). I think the question is if I O32 with 32-bit FP

[PATCH] D41968: [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.

2018-03-05 Thread John Baldwin via Phabricator via cfe-commits
bsdjhb marked 2 inline comments as done. bsdjhb added a comment. This version follows the suggestion I made earlier of treating 32-bit floating point registers as a "plain" register for O32 rather than a floating-point register. It seems to work for me though for O32 I've only tested with

[PATCH] D41968: [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.

2018-03-05 Thread John Baldwin via Phabricator via cfe-commits
bsdjhb updated this revision to Diff 137085. bsdjhb added a comment. - Add a comment about using a single FP layout for O32. - Treat 32-bit floating point registers on O32 as plain registers. Repository: rUNW libunwind https://reviews.llvm.org/D41968 Files: include/__libunwind_config.h

[PATCH] D41968: [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.

2018-02-27 Thread John Baldwin via Phabricator via cfe-commits
bsdjhb updated this revision to Diff 136164. bsdjhb added a comment. Herald added a subscriber: christof. - Rebase after N32 commit. - Use ldc1/sdc1 rather than l.d and s.d. Repository: rUNW libunwind https://reviews.llvm.org/D41968 Files: include/__libunwind_config.h

[PATCH] D41968: [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.

2018-02-27 Thread John Baldwin via Phabricator via cfe-commits
bsdjhb added a comment. Hmmm, so I was somewhat mistaken as DwarfInstructions.hpp::stepWithDwarf() does use the Register class's setFloatRegister(), however, it assumes that the floating point register is always a double (DwarfInstructions.hpp::getSavedFloatRegister() uses

[PATCH] D41968: [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.

2018-02-27 Thread John Baldwin via Phabricator via cfe-commits
bsdjhb added a comment. After thinking about this some more, I need to rework this a bit. The choice of how to expose the floating point registers via getFloatingPointRegister / setFloatingPointRegister only affects consumers of the libunwind unw_get_fpreg/unw_set_fpreg. I think a bigger

[PATCH] D41968: [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.

2018-02-08 Thread Simon Dardis via Phabricator via cfe-commits
sdardis added a reviewer: compnerd. sdardis added a comment. I am not sure what the answer is. There's a slightly different issue in that returning the contents of a floating point register on MIPS and expecting it to be a double is not necessarily correct. For a 64bit FPU, the result of

[PATCH] D41968: [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.

2018-01-11 Thread John Baldwin via Phabricator via cfe-commits
bsdjhb added inline comments. Comment at: src/Registers.hpp:2659 + uint32_t _padding; + double _floats[32]; +#endif I chose to always use double here to avoid having different context sizes for the 32-bit vs 64-bit FPR cases. https://reviews.llvm.org/D41968

[PATCH] D41968: [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.

2018-01-11 Thread John Baldwin via Phabricator via cfe-commits
bsdjhb created this revision. bsdjhb added a reviewer: sdardis. Herald added a subscriber: arichardson. For newabi this is fairly simple as we just save/restore the 32 floating-point registers as doubles. For O32 MIPS provides a variety of floating-point ABIs. For O32 MIPS with 64-bit