[PATCH] D47070: [CUDA] Upgrade linked bitcode to enable inlining

2018-06-03 Thread Jonas Hahnfeld via Phabricator via cfe-commits
Hahnfeld abandoned this revision. Hahnfeld added a comment. Superseded by https://reviews.llvm.org/D47691 Repository: rC Clang https://reviews.llvm.org/D47070 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D47070: [CUDA] Upgrade linked bitcode to enable inlining

2018-06-01 Thread Artem Belevich via Phabricator via cfe-commits
tra added a comment. IMO overriding TargetTransformInfo::areInlineCompatible to always return true on NVPTX is what we want to do instead of upgrading everything else. AFAICT, on NVPTX there's no reason to prevent inlining due to those attributes -- we'll never generate code, nor will we ever

[PATCH] D47070: [CUDA] Upgrade linked bitcode to enable inlining

2018-06-01 Thread Jonas Hahnfeld via Phabricator via cfe-commits
Hahnfeld added a comment. In https://reviews.llvm.org/D47070#1108803, @tra wrote: > Here's my understanding of what happens: > We've started adding target-features and target-cpu to everything clang > generates. > We also need to link with libdevice (or IR generated by clang which which >

[PATCH] D47070: [CUDA] Upgrade linked bitcode to enable inlining

2018-05-22 Thread Artem Belevich via Phabricator via cfe-commits
tra added a comment. In https://reviews.llvm.org/D47070#1106018, @echristo wrote: > > As a short-term fix we can disable feature-to-function attribute > > propagation for NVPTX until we fix it. > > > > @echristo -- any other suggestions? > > This is some of what I was talking about when I was

[PATCH] D47070: [CUDA] Upgrade linked bitcode to enable inlining

2018-05-20 Thread Eric Christopher via Phabricator via cfe-commits
echristo added a comment. In https://reviews.llvm.org/D47070#1105533, @Hahnfeld wrote: > Looks like this was added as a "temporary solution" in > https://reviews.llvm.org/D8984. Meanwhile the attribute whitelist was merged > half a year later (https://reviews.llvm.org/D7802), so maybe we can

[PATCH] D47070: [CUDA] Upgrade linked bitcode to enable inlining

2018-05-19 Thread Jonas Hahnfeld via Phabricator via cfe-commits
Hahnfeld added subscribers: chandlerc, ahatanak. Hahnfeld added a comment. Looks like this was added as a "temporary solution" in https://reviews.llvm.org/D8984. Meanwhile the attribute whitelist was merged half a year later (https://reviews.llvm.org/D7802), so maybe we can just get rid of

[PATCH] D47070: [CUDA] Upgrade linked bitcode to enable inlining

2018-05-18 Thread Jonas Hahnfeld via Phabricator via cfe-commits
Hahnfeld added a comment. I think that's intended because the generated code might use instructions based on that feature. If we want to ignore that, we could override `TargetTransformInfo::areInlineCompatible` for NVPTX to only compare `target-cpu` Repository: rC Clang

[PATCH] D47070: [CUDA] Upgrade linked bitcode to enable inlining

2018-05-18 Thread Artem Belevich via Phabricator via cfe-commits
tra added a subscriber: echristo. tra added a comment. This was not intended. :-( I was unaware that GetCPUAndFeaturesAttributes() would add any feature that looks like a valid CPU name to the target-cpu attribute. All I needed is to make builtins available or not. Setting them as function

[PATCH] D47070: [CUDA] Upgrade linked bitcode to enable inlining

2018-05-18 Thread Justin Lebar via Phabricator via cfe-commits
jlebar added a comment. I defer to Art on this one. Repository: rC Clang https://reviews.llvm.org/D47070 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D47070: [CUDA] Upgrade linked bitcode to enable inlining

2018-05-18 Thread Jonas Hahnfeld via Phabricator via cfe-commits
Hahnfeld created this revision. Hahnfeld added reviewers: tra, jlebar. Herald added a subscriber: cfe-commits. Revision https://reviews.llvm.org/rC329829 added the architecture to "target-features". This prevents inlining of previously generated bitcode because the feature sets don't match. Thus