[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-26 Thread Phabricator via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rC347571: [AArch64] Add aarch64_vector_pcs function attribute 
to Clang (authored by s.desmalen, committed by ).

Repository:
  rC Clang

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54425/new/

https://reviews.llvm.org/D54425

Files:
  include/clang-c/Index.h
  include/clang/Basic/Attr.td
  include/clang/Basic/AttrDocs.td
  include/clang/Basic/Specifiers.h
  lib/AST/ItaniumMangle.cpp
  lib/AST/Type.cpp
  lib/AST/TypePrinter.cpp
  lib/Basic/Targets/AArch64.cpp
  lib/CodeGen/CGCall.cpp
  lib/CodeGen/CGDebugInfo.cpp
  lib/Sema/SemaDeclAttr.cpp
  lib/Sema/SemaType.cpp
  test/CodeGen/aarch64-vpcs.c
  test/Sema/aarch64-vpcs.c
  test/Sema/callingconv.c
  tools/libclang/CXType.cpp

Index: lib/CodeGen/CGCall.cpp
===
--- lib/CodeGen/CGCall.cpp
+++ lib/CodeGen/CGCall.cpp
@@ -59,6 +59,7 @@
   case CC_X86Pascal: return llvm::CallingConv::C;
   // TODO: Add support for __vectorcall to LLVM.
   case CC_X86VectorCall: return llvm::CallingConv::X86_VectorCall;
+  case CC_AArch64VectorCall: return llvm::CallingConv::AArch64_VectorCall;
   case CC_SpirFunction: return llvm::CallingConv::SPIR_FUNC;
   case CC_OpenCLKernel: return CGM.getTargetCodeGenInfo().getOpenCLKernelCallingConv();
   case CC_PreserveMost: return llvm::CallingConv::PreserveMost;
@@ -214,6 +215,9 @@
   if (PcsAttr *PCS = D->getAttr())
 return (PCS->getPCS() == PcsAttr::AAPCS ? CC_AAPCS : CC_AAPCS_VFP);
 
+  if (D->hasAttr())
+return CC_AArch64VectorCall;
+
   if (D->hasAttr())
 return CC_IntelOclBicc;
 
Index: lib/CodeGen/CGDebugInfo.cpp
===
--- lib/CodeGen/CGDebugInfo.cpp
+++ lib/CodeGen/CGDebugInfo.cpp
@@ -1102,6 +1102,7 @@
   case CC_X86_64SysV:
 return llvm::dwarf::DW_CC_LLVM_X86_64SysV;
   case CC_AAPCS:
+  case CC_AArch64VectorCall:
 return llvm::dwarf::DW_CC_LLVM_AAPCS;
   case CC_AAPCS_VFP:
 return llvm::dwarf::DW_CC_LLVM_AAPCS_VFP;
Index: lib/AST/TypePrinter.cpp
===
--- lib/AST/TypePrinter.cpp
+++ lib/AST/TypePrinter.cpp
@@ -861,6 +861,9 @@
 case CC_AAPCS_VFP:
   OS << " __attribute__((pcs(\"aapcs-vfp\")))";
   break;
+case CC_AArch64VectorCall:
+  OS << "__attribute__((aarch64_vector_pcs))";
+  break;
 case CC_IntelOclBicc:
   OS << " __attribute__((intel_ocl_bicc))";
   break;
@@ -1492,7 +1495,7 @@
OS << ')';
break;
   }
-
+  case attr::AArch64VectorPcs: OS << "aarch64_vector_pcs"; break;
   case attr::IntelOclBicc: OS << "inteloclbicc"; break;
   case attr::PreserveMost:
 OS << "preserve_most";
Index: lib/AST/Type.cpp
===
--- lib/AST/Type.cpp
+++ lib/AST/Type.cpp
@@ -2824,6 +2824,7 @@
   case CC_X86RegCall : return "regcall";
   case CC_AAPCS: return "aapcs";
   case CC_AAPCS_VFP: return "aapcs-vfp";
+  case CC_AArch64VectorCall: return "aarch64_vector_pcs";
   case CC_IntelOclBicc: return "intel_ocl_bicc";
   case CC_SpirFunction: return "spir_function";
   case CC_OpenCLKernel: return "opencl_kernel";
@@ -3216,6 +3217,7 @@
   case attr::RegCall:
   case attr::SwiftCall:
   case attr::VectorCall:
+  case attr::AArch64VectorPcs:
   case attr::Pascal:
   case attr::MSABI:
   case attr::SysVABI:
Index: lib/AST/ItaniumMangle.cpp
===
--- lib/AST/ItaniumMangle.cpp
+++ lib/AST/ItaniumMangle.cpp
@@ -2659,6 +2659,7 @@
   case CC_X86RegCall:
   case CC_AAPCS:
   case CC_AAPCS_VFP:
+  case CC_AArch64VectorCall:
   case CC_IntelOclBicc:
   case CC_SpirFunction:
   case CC_OpenCLKernel:
Index: lib/Sema/SemaType.cpp
===
--- lib/Sema/SemaType.cpp
+++ lib/Sema/SemaType.cpp
@@ -116,6 +116,7 @@
   case ParsedAttr::AT_Pascal:  \
   case ParsedAttr::AT_SwiftCall:   \
   case ParsedAttr::AT_VectorCall:  \
+  case ParsedAttr::AT_AArch64VectorPcs:\
   case ParsedAttr::AT_MSABI:   \
   case ParsedAttr::AT_SysVABI: \
   case ParsedAttr::AT_Pcs: \
@@ -6653,6 +6654,8 @@
 return createSimpleAttr(Ctx, Attr);
   case ParsedAttr::AT_VectorCall:
 return createSimpleAttr(Ctx, Attr);
+  case ParsedAttr::AT_AArch64VectorPcs:
+return createSimpleAttr(Ctx, Attr);
   case ParsedAttr::AT_Pcs: {
 // The attribute may have had a fixit applied where we treated an
 // identifier as a string literal.  The contents of the string are valid,
Index: lib/Sema/SemaDeclAttr.cpp

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-26 Thread John McCall via Phabricator via cfe-commits 
rjmccall accepted this revision.
rjmccall added a comment.
This revision is now accepted and ready to land.

Thanks, LGTM.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54425/new/

https://reviews.llvm.org/D54425



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-26 Thread Sander de Smalen via Phabricator via cfe-commits 
sdesmalen updated this revision to Diff 175236.
sdesmalen added a comment.

- resolved editorial comments.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54425/new/

https://reviews.llvm.org/D54425

Files:
  include/clang-c/Index.h
  include/clang/Basic/Attr.td
  include/clang/Basic/AttrDocs.td
  include/clang/Basic/Specifiers.h
  lib/AST/ItaniumMangle.cpp
  lib/AST/Type.cpp
  lib/AST/TypePrinter.cpp
  lib/Basic/Targets/AArch64.cpp
  lib/CodeGen/CGCall.cpp
  lib/CodeGen/CGDebugInfo.cpp
  lib/Sema/SemaDeclAttr.cpp
  lib/Sema/SemaType.cpp
  test/CodeGen/aarch64-vpcs.c
  test/Sema/aarch64-vpcs.c
  test/Sema/callingconv.c
  tools/libclang/CXType.cpp

Index: tools/libclang/CXType.cpp
===
--- tools/libclang/CXType.cpp
+++ tools/libclang/CXType.cpp
@@ -651,6 +651,7 @@
   TCALLINGCONV(X86Pascal);
   TCALLINGCONV(X86RegCall);
   TCALLINGCONV(X86VectorCall);
+  TCALLINGCONV(AArch64VectorCall);
   TCALLINGCONV(Win64);
   TCALLINGCONV(X86_64SysV);
   TCALLINGCONV(AAPCS);
Index: test/Sema/callingconv.c
===
--- test/Sema/callingconv.c
+++ test/Sema/callingconv.c
@@ -51,6 +51,8 @@
 int __attribute__((pcs("aapcs-vfp"))) pcs6(void); // expected-warning {{calling convention 'pcs' ignored for this target}}
 int __attribute__((pcs("foo"))) pcs7(void); // expected-error {{invalid PCS type}}
 
+int __attribute__((aarch64_vector_pcs)) aavpcs(void); // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}}
+
 // PR6361
 void ctest3();
 void __attribute__((cdecl)) ctest3() {}
Index: test/Sema/aarch64-vpcs.c
===
--- /dev/null
+++ test/Sema/aarch64-vpcs.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple aarch64-linux-gnu -verify %s
+
+typedef __attribute__((aarch64_vector_pcs)) int invalid_typedef; // expected-warning {{'aarch64_vector_pcs' only applies to function types; type here is 'int'}}
+
+void __attribute__((aarch64_vector_pcs(0))) foo0(void); // expected-error {{'aarch64_vector_pcs' attribute takes no arguments}}
+
+void __attribute__((aarch64_vector_pcs, preserve_all)) foo1(void); // expected-error {{not compatible}}
+
+void __attribute__((cdecl)) foo2(void);// expected-note {{previous declaration is here}}
+void __attribute__((aarch64_vector_pcs)) foo2(void) {} // expected-error {{function declared 'aarch64_vector_pcs' here was previously declared 'cdecl'}}
+
+void foo3(void);   // expected-note {{previous declaration is here}}
+void __attribute__((aarch64_vector_pcs)) foo3(void) {} // expected-error {{function declared 'aarch64_vector_pcs' here was previously declared without calling convention}}
+
+typedef int (*fn_ty)(void);
+typedef int __attribute__((aarch64_vector_pcs)) (*aavpcs_fn_ty)(void);
+void foo4(fn_ty ptr1, aavpcs_fn_ty ptr2) {
+  ptr1 = ptr2; // expected-warning {{incompatible function pointer types}}
+}
Index: test/CodeGen/aarch64-vpcs.c
===
--- /dev/null
+++ test/CodeGen/aarch64-vpcs.c
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECKC
+// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -x c++ -o - %s | FileCheck %s -check-prefix=CHECKCXX
+// RUN: %clang_cc1 -triple i686-pc-linux-gnu -verify %s
+
+void __attribute__((aarch64_vector_pcs)) f(int *); // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}}
+
+// CHECKC: define void @g(
+// CHECKCXX: define void @_Z1gPi(
+void g(int *a) {
+
+// CHECKC: call aarch64_vector_pcs void @f(
+// CHECKCXX: call aarch64_vector_pcs void @_Z1fPi
+  f(a);
+}
+
+// CHECKC: declare aarch64_vector_pcs void @f(
+// CHECKCXX: declare aarch64_vector_pcs void @_Z1fPi
+
+void __attribute__((aarch64_vector_pcs)) h(int *a){ // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}}
+// CHECKC: define aarch64_vector_pcs void @h(
+// CHECKCXX: define aarch64_vector_pcs void @_Z1hPi(
+  f(a);
+}
Index: lib/Sema/SemaType.cpp
===
--- lib/Sema/SemaType.cpp
+++ lib/Sema/SemaType.cpp
@@ -116,6 +116,7 @@
   case ParsedAttr::AT_Pascal:  \
   case ParsedAttr::AT_SwiftCall:   \
   case ParsedAttr::AT_VectorCall:  \
+  case ParsedAttr::AT_AArch64VectorPcs:\
   case ParsedAttr::AT_MSABI:   \
   case ParsedAttr::AT_SysVABI: \
   case ParsedAttr::AT_Pcs: \
@@ -6653,6 +6654,8 @@
 return createSimpleAttr(Ctx, Attr);

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-26 Thread Aaron Ballman via Phabricator via cfe-commits 
aaron.ballman added a comment.

In D54425#1307838 , @sdesmalen wrote:

> Just to double check before committing, @aaron.ballman are you happy with the 
> tests?


The tests LGTM, but there are still some unresolved comments from @rjmccall 
that should be handled before committing.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54425/new/

https://reviews.llvm.org/D54425



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-26 Thread Sander de Smalen via Phabricator via cfe-commits 
sdesmalen added a comment.

Just to double check before committing, @aaron.ballman are you happy with the 
tests?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54425/new/

https://reviews.llvm.org/D54425



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-19 Thread John McCall via Phabricator via cfe-commits 
rjmccall added a comment.

Implementation LGTM.




Comment at: include/clang/Basic/AttrDocs.td:1753
+This means it is more efficient to call such functions from code that performs
+extensive floating-point and vector calculations, because fewer live SIMD
+registers need to be saved. This property makes it well-suited for e.g.

Please spell out "and".



Comment at: include/clang/Basic/AttrDocs.td:1758
+
+Using this attribute however, also means that it is more expensive to call
+a function that adheres to the default calling convention from within such

"However, using this attribute also means..."



Comment at: include/clang/Basic/AttrDocs.td:1766
+
+.. _`aarch64_vector_pcs`: 
https://developer.arm.com/products/software-development-tools/hpc/arm-compiler-for-hpc/vector-function-abi
+  }];

Thanks; other than those two editorial comments, this seems good.



Comment at: lib/CodeGen/CGDebugInfo.cpp:1101
   case CC_AAPCS:
+  case CC_AArch64VectorCall:
 return llvm::dwarf::DW_CC_LLVM_AAPCS;

sdesmalen wrote:
> rjmccall wrote:
> > rnk wrote:
> > > sdesmalen wrote:
> > > > I wasn't really sure whether this requires a corresponding 
> > > > DW_CC_LLVM_AAVPCS record in LLVM, as I couldn't find much about the 
> > > > DW_CC_LLVM_  encodings, specifically whether they align with some 
> > > > agreed encoding that is implemented by GDB/LLDB. Is this defined 
> > > > anywhere, or is it ignored by debuggers at the moment?
> > > DWARF only allows encoding 256 conventions, and we grabbed 0xC[0-F], I 
> > > guess for "clang", so we probably want to be careful about adding 
> > > another. Do you anticipate making debuggers able to call such functions? 
> > > If not, it's probably not worth it.
> > They probably should be callable.
> > 
> > It looks like DWARF reserves the first 64 conventions for general/language 
> > purposes and treats the rest of the range as "user" conventions.   If those 
> > conventions are assumed to be universally unique, that's a really limiting 
> > schema once you started dividing it up by vendor.  If I might make a 
> > suggestion, while there are certainly many calling conventions that are 
> > meant to have universal meaning (e.g. most language-specific conventions), 
> > there are also a large number that are inherently target-specific.  DWARF 
> > already uses a lot of numbers that only make sense in the context of a 
> > target (like register numbers); it would make sense for DWARF to carve out 
> > a range of the encoding space (maybe 16 or 32 numbers) for target-specific 
> > CCs.  This is hardly the first example; consider also all the variant ARM32 
> > CCs or the i386 fastcall CC.
> Great feedback. I think this discussion has a wider scope than this patch and 
> I think its probably best to keep this change as-is for now. We'll first work 
> to add a section to the 'DWARF for the ARM 64-bit Architecture' document 
> describing a DW_AT_calling_convention value for the AArch64 vector PCS and 
> will create a separate patch to LLVM/Clang to implement its support. I've 
> also asked @keith.walker.arm to raise this (encoding space) as a topic with 
> the DWARF standardization committee.
Thank you, I appreciate that.


https://reviews.llvm.org/D54425



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-19 Thread Sander de Smalen via Phabricator via cfe-commits 
sdesmalen added a subscriber: keith.walker.arm.
sdesmalen added inline comments.



Comment at: lib/CodeGen/CGDebugInfo.cpp:1101
   case CC_AAPCS:
+  case CC_AArch64VectorCall:
 return llvm::dwarf::DW_CC_LLVM_AAPCS;

rjmccall wrote:
> rnk wrote:
> > sdesmalen wrote:
> > > I wasn't really sure whether this requires a corresponding 
> > > DW_CC_LLVM_AAVPCS record in LLVM, as I couldn't find much about the 
> > > DW_CC_LLVM_  encodings, specifically whether they align with some agreed 
> > > encoding that is implemented by GDB/LLDB. Is this defined anywhere, or is 
> > > it ignored by debuggers at the moment?
> > DWARF only allows encoding 256 conventions, and we grabbed 0xC[0-F], I 
> > guess for "clang", so we probably want to be careful about adding another. 
> > Do you anticipate making debuggers able to call such functions? If not, 
> > it's probably not worth it.
> They probably should be callable.
> 
> It looks like DWARF reserves the first 64 conventions for general/language 
> purposes and treats the rest of the range as "user" conventions.   If those 
> conventions are assumed to be universally unique, that's a really limiting 
> schema once you started dividing it up by vendor.  If I might make a 
> suggestion, while there are certainly many calling conventions that are meant 
> to have universal meaning (e.g. most language-specific conventions), there 
> are also a large number that are inherently target-specific.  DWARF already 
> uses a lot of numbers that only make sense in the context of a target (like 
> register numbers); it would make sense for DWARF to carve out a range of the 
> encoding space (maybe 16 or 32 numbers) for target-specific CCs.  This is 
> hardly the first example; consider also all the variant ARM32 CCs or the i386 
> fastcall CC.
Great feedback. I think this discussion has a wider scope than this patch and I 
think its probably best to keep this change as-is for now. We'll first work to 
add a section to the 'DWARF for the ARM 64-bit Architecture' document 
describing a DW_AT_calling_convention value for the AArch64 vector PCS and will 
create a separate patch to LLVM/Clang to implement its support. I've also asked 
@keith.walker.arm to raise this (encoding space) as a topic with the DWARF 
standardization committee.


https://reviews.llvm.org/D54425



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-19 Thread Sander de Smalen via Phabricator via cfe-commits 
sdesmalen updated this revision to Diff 174574.
sdesmalen marked an inline comment as done.
sdesmalen added a comment.

Thanks all for the suggestions and comments! I've updated the patch with a 
better description of the attribute's behaviour (thanks @rjmccall for the 
starting point!) and added Sema tests.


https://reviews.llvm.org/D54425

Files:
  include/clang-c/Index.h
  include/clang/Basic/Attr.td
  include/clang/Basic/AttrDocs.td
  include/clang/Basic/Specifiers.h
  lib/AST/ItaniumMangle.cpp
  lib/AST/Type.cpp
  lib/AST/TypePrinter.cpp
  lib/Basic/Targets/AArch64.cpp
  lib/CodeGen/CGCall.cpp
  lib/CodeGen/CGDebugInfo.cpp
  lib/Sema/SemaDeclAttr.cpp
  lib/Sema/SemaType.cpp
  test/CodeGen/aarch64-vpcs.c
  test/Sema/aarch64-vpcs.c
  test/Sema/callingconv.c
  tools/libclang/CXType.cpp

Index: tools/libclang/CXType.cpp
===
--- tools/libclang/CXType.cpp
+++ tools/libclang/CXType.cpp
@@ -651,6 +651,7 @@
   TCALLINGCONV(X86Pascal);
   TCALLINGCONV(X86RegCall);
   TCALLINGCONV(X86VectorCall);
+  TCALLINGCONV(AArch64VectorCall);
   TCALLINGCONV(Win64);
   TCALLINGCONV(X86_64SysV);
   TCALLINGCONV(AAPCS);
Index: test/Sema/callingconv.c
===
--- test/Sema/callingconv.c
+++ test/Sema/callingconv.c
@@ -51,6 +51,8 @@
 int __attribute__((pcs("aapcs-vfp"))) pcs6(void); // expected-warning {{calling convention 'pcs' ignored for this target}}
 int __attribute__((pcs("foo"))) pcs7(void); // expected-error {{invalid PCS type}}
 
+int __attribute__((aarch64_vector_pcs)) aavpcs(void); // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}}
+
 // PR6361
 void ctest3();
 void __attribute__((cdecl)) ctest3() {}
Index: test/Sema/aarch64-vpcs.c
===
--- /dev/null
+++ test/Sema/aarch64-vpcs.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple aarch64-linux-gnu -verify %s
+
+typedef __attribute__((aarch64_vector_pcs)) int invalid_typedef; // expected-warning {{'aarch64_vector_pcs' only applies to function types; type here is 'int'}}
+
+void __attribute__((aarch64_vector_pcs(0))) foo0(void); // expected-error {{'aarch64_vector_pcs' attribute takes no arguments}}
+
+void __attribute__((aarch64_vector_pcs, preserve_all)) foo1(void); // expected-error {{not compatible}}
+
+void __attribute__((cdecl)) foo2(void);// expected-note {{previous declaration is here}}
+void __attribute__((aarch64_vector_pcs)) foo2(void) {} // expected-error {{function declared 'aarch64_vector_pcs' here was previously declared 'cdecl'}}
+
+void foo3(void);   // expected-note {{previous declaration is here}}
+void __attribute__((aarch64_vector_pcs)) foo3(void) {} // expected-error {{function declared 'aarch64_vector_pcs' here was previously declared without calling convention}}
+
+typedef int (*fn_ty)(void);
+typedef int __attribute__((aarch64_vector_pcs)) (*aavpcs_fn_ty)(void);
+void foo4(fn_ty ptr1, aavpcs_fn_ty ptr2) {
+  ptr1 = ptr2; // expected-warning {{incompatible function pointer types}}
+}
Index: test/CodeGen/aarch64-vpcs.c
===
--- /dev/null
+++ test/CodeGen/aarch64-vpcs.c
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECKC
+// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -x c++ -o - %s | FileCheck %s -check-prefix=CHECKCXX
+// RUN: %clang_cc1 -triple i686-pc-linux-gnu -verify %s
+
+void __attribute__((aarch64_vector_pcs)) f(int *); // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}}
+
+// CHECKC: define void @g(
+// CHECKCXX: define void @_Z1gPi(
+void g(int *a) {
+
+// CHECKC: call aarch64_vector_pcs void @f(
+// CHECKCXX: call aarch64_vector_pcs void @_Z1fPi
+  f(a);
+}
+
+// CHECKC: declare aarch64_vector_pcs void @f(
+// CHECKCXX: declare aarch64_vector_pcs void @_Z1fPi
+
+void __attribute__((aarch64_vector_pcs)) h(int *a){ // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}}
+// CHECKC: define aarch64_vector_pcs void @h(
+// CHECKCXX: define aarch64_vector_pcs void @_Z1hPi(
+  f(a);
+}
Index: lib/Sema/SemaType.cpp
===
--- lib/Sema/SemaType.cpp
+++ lib/Sema/SemaType.cpp
@@ -116,6 +116,7 @@
   case ParsedAttr::AT_Pascal:  \
   case ParsedAttr::AT_SwiftCall:   \
   case ParsedAttr::AT_VectorCall:  \
+  case ParsedAttr::AT_AArch64VectorPcs:\
   case ParsedAttr::AT_MSABI:   \
   case ParsedAttr::AT_SysVABI: \
   case

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-16 Thread John McCall via Phabricator via cfe-commits 
rjmccall added inline comments.



Comment at: lib/CodeGen/CGDebugInfo.cpp:1101
   case CC_AAPCS:
+  case CC_AArch64VectorCall:
 return llvm::dwarf::DW_CC_LLVM_AAPCS;

rnk wrote:
> sdesmalen wrote:
> > I wasn't really sure whether this requires a corresponding 
> > DW_CC_LLVM_AAVPCS record in LLVM, as I couldn't find much about the 
> > DW_CC_LLVM_  encodings, specifically whether they align with some agreed 
> > encoding that is implemented by GDB/LLDB. Is this defined anywhere, or is 
> > it ignored by debuggers at the moment?
> DWARF only allows encoding 256 conventions, and we grabbed 0xC[0-F], I guess 
> for "clang", so we probably want to be careful about adding another. Do you 
> anticipate making debuggers able to call such functions? If not, it's 
> probably not worth it.
They probably should be callable.

It looks like DWARF reserves the first 64 conventions for general/language 
purposes and treats the rest of the range as "user" conventions.   If those 
conventions are assumed to be universally unique, that's a really limiting 
schema once you started dividing it up by vendor.  If I might make a 
suggestion, while there are certainly many calling conventions that are meant 
to have universal meaning (e.g. most language-specific conventions), there are 
also a large number that are inherently target-specific.  DWARF already uses a 
lot of numbers that only make sense in the context of a target (like register 
numbers); it would make sense for DWARF to carve out a range of the encoding 
space (maybe 16 or 32 numbers) for target-specific CCs.  This is hardly the 
first example; consider also all the variant ARM32 CCs or the i386 fastcall CC.


https://reviews.llvm.org/D54425



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-16 Thread Reid Kleckner via Phabricator via cfe-commits 
rnk added inline comments.



Comment at: lib/CodeGen/CGDebugInfo.cpp:1101
   case CC_AAPCS:
+  case CC_AArch64VectorCall:
 return llvm::dwarf::DW_CC_LLVM_AAPCS;

sdesmalen wrote:
> I wasn't really sure whether this requires a corresponding DW_CC_LLVM_AAVPCS 
> record in LLVM, as I couldn't find much about the DW_CC_LLVM_  encodings, 
> specifically whether they align with some agreed encoding that is implemented 
> by GDB/LLDB. Is this defined anywhere, or is it ignored by debuggers at the 
> moment?
DWARF only allows encoding 256 conventions, and we grabbed 0xC[0-F], I guess 
for "clang", so we probably want to be careful about adding another. Do you 
anticipate making debuggers able to call such functions? If not, it's probably 
not worth it.


https://reviews.llvm.org/D54425



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-15 Thread John McCall via Phabricator via cfe-commits 
rjmccall added inline comments.



Comment at: include/clang/Basic/AttrDocs.td:1749-1750
+On 64-bit ARM targets, this argument causes the function to obey the vector
+procedural call standard (VPCS) rules as described in the Vector ABI for
+AArch64. In particular, the register caller/callee saves ratio is set to 16/16.
+  }];

aaron.ballman wrote:
> If you can add a link to the vector ABI here, or to something that gives more 
> detail about the ABI, that'd be great.
Describing this in terms of the "caller/callee saves ratio" is pretty obscure 
for most users.  As Aaron suggestions, it's good include a link to the detailed 
documentation for people who want to know *exactly* what this means.  For 
everyone else, your goal is to convince them to use your attribute in 
appropriate situations, so you should frame the documentation in those terms.  
Try this as a starting point:

> Functions declared with this calling convention preserve additional 
> floating-point and vector registers relative to the standard C convention, 
> which makes it more efficient to call such functions within complex 
> floating-point and vector calculations.  However, this also makes it more 
> expensive to call a standard C function within such a function.  Therefore, 
> it is recommended that this attribute be used on "leaf" functions that are 
> likely to be used by code performing floating-point and vector calculations 
> but that don't need to use any functions not declared with this attribute.


https://reviews.llvm.org/D54425



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-15 Thread Aaron Ballman via Phabricator via cfe-commits 
aaron.ballman added a comment.

Missing sema tests that demonstrate the attribute can only appertain to 
functions and types, accepts no arguments, has the expected semantic behavior 
for typecasts to function pointers, etc.




Comment at: include/clang/Basic/Attr.td:1792
+  let Spellings = [Clang<"aarch64_vector_pcs">];
+  let Documentation = [ AArch64VectorPcsDocs ];
+}

Spurious whitespace around the square brackets.



Comment at: include/clang/Basic/AttrDocs.td:1749-1750
+On 64-bit ARM targets, this argument causes the function to obey the vector
+procedural call standard (VPCS) rules as described in the Vector ABI for
+AArch64. In particular, the register caller/callee saves ratio is set to 16/16.
+  }];

If you can add a link to the vector ABI here, or to something that gives more 
detail about the ABI, that'd be great.


https://reviews.llvm.org/D54425



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-13 Thread Sander de Smalen via Phabricator via cfe-commits 
sdesmalen updated this revision to Diff 173831.
sdesmalen added a comment.

- Removed `_aarch64_vector_pcs` and `__aarch64_vector_pcs` keywords in favour 
of supporting only `__attribute__(aarch64_vector_pcs))`.


https://reviews.llvm.org/D54425

Files:
  include/clang-c/Index.h
  include/clang/Basic/Attr.td
  include/clang/Basic/AttrDocs.td
  include/clang/Basic/Specifiers.h
  lib/AST/ItaniumMangle.cpp
  lib/AST/Type.cpp
  lib/AST/TypePrinter.cpp
  lib/Basic/Targets/AArch64.cpp
  lib/CodeGen/CGCall.cpp
  lib/CodeGen/CGDebugInfo.cpp
  lib/Sema/SemaDeclAttr.cpp
  lib/Sema/SemaType.cpp
  test/CodeGen/aarch64-vpcs.c
  tools/libclang/CXType.cpp

Index: tools/libclang/CXType.cpp
===
--- tools/libclang/CXType.cpp
+++ tools/libclang/CXType.cpp
@@ -651,6 +651,7 @@
   TCALLINGCONV(X86Pascal);
   TCALLINGCONV(X86RegCall);
   TCALLINGCONV(X86VectorCall);
+  TCALLINGCONV(AArch64VectorCall);
   TCALLINGCONV(Win64);
   TCALLINGCONV(X86_64SysV);
   TCALLINGCONV(AAPCS);
Index: test/CodeGen/aarch64-vpcs.c
===
--- /dev/null
+++ test/CodeGen/aarch64-vpcs.c
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECKC
+// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -x c++ -o - %s | FileCheck %s -check-prefix=CHECKCXX
+// RUN: %clang_cc1 -triple i686-pc-linux-gnu -verify %s
+
+void __attribute__((aarch64_vector_pcs)) f(int *); // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}}
+
+// CHECKC: define void @g(
+// CHECKCXX: define void @_Z1gPi(
+void g(int *a) {
+
+// CHECKC: call aarch64_vector_pcs void @f(
+// CHECKCXX: call aarch64_vector_pcs void @_Z1fPi
+  f(a);
+}
+
+// CHECKC: declare aarch64_vector_pcs void @f(
+// CHECKCXX: declare aarch64_vector_pcs void @_Z1fPi
+
+void __attribute__((aarch64_vector_pcs)) h(int *a){ // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}}
+// CHECKC: define aarch64_vector_pcs void @h(
+// CHECKCXX: define aarch64_vector_pcs void @_Z1hPi(
+  f(a);
+}
Index: lib/Sema/SemaType.cpp
===
--- lib/Sema/SemaType.cpp
+++ lib/Sema/SemaType.cpp
@@ -116,6 +116,7 @@
   case ParsedAttr::AT_Pascal:  \
   case ParsedAttr::AT_SwiftCall:   \
   case ParsedAttr::AT_VectorCall:  \
+  case ParsedAttr::AT_AArch64VectorPcs:\
   case ParsedAttr::AT_MSABI:   \
   case ParsedAttr::AT_SysVABI: \
   case ParsedAttr::AT_Pcs: \
@@ -6657,6 +6658,8 @@
 return createSimpleAttr(Ctx, Attr);
   case ParsedAttr::AT_VectorCall:
 return createSimpleAttr(Ctx, Attr);
+  case ParsedAttr::AT_AArch64VectorPcs:
+return createSimpleAttr(Ctx, Attr);
   case ParsedAttr::AT_Pcs: {
 // The attribute may have had a fixit applied where we treated an
 // identifier as a string literal.  The contents of the string are valid,
Index: lib/Sema/SemaDeclAttr.cpp
===
--- lib/Sema/SemaDeclAttr.cpp
+++ lib/Sema/SemaDeclAttr.cpp
@@ -4291,6 +4291,11 @@
AL.getAttributeSpellingListIndex()));
 return;
   }
+  case ParsedAttr::AT_AArch64VectorPcs:
+D->addAttr(::new(S.Context)
+   AArch64VectorPcsAttr(AL.getRange(), S.Context,
+AL.getAttributeSpellingListIndex()));
+return;
   case ParsedAttr::AT_IntelOclBicc:
 D->addAttr(::new (S.Context)
IntelOclBiccAttr(AL.getRange(), S.Context,
@@ -4368,6 +4373,9 @@
   case ParsedAttr::AT_VectorCall:
 CC = CC_X86VectorCall;
 break;
+  case ParsedAttr::AT_AArch64VectorPcs:
+CC = CC_AArch64VectorCall;
+break;
   case ParsedAttr::AT_RegCall:
 CC = CC_X86RegCall;
 break;
@@ -5840,14 +5848,14 @@
   if (AL.isDeclspecAttribute() || AL.isCXX11Attribute())
 checkAttributeAtMostNumArgs(S, AL, 1);
   else if (AL.isArgExpr(1) && AL.getArgAsExpr(1) &&
-   !S.checkStringLiteralArgumentAttr(AL, 1, Replacement))
-return;
-
-  if (!S.getLangOpts().CPlusPlus14 && AL.isCXX11Attribute() && !AL.isGNUScope())
-S.Diag(AL.getLoc(), diag::ext_cxx14_attr) << AL;
-
-  D->addAttr(::new (S.Context)
- DeprecatedAttr(AL.getRange(), S.Context, Str, Replacement,
+   !S.checkStringLiteralArgumentAttr(AL, 1, Replacement))
+return;
+
+  if (!S.getLangOpts().CPlusPlus14 && AL.isCXX11Attribute() && !AL.isGNUScope())
+S.Diag(AL.getLoc(), diag::ext_cxx14_attr) << AL;
+
+  D->addAttr(::new (S.Context)
+

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-13 Thread Sander de Smalen via Phabricator via cfe-commits 
sdesmalen marked an inline comment as done.
sdesmalen added inline comments.



Comment at: include/clang/Basic/Attr.td:1792
+  let Spellings = [GNU<"aarch64_vector_pcs">,
+   CXX11<"clang", "aarch64_vector_pcs">,
+   Keyword<"__aarch64_vector_pcs">,

aaron.ballman wrote:
> Rather than using GNU and CXX11 spellings, you should use the Clang spelling. 
> If the attribute is not useful in C, then set `allowInC` to 0 instead of its 
> default of 1.
Thanks for the suggestion! The attribute is valid in C as well, and is tested 
for both C and C++ in test/CodeGen/aarch64-vpcs.c.



Comment at: include/clang/Basic/Attr.td:1794
+   Keyword<"__aarch64_vector_pcs">,
+   Keyword<"_aarch64_vector_pcs">];
+  let Documentation = [AArch64VectorPcsDocs];

aaron.ballman wrote:
> This steps on the user's namespace -- is that intended and necessary?
That was not intended and looking at the spec, the keyword is not required so 
I'll remove it.


https://reviews.llvm.org/D54425



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-12 Thread Aaron Ballman via Phabricator via cfe-commits 
aaron.ballman added inline comments.



Comment at: include/clang/Basic/Attr.td:1792
+  let Spellings = [GNU<"aarch64_vector_pcs">,
+   CXX11<"clang", "aarch64_vector_pcs">,
+   Keyword<"__aarch64_vector_pcs">,

Rather than using GNU and CXX11 spellings, you should use the Clang spelling. 
If the attribute is not useful in C, then set `allowInC` to 0 instead of its 
default of 1.



Comment at: include/clang/Basic/Attr.td:1794
+   Keyword<"__aarch64_vector_pcs">,
+   Keyword<"_aarch64_vector_pcs">];
+  let Documentation = [AArch64VectorPcsDocs];

This steps on the user's namespace -- is that intended and necessary?



Comment at: include/clang/Basic/AttrDocs.td:1748
+  let Content = [{
+On 64 bit ARM targets, this argument causes the function to obey the vector
+procedural call standard (VPCS) rules as described in the Vector ABI for

64 bit -> 64-bit


https://reviews.llvm.org/D54425



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-12 Thread Sander de Smalen via Phabricator via cfe-commits 
sdesmalen added inline comments.



Comment at: lib/CodeGen/CGDebugInfo.cpp:1101
   case CC_AAPCS:
+  case CC_AArch64VectorCall:
 return llvm::dwarf::DW_CC_LLVM_AAPCS;

I wasn't really sure whether this requires a corresponding DW_CC_LLVM_AAVPCS 
record in LLVM, as I couldn't find much about the DW_CC_LLVM_  encodings, 
specifically whether they align with some agreed encoding that is implemented 
by GDB/LLDB. Is this defined anywhere, or is it ignored by debuggers at the 
moment?


https://reviews.llvm.org/D54425



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D54425: [AArch64] Add aarch64_vector_pcs function attribute to Clang

2018-11-12 Thread Sander de Smalen via Phabricator via cfe-commits 
sdesmalen created this revision.
sdesmalen added reviewers: ributzka, rjmccall, rnk, aaron.ballman.
Herald added subscribers: arphaman, kristof.beyls, javed.absar.

This is the Clang patch to complement the following LLVM patches:

  https://reviews.llvm.org/D51477
  https://reviews.llvm.org/D51479

More information describing the vector ABI and procedure call standard
can be found here:

https://developer.arm.com/products/software-development-tools/\

  hpc/arm-compiler-for-hpc/vector-function-abi

Patch by Kerry McLaughlin.


https://reviews.llvm.org/D54425

Files:
  include/clang-c/Index.h
  include/clang/Basic/Attr.td
  include/clang/Basic/AttrDocs.td
  include/clang/Basic/Specifiers.h
  lib/AST/ItaniumMangle.cpp
  lib/AST/Type.cpp
  lib/AST/TypePrinter.cpp
  lib/Basic/Targets/AArch64.cpp
  lib/CodeGen/CGCall.cpp
  lib/CodeGen/CGDebugInfo.cpp
  lib/Sema/SemaDeclAttr.cpp
  lib/Sema/SemaType.cpp
  test/CodeGen/aarch64-vpcs.c
  tools/libclang/CXType.cpp

Index: tools/libclang/CXType.cpp
===
--- tools/libclang/CXType.cpp
+++ tools/libclang/CXType.cpp
@@ -651,6 +651,7 @@
   TCALLINGCONV(X86Pascal);
   TCALLINGCONV(X86RegCall);
   TCALLINGCONV(X86VectorCall);
+  TCALLINGCONV(AArch64VectorCall);
   TCALLINGCONV(Win64);
   TCALLINGCONV(X86_64SysV);
   TCALLINGCONV(AAPCS);
Index: test/CodeGen/aarch64-vpcs.c
===
--- /dev/null
+++ test/CodeGen/aarch64-vpcs.c
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECKC
+// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -x c++ -o - %s | FileCheck %s -check-prefix=CHECKCXX
+// RUN: %clang_cc1 -triple i686-pc-linux-gnu -verify %s
+
+void __attribute__((aarch64_vector_pcs)) f(int *); // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}}
+
+// CHECKC: define void @g(
+// CHECKCXX: define void @_Z1gPi(
+void g(int *a) {
+
+// CHECKC: call aarch64_vector_pcs void @f(
+// CHECKCXX: call aarch64_vector_pcs void @_Z1fPi
+  f(a);
+}
+
+// CHECKC: declare aarch64_vector_pcs void @f(
+// CHECKCXX: declare aarch64_vector_pcs void @_Z1fPi
+
+void __attribute__((aarch64_vector_pcs)) h(int *a){ // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}}
+// CHECKC: define aarch64_vector_pcs void @h(
+// CHECKCXX: define aarch64_vector_pcs void @_Z1hPi(
+  f(a);
+}
Index: lib/Sema/SemaType.cpp
===
--- lib/Sema/SemaType.cpp
+++ lib/Sema/SemaType.cpp
@@ -116,6 +116,7 @@
   case ParsedAttr::AT_Pascal:  \
   case ParsedAttr::AT_SwiftCall:   \
   case ParsedAttr::AT_VectorCall:  \
+  case ParsedAttr::AT_AArch64VectorPcs:\
   case ParsedAttr::AT_MSABI:   \
   case ParsedAttr::AT_SysVABI: \
   case ParsedAttr::AT_Pcs: \
@@ -6657,6 +6658,8 @@
 return createSimpleAttr(Ctx, Attr);
   case ParsedAttr::AT_VectorCall:
 return createSimpleAttr(Ctx, Attr);
+  case ParsedAttr::AT_AArch64VectorPcs:
+return createSimpleAttr(Ctx, Attr);
   case ParsedAttr::AT_Pcs: {
 // The attribute may have had a fixit applied where we treated an
 // identifier as a string literal.  The contents of the string are valid,
Index: lib/Sema/SemaDeclAttr.cpp
===
--- lib/Sema/SemaDeclAttr.cpp
+++ lib/Sema/SemaDeclAttr.cpp
@@ -4291,6 +4291,11 @@
AL.getAttributeSpellingListIndex()));
 return;
   }
+  case ParsedAttr::AT_AArch64VectorPcs:
+D->addAttr(::new(S.Context)
+   AArch64VectorPcsAttr(AL.getRange(), S.Context,
+AL.getAttributeSpellingListIndex()));
+return;
   case ParsedAttr::AT_IntelOclBicc:
 D->addAttr(::new (S.Context)
IntelOclBiccAttr(AL.getRange(), S.Context,
@@ -4368,6 +4373,9 @@
   case ParsedAttr::AT_VectorCall:
 CC = CC_X86VectorCall;
 break;
+  case ParsedAttr::AT_AArch64VectorPcs:
+CC = CC_AArch64VectorCall;
+break;
   case ParsedAttr::AT_RegCall:
 CC = CC_X86RegCall;
 break;
@@ -5840,14 +5848,14 @@
   if (AL.isDeclspecAttribute() || AL.isCXX11Attribute())
 checkAttributeAtMostNumArgs(S, AL, 1);
   else if (AL.isArgExpr(1) && AL.getArgAsExpr(1) &&
-   !S.checkStringLiteralArgumentAttr(AL, 1, Replacement))
-return;
-
-  if (!S.getLangOpts().CPlusPlus14 && AL.isCXX11Attribute() && !AL.isGNUScope())
-S.Diag(AL.getLoc(), diag::ext_cxx14_attr) << AL;
-
-  D->addAttr(::new (S.Context)
-